Patents by Inventor Yuichiro Masuda

Yuichiro Masuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170097419
    Abstract: A position detecting apparatus includes a light-transmitting mirror that pivots around a pivot shaft and reflects measuring light from a light source; a light-receiving mirror that pivots around the pivot shaft and reflects returning light from an object; and a light-receiving element that receives the returning light from the light-receiving mirror. When the light-transmitting mirror and the light-receiving mirror are at rest, a first mirror angle between a mirror surface of the light-receiving mirror and a direction from the pivot shaft to the light-receiving element is larger than a second mirror angle between a mirror surface of the light-transmitting mirror and the direction.
    Type: Application
    Filed: October 5, 2016
    Publication date: April 6, 2017
    Applicant: Funai Electric Co., Ltd.
    Inventors: Manabu Murayama, Yuichiro Masuda, Tomohisa Hirai
  • Publication number: 20160033626
    Abstract: A laser rangefinder includes a light source, a scanning mirror that scans laser light emitted from the light source by oscillating about an axis of oscillation J extending in a predetermined direction, a first lens that is disposed on an optical path of reflected light from a target object and condenses the reflected light onto the scanning mirror, a second lens that is disposed on an optical path of and condenses reflected light from the scanning mirror, and a photodetector that receives the reflected light condensed by the second lens. The first lens and the second lens are disposed in positions other than positions on an optical path of the laser light between a point of emission from the light source and a point of exit from the laser rangefinder.
    Type: Application
    Filed: July 31, 2015
    Publication date: February 4, 2016
    Inventors: Tomohisa HIRAI, Ryusuke HORIBE, Manabu MURAYAMA, Shingo SETONO, Yuichiro MASUDA, Atsushi MUSHIMOTO, Fumitoshi MATSUNO
  • Publication number: 20160033761
    Abstract: A scanner apparatus includes: a scanner having a mirror that is driven into resonance in a first direction; a scanner holder holding the scanner and rotatable about an axis extending in a direction parallel to the first direction; and a driver that oscillates the scanner holder, and the scanner holder includes: a first holding portion holding the scanner; a second holding portion connected to the first holding portion and holding the driver; a connecting portion connected to the second holding portion; and an elastic portion connected to the connecting portion and having elasticity.
    Type: Application
    Filed: July 29, 2015
    Publication date: February 4, 2016
    Inventors: Manabu MURAYAMA, Ryusuke HORIBE, Shingo SETONO, Tomohisa HIRAI, Yuichiro MASUDA, Atsushi MUSHIMOTO, Fumitoshi MATSUNO
  • Publication number: 20160018256
    Abstract: A laser scanner includes: a light source; a scanning mirror that scans laser light emitted from the light source, toward a target object by oscillating about axis C; a photodetector that generates a photodetection signal upon receiving the laser light reflected from the target object; a controller that controls emission of the laser light by the light source, and that performs sampling on the photodetection signal; and a detector that detects an amount of displacement of the scanning mirror, and calculates a resonant frequency of the scanning mirror based on the amount of displacement detected. The controller determines a time at which the laser light is emitted from the light source and a time at which sampling is performed on the photodetection signal, based on the resonant frequency calculated.
    Type: Application
    Filed: July 16, 2015
    Publication date: January 21, 2016
    Inventors: Atsushi MUSHIMOTO, Ryusuke HORIBE, Manabu MURAYAMA, Yuichiro MASUDA, Tomohisa HIRAI, Shingo SETONO
  • Publication number: 20160011311
    Abstract: A laser scanner includes a light source, a scanning mirror, and a first photodetector. The scanning mirror includes: a first reflective surface reflects the laser light from the light source; and a second reflective surface that reflects, toward the photodetector, the laser light reflected from the target object. The first reflective surface and at least part of the second reflective surface are disposed at mutually different angles. When a first optical axis passing through the target object and the first reflective surface is parallel with a second optical axis passing through the target object and the second reflective surface, a third optical axis passing through the first reflective surface and the light source and a fourth optical axis passing through the second reflective surface and the photodetector are at a predetermined angle relative to one another.
    Type: Application
    Filed: July 14, 2015
    Publication date: January 14, 2016
    Inventors: Atsushi MUSHIMOTO, Ryusuke HORIBE, Manabu MURAYAMA, Yuichiro MASUDA, Tomohisa HIRAI, Shingo SETONO, Fumitoshi MATSUNO
  • Patent number: 9236569
    Abstract: A storage element includes a first electrode and a second electrode separated by a gap and a dielectric layer provided between the first electrode and the second electrode to fill the gap. A separation distance of the gap changes in response to application of a voltage to a space between the first electrode and the second electrode, such that a switching phenomenon is produced which switches a resistance state between the first electrode and the second electrode between a high resistance state in which it is difficult for tunnel current to flow and a low resistance state in which it is easy for tunnel current to flow.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: January 12, 2016
    Assignee: Funai Electric Co., Ltd.
    Inventors: Shigeo Furuta, Yuichiro Masuda, Tsuyoshi Takahashi, Masatoshi Ono, Yutaka Hayashi, Taro Itaya, Yasuhisa Naitoh, Tetsuo Shimizu
  • Publication number: 20160003945
    Abstract: A laser rangefinder includes: a MEMS mirror that changes a traveling direction of laser light; a first photodetector that reflects a portion of the laser light directed in a predetermined direction by the MEMS mirror and receives another portion of the laser light; a second photodetector that receives first reflected light that is reflection of the laser light from a target object outside an enclosure and second reflected light that is reflection of the portion of the laser light from the first photodetector; and a signal processor that calculates a distance from the laser rangefinder to the target object by subtracting, from a first distance from the laser diode to the target object calculated using the first reflected light, a second distance from the laser diode to the first photodetector calculated using the second reflected light, and calculates a direction of the target object with respect to the laser rangefinder.
    Type: Application
    Filed: July 2, 2015
    Publication date: January 7, 2016
    Inventors: Shingo SETONO, Ryusuke HORIBE, Manabu MURAYAMA, Yuichiro MASUDA, Tomohisa HIRAI, Atsushi MUSHIMOTO, Fumitoshi MATSUNO
  • Publication number: 20150369920
    Abstract: An electronic apparatus includes a light source that outputs a laser light; a scanning unit that scans the laser light; a reflective member having a reflective surface that reflects the laser light; a light-receiving unit that receives a first reflected light reflected by the reflective member; and a signal processing unit that calculates a distance from the light source to the reflective surface using the first reflected light and determines a direction in which the laser light is output using the distance.
    Type: Application
    Filed: June 18, 2015
    Publication date: December 24, 2015
    Applicant: Funai Electric Co., Ltd.
    Inventors: Shingo Setono, Ryusuke Horibe, Manabu Murayama, Yuichiro Masuda, Tomohisa Hirai, Atsushi Mushimoto
  • Patent number: 9190145
    Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: November 17, 2015
    Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Patent number: 9135990
    Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: September 15, 2015
    Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Patent number: 9130159
    Abstract: Disclosed is a fabrication method of an element with nanogap electrodes including a first electrode, a second electrode provided above the first electrode, and a gap provided between the first electrode and the second electrode, the gap being in an order of nanometer to allow resistive state to be switched by applying a predetermined voltage between the first electrode and the second electrode, the method comprising: forming the first electrode; forming a spacer on an upper surface of the first electrode; forming the second electrode in contact with an upper surface of the spacer; and removing the spacer to form the gap.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: September 8, 2015
    Assignee: Funai Electric Co., Ltd.
    Inventors: Shigeo Furuta, Touru Sumiya, Yuichiro Masuda, Tsuyoshi Takahashi, Yutaka Hayashi, Masatoshi Ono
  • Publication number: 20150123069
    Abstract: A storage element includes a first electrode and a second electrode separated by a gap and a dielectric layer provided between the first electrode and the second electrode to fill the gap. A separation distance of the gap changes in response to application of a voltage to a space between the first electrode and the second electrode, such that a switching phenomenon is produced which switches a resistance state between the first electrode and the second electrode between a high resistance state in which it is difficult for tunnel current to flow and a low resistance state in which it is easy for tunnel current to flow.
    Type: Application
    Filed: October 28, 2014
    Publication date: May 7, 2015
    Inventors: Shigeo FURUTA, Yuichiro MASUDA, Tsuyoshi TAKAHASHI, Masatoshi ONO, Yutaka HAYASHI, Taro ITAYA, Yasuhisa NAITOH, Tetsuo SHIMIZU
  • Publication number: 20130170285
    Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.
    Type: Application
    Filed: August 25, 2011
    Publication date: July 4, 2013
    Applicants: National Institute of Advance Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Publication number: 20130155757
    Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.
    Type: Application
    Filed: August 25, 2011
    Publication date: June 20, 2013
    Applicants: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Patent number: 8395185
    Abstract: A switching element comprising: an insulative substrate; a first electrode and a second electrode provided on one surface of the insulative substrate; and an interelectrode gap which is provided between the first electrode and the second electrode, and which has a gap on the order of nanometers in which switching phenomenon of resistance occurs by applying predetermined voltage between the first electrode and the second electrode, wherein the one surface of the insulative substrate contains nitrogen.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: March 12, 2013
    Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Shigeo Furuta, Yuichiro Masuda, Tsuyoshi Takahashi, Masatoshi Ono, Yasuhisa Naitoh, Masayo Horikawa, Tetsuo Shimizu
  • Patent number: 8391046
    Abstract: Disclosed is a memory cell array including: word lines and first and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and a switching element formed inside a contact hole, the switching element includes first and second conductive layers and a gap in which a resistance value is changed by applying a predetermined voltage, each word line is connected to a gate electrode, each first bit line is connected to a second electrode, each second bit line is connected to the second conductive layer, and data is written by supplying a write voltage to the first bit line connected to the selected memory cell and specifying the word line connected to the memory cell, and data is read by supplying a read voltage to the first bit lines connected to the memory cell and specifying the word line connected to the memory cells.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: March 5, 2013
    Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Shigeo Furuta, Yuichiro Masuda, Masatoshi Ono
  • Patent number: 8174871
    Abstract: Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the word line, and specifying the first bit line to supply a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the voltage of the word line becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: May 8, 2012
    Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yutaka Hayashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono
  • Patent number: 8094484
    Abstract: Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the first bit line to connect it to the sense amplifier, specifying the word line and supplying a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the word line voltage becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: January 10, 2012
    Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yutaka Hayashi, Yuichiro Masuda, Shigeo Furuta, Masatoshi Ono
  • Patent number: 7990751
    Abstract: A nanogap switching element is equipped with an inter-electrode gap portion including a gap of a nanometer order between a first electrode and a second electrode. A switching phenomenon is caused in the inter-electrode gap portion by applying a voltage between the first and second electrodes. The nanogap switching element is shifted from its low resistance state to its high resistance state by receiving a voltage pulse application of a first voltage value, and shifted from its high resistance state to its low resistance state by receiving a voltage pulse application of a second voltage value lower than the first voltage value. When the nanogap switching element is shifted from the high resistance state to the low resistance state, a voltage pulse of an intermediate voltage value between the first and second voltage values is applied thereto before the voltage pulse application of the second voltage value thereto.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: August 2, 2011
    Assignees: Funai Electric Advanced Applied Technology Research Institute Inc., National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Yuichiro Masuda, Shigeo Furuta, Tsuyoshi Takahashi, Tetsuo Shimizu, Yasuhisa Naitoh, Masayo Horikawa
  • Publication number: 20100257726
    Abstract: Disclosed is a fabrication method of an element with nanogap electrodes including a first electrode, a second electrode provided above the first electrode, and a gap provided between the first electrode and the second electrode, the gap being in an order of nanometer to allow resistive state to be switched by applying a predetermined voltage between the first electrode and the second electrode, the method comprising: forming the first electrode; forming a spacer on an upper surface of the first electrode; forming the second electrode in contact with an upper surface of the spacer; and removing the spacer to form the gap.
    Type: Application
    Filed: April 8, 2010
    Publication date: October 14, 2010
    Applicants: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.
    Inventors: Shigeo FURUTA, Touru Sumiya, Yuichiro Masuda, Tsuyoshi Takahashi, Yutaka Hayashi, Masatoshi Ono