Patents by Inventor Yuichiro Yamashita

Yuichiro Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10535875
    Abstract: A positive electrode active material, which has a crystallite size ?/crystallite size ? ratio (?/?) of 1 to 1.75 or less, wherein the crystallite size ? is within a peak region of 2?=18.7±1° and the crystallite size ? is within a peak region of 2?=44.6±1°, each determined by a powder X-ray diffraction measurement using Cu-K? ray, and has a composition represented by formula (I) below: Li[Lix(NiaCobMncMd)1-x]O2??(I) wherein 0?x?0.2, 0.3<a<0.7, 0<b<0.4, 0<c<0.4, 0?d<0.1, a+b+c+d=1, and M is at least one metal selected from the group consisting of Fe, Cr, Ti, Mg, Al and Zr.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: January 14, 2020
    Assignees: SUMITOMO CHEMICAL COMPANY, LIMITED, TANAKA CHEMICAL CORPORATION
    Inventors: Kenji Takamori, Hiroyuki Kurita, Yuichiro Imanari, Daisuke Yamashita, Kimiyasu Nakao, Kyousuke Doumae
  • Patent number: 10510789
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an image sensor. The method includes implanting a dopant into a substrate to form a doped region and implanting one or more additional dopants into the substrate to form an image sensing element between the doped region and a front-side of the substrate. The doped region directly contacts a boundary of the image sensing element that is furthest from the front-side of the substrate. The method further includes etching the substrate to form one or more trenches extending into a back-side of the substrate. The back-side of the substrate opposes the front-side of the substrate. The method further includes filling the one or more trenches with one or more dielectric materials to form isolation structures.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Jhy-Jyi Sze, Shyh-Fann Ting, Tzu-Jui Wang, Yen-Ting Chiang, Yu-Jen Wang, Yuichiro Yamashita
  • Patent number: 10504947
    Abstract: An image sensor includes a semiconductor substrate having first and second faces. The sensor includes a plurality of pixel groups each including pixels, each pixel having a photoelectric converter and a wiring pattern, the converter including a region whose major carriers are the same with charges to be accumulated in the photoelectric converter. The sensor also includes a microlenses which are located so that one microlens is arranged for each pixel group. The wiring patterns are located at a side of the first face, and the plurality of microlenses are located at a side of the second face. Light-incidence faces of the regions of the photoelectric converters of each pixel group are arranged along the second face such that the light-incidence faces are apart from each other in a direction along the second face.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: December 10, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaaki Minowa, Hidekazu Takahashi, Yuichiro Yamashita, Akira Okita
  • Publication number: 20190355775
    Abstract: An image sensor is disclosed. The image sensor includes: a common node heavily doped with dopants of a first conductivity type, the common node being within the substrate and abutting the front surface of the substrate; and a sensing node heavily doped with dopants of a second conductivity type opposite to the first conductivity type, the sensing node being within the substrate and abutting the front surface of the substrate; an interconnect structure, wherein the front surface of the substrate faces the interconnect structure; a distributed Bragg reflector (DBR) between the front surface of the substrate and the interconnect structure; a first contact plug passing through the DBR and coupling the common node to the interconnect structure; and a second contact plug passing through the DBR and coupling the sensing node to the interconnect structure.
    Type: Application
    Filed: August 1, 2019
    Publication date: November 21, 2019
    Inventor: YUICHIRO YAMASHITA
  • Patent number: 10476613
    Abstract: An inspection terminal measures a wireless quality of a host machine during inspection of an object to be inspected, and acquires performance measurement data indicative of the wireless quality. An environment measuring device measures a radio wave intensity in the vicinity of the host machine during inspection of the object to be inspected, and acquires environment measurement data indicative of the radio wave intensity. A movable body (vehicle) which is the object to be inspected, or a movable body that transports the object to be inspected, moves together with the inspection terminal and the environment measuring device, through execution points of a plurality of inspection processes performed within an inspection area. A LET server associates the performance measurement data and the environment measurement data with measurement times and/or the inspection processes.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: November 12, 2019
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Yuichiro Ikeda, Kanata Yamashita, Masaaki Kawamata
  • Patent number: 10418398
    Abstract: A solid-state image pickup apparatus includes a photoelectric conversion unit, a charge storage unit, and a floating diffusion unit, all disposed on a semiconductor substrate. The solid-state image pickup apparatus further includes a first gate electrode disposed on the semiconductor substrate and extending between the photoelectric conversion unit and charge storage unit, and a second gate electrode disposed on the semiconductor substrate and extending between the charge storage unit and the floating diffusion unit. The solid-state image pickup apparatus further includes a light shielding member including a first part and a second part, wherein the first part is disposed over the charge storage unit and at least over the first gate electrode or the second gate electrode, and the second part is disposed between the first gate electrode and the second gate electrode such that the second part extends from the first part toward a surface of the semiconductor substrate.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: September 17, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Yuichiro Yamashita, Yusuke Onuki
  • Patent number: 10373999
    Abstract: An image sensor is disclosed. The image sensor includes: a common node heavily doped with dopants of a first conductivity type, the common node being within the substrate and abutting the front surface of the substrate; and a sensing node heavily doped with dopants of a second conductivity type opposite to the first conductivity type, the sensing node being within the substrate and abutting the front surface of the substrate; an interconnect structure, wherein the front surface of the substrate faces the interconnect structure; a distributed Bragg reflector (DBR) between the front surface of the substrate and the interconnect structure; a first contact plug passing through the DBR and coupling the common node to the interconnect structure; and a second contact plug passing through the DBR and coupling the sensing node to the interconnect structure.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: August 6, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Yuichiro Yamashita
  • Patent number: 10373993
    Abstract: A solid-state image pickup apparatus includes a photoelectric conversion unit, a charge storage unit, and a floating diffusion unit, all disposed on a semiconductor substrate. The solid-state image pickup apparatus further includes a first gate electrode disposed on the semiconductor substrate and extending between the photoelectric conversion unit and charge storage unit, and a second gate electrode disposed on the semiconductor substrate and extending between the charge storage unit and the floating diffusion unit. The solid-state image pickup apparatus further includes a light shielding member including a first part and a second part, wherein the first part is disposed over the charge storage unit and at least over the first gate electrode or the second gate electrode, and the second part is disposed between the first gate electrode and the second gate electrode such that the second part extends from the first part toward a surface of the semiconductor substrate.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: August 6, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Yuichiro Yamashita, Yusuke Onuki
  • Publication number: 20190214415
    Abstract: In a photoelectric conversion apparatus including charge storing portions in its imaging region, isolation regions for the charge storing portions include first isolation portion each having a PN junction, and second isolation portions each having an insulator. A second isolation portion is arranged between a charge storing portion and at least a part of a plurality of transistors.
    Type: Application
    Filed: March 18, 2019
    Publication date: July 11, 2019
    Inventors: Masahiro Kobayashi, Yuichiro Yamashita
  • Publication number: 20190214414
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an image sensor. The method includes implanting a dopant into a substrate to form a doped region and implanting one or more additional dopants into the substrate to form an image sensing element between the doped region and a front-side of the substrate. The doped region directly contacts a boundary of the image sensing element that is furthest from the front-side of the substrate. The method further includes etching the substrate to form one or more trenches extending into a back-side of the substrate. The back-side of the substrate opposes the front-side of the substrate. The method further includes filling the one or more trenches with one or more dielectric materials to form isolation structures.
    Type: Application
    Filed: March 13, 2019
    Publication date: July 11, 2019
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Jhy-Jyi Sze, Shyh-Fann Ting, Tzu-Jui Wang, Yen-Ting Chiang, Yu-Jen Wang, Yuichiro Yamashita
  • Patent number: 10297824
    Abstract: Provided is a positive electrode active material which is useful for a lithium secondary battery having a battery resistance lower than that of the conventional positive electrode active material below freezing point. The positive electrode active material for a lithium secondary battery contains at least one element selected from a group consisting of nickel, cobalt and manganese, the positive electrode active material having a layered structure and satisfying all of the following requirements (1) to (3): (1) a primary particle size is 0.1 ?m to 1 ?m and a secondary particle size is 1 ?m to 10 ?m; (2) in an X-ray powder diffraction measurement using CuK? radiation, a crystallite size in the peak within 2?=18.7±1° is 100 ? to 1200 ? and a crystallite size in the peak within 2?=44.6±1° is 100 ? to 700 ?; and (3) in a pore distribution obtained by a mercury intrusion method, a pore peak exists in a range where the pore size is 10 nm to 200 nm and a pore volume in the said range is 0.01 cm3/g to 0.05 cm3/g.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: May 21, 2019
    Assignees: Tanaka Chemical Corporation, Sumitomo Chemical Company, Limited
    Inventors: Yasutaka Iida, Daisuke Yamashita, Takaaki Masukawa, Hiroyuki Ito, Hiroyuki Kurita, Kenji Takamori, Yuichiro Imanari
  • Publication number: 20190139999
    Abstract: An image sensor is disclosed. The image sensor includes an epitaxial layer, a plurality of plug structures and an interconnect structure. Wherein the plurality of plug structures are formed in the epitaxial layer, and each plug structure has doped sidewalls, the epitaxial layer and the doped sidewalls form a plurality of photodiodes, the plurality of plug structures are used to separate adjacent photodiodes, and the epitaxial layer and the doped sidewalls are coupled to the interconnect structure via the plug structures. An associated method of fabricating the image sensor is also disclosed. The method includes: providing a substrate having a first-type doped epitaxial substrate layer on a second-type doped epitaxial substrate layer; forming a plurality of isolation trenches in the first-type doped epitaxial substrate layer; forming a second-type doped region along sidewalls and bottoms of the plurality of isolation trenches; and filling the plurality of isolation trenches by depositing metal.
    Type: Application
    Filed: January 7, 2019
    Publication date: May 9, 2019
    Inventors: ALEXANDER KALNITSKY, JHY-JYI SZE, DUN-NIAN YAUNG, CHEN-JONG WANG, YIMIN HUANG, YUICHIRO YAMASHITA
  • Patent number: 10283546
    Abstract: In a photoelectric conversion apparatus including charge storing portions in its imaging region, isolation regions for the charge storing portions include first isolation portion each having a PN junction, and second isolation portions each having an insulator. A second isolation portion is arranged between a charge storing portion and at least a part of a plurality of transistors.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: May 7, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Yuichiro Yamashita
  • Publication number: 20190131478
    Abstract: A single photon avalanche diode (SPAD) image sensor is disclosed. The SPAD image sensor include: a substrate of a first conductivity type, the substrate having a front surface and a back surface; a deep trench isolation (DTI) extending from the front surface toward the back surface of the substrate, the DTI having a first surface and a second surface opposite to the first surface, the first surface being level with the front surface of the substrate; an epitaxial layer of a second conductivity type opposite to the first conductivity type, the epitaxial layer surrounding sidewalls and the second surface of the DTI; and an implant region of the first conductivity type extending from the front surface to the back surface of the substrate. An associated method for fabricating the SPAD image sensor is also disclosed.
    Type: Application
    Filed: January 17, 2018
    Publication date: May 2, 2019
    Inventors: TZU-JUI WANG, JHY-JYI SZE, YUICHIRO YAMASHITA, KUO-CHIN HUANG
  • Patent number: 10276618
    Abstract: The present disclosure, in some embodiments, relates to a CMOS image sensor. The CMOS image sensor has an image sensing element disposed within a substrate. A plurality of isolation structures are arranged along a back-side of the substrate and are separated from opposing sides of the image sensing element by non-zero distances. A doped region is laterally arranged between the plurality of isolation structures. The doped region is also vertically arranged between the image sensing element and the back-side of the substrate. The doped region physically contacts the image sensing element.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Jhy-Jyi Sze, Shyh-Fann Ting, Tzu-Jui Wang, Yen-Ting Chiang, Yu-Jen Wang, Yuichiro Yamashita
  • Patent number: 10269854
    Abstract: A stacked image sensor with a rerouting layer is provided for a high readout rate and a high functionality per footprint area. A pixel chip is arranged over a logic chip. The pixel chip and the logic chip respectively comprise a pixel sensor array and a readout circuit array. A first conductive feature array is arranged under and electrically coupled to the pixel sensor array. The first conductive feature array has a first pitch. A second conductive feature array is arranged over and electrically coupled to the readout circuit array. The second conductive feature array has a second pitch different than the first pitch. The rerouting layer is arranged between the first and second conductive feature arrays. The rerouting layer electrically couples the first conductive feature array to the second conductive feature array while translating between the first and second pitches. A method for manufacturing the stacked image sensor is also provided.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Yuichiro Yamashita
  • Publication number: 20190109164
    Abstract: Methods for forming an image sensor structure are provided. The method includes forming a light-sensing region in a substrate and forming a storage node adjacent to light-sensing region in the substrate. The method further includes forming a front side isolation structure partially surrounding an upper portion of the light-sensing region and forming a trench fully surrounding a bottom portion of the light-sensing region to expose a bottom surface of the front side isolations structure. The method further includes forming a backside isolation structure in the trench.
    Type: Application
    Filed: November 27, 2018
    Publication date: April 11, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yuichiro YAMASHITA, Chun-Hao CHUANG, Hirofumi SUMI
  • Publication number: 20190103433
    Abstract: An image sensor is disclosed. The image sensor includes: a common node heavily doped with dopants of a first conductivity type, the common node being within the substrate and abutting the front surface of the substrate; and a sensing node heavily doped with dopants of a second conductivity type opposite to the first conductivity type, the sensing node being within the substrate and abutting the front surface of the substrate; an interconnect structure, wherein the front surface of the substrate faces the interconnect structure; a distributed Bragg reflector (DBR) between the front surface of the substrate and the interconnect structure; a first contact plug passing through the DBR and coupling the common node to the interconnect structure; and a second contact plug passing through the DBR and coupling the sensing node to the interconnect structure.
    Type: Application
    Filed: February 23, 2018
    Publication date: April 4, 2019
    Inventor: YUICHIRO YAMASHITA
  • Publication number: 20190103504
    Abstract: A single photon avalanche diode (SPAD) image sensor is disclosed. The SPAD image sensor includes: a substrate having a front surface and a back surface; wherein the substrate includes a sensing region, and the sensing region includes: a common node heavily doped with dopants of a first conductivity type, the common node being within the substrate and abutting the back surface of the substrate; a sensing node heavily doped with dopants of a second conductivity type opposite to the first conductivity type, the sensing node being within the substrate and abutting the front surface of the substrate; and a first layer doped with dopants of the first conductivity type between the common node and the sensing node.
    Type: Application
    Filed: February 14, 2018
    Publication date: April 4, 2019
    Inventor: YUICHIRO YAMASHITA
  • Patent number: 10204950
    Abstract: A single photon avalanche diode (SPAD) image sensor is disclosed. The SPAD image sensor includes: a substrate having a front surface and a back surface; a trench isolation in the substrate, the trench isolation extending from the front surface of the substrate toward the back surface of the substrate, the trench isolation having a first surface and a second surface opposite to the first surface, the first surface being coplanar with the front surface of the substrate, the second surface being distanced from the back surface of the substrate by a distance greater than 0; wherein the substrate includes: a first layer doped with dopants of a first conductivity type, the first layer extending from the back surface of the substrate toward the trench isolation and laterally surrounding at least a portion of sidewalls of the trench isolation.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Yuichiro Yamashita