Patents by Inventor Yuji Asano
Yuji Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170309905Abstract: Provided is a method for manufacturing a power storage device in which a crystalline silicon layer including a whisker-like crystalline silicon region is formed as an active material layer over a current collector by a low-pressure CVD method in which heating is performed using a deposition gas containing silicon. The power storage device includes the current collector, a mixed layer formed over the current collector, and the crystalline silicon layer functioning as the active material layer formed over the mixed layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions which project over the crystalline silicon region.Type: ApplicationFiled: June 16, 2017Publication date: October 26, 2017Inventors: Kazutaka KURIKI, Mikio YUKAWA, Yuji ASANO
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Publication number: 20170243899Abstract: To provide a semiconductor device with excellent electrical characteristics or a semiconductor device with stable electrical characteristics. A semiconductor device includes a first transistor, a second transistor, a first insulator, a second insulator, a first wiring, and a first plug. The first transistor includes silicon. The second transistor includes an oxide semiconductor. The first insulator is located over the first transistor. The second insulator is located over the first insulator. The second transistor is located over the second insulator. The first wiring is located over the second insulator and the first plug. The first transistor and the second transistor are electrically connected to each other through the first wiring and the first plug. The first wiring has low hydrogen permeability. The hydrogen permeability of the second insulator is lower than the hydrogen permeability of the first insulator.Type: ApplicationFiled: May 10, 2017Publication date: August 24, 2017Inventors: Hidekazu MIYAIRI, Yuichi SATO, Yuji ASANO, Tetsunori MARUYAMA, Tatsuya ONUKI, Shuhei NAGATSUKA
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Patent number: 9704976Abstract: An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. The thin film transistor is formed in such a manner that a buffer layer including a high-resistance region and low-resistance regions is formed over an oxide semiconductor layer, and the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the low-resistance region of the buffer layer interposed therebetween.Type: GrantFiled: October 19, 2015Date of Patent: July 11, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuji Asano, Junichi Koezuka
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Patent number: 9698288Abstract: In order to improve the photoelectric conversion efficiency of a photoelectric conversion device, this photoelectric conversion device is provided with an electrode layer, a first semiconductor layer that is positioned on the electrode layer and contains a polycrystalline semiconductor, and a second semiconductor layer that is positioned on/above the first semiconductor layer and forms a p-n junction with the first semiconductor layer, and an average grain diameter of crystal grains in the first semiconductor layer is larger near the surface on the electrode layer side of the first semiconductor layer than the center of the first semiconductor layer in a thickness direction of the first semiconductor layer. Furthermore, the average grain diameter of the crystal grains in the first semiconductor layer is larger in a surface portion on the second semiconductor layer side of the first semiconductor layer than in the central portion.Type: GrantFiled: December 25, 2012Date of Patent: July 4, 2017Assignee: KYOCERA CorporationInventors: Yusuke Miyamichi, Tatsuya Domoto, Yuji Asano, Rui Kamada
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Patent number: 9685275Abstract: Provided is a method for manufacturing a power storage device in which a crystalline silicon layer including a whisker-like crystalline silicon region is formed as an active material layer over a current collector by a low-pressure CVD method in which heating is performed using a deposition gas containing silicon. The power storage device includes the current collector, a mixed layer formed over the current collector, and the crystalline silicon layer functioning as the active material layer formed over the mixed layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions which project over the crystalline silicon region. With the protrusions, the surface area of the crystalline silicon layer functioning as the active material layer can be increased.Type: GrantFiled: April 18, 2011Date of Patent: June 20, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazutaka Kuriki, Mikio Yukawa, Yuji Asano
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Patent number: 9685664Abstract: A fuel cell stack includes fuel cells, a reactant gas channel, a reactant gas inlet manifold, a reactant gas outlet manifold, an inlet buffer portion, and an outlet buffer portion. A reactant gas flows through the reactant gas channel along a surface of a separator. The reactant gas flows through the reactant gas inlet manifold and the reactant gas outlet manifold in a stacking direction. The inlet buffer portion connects an inlet of the reactant gas channel to the reactant gas inlet manifold. The inlet buffer portion includes linear inlet guide protrusions. Inlet guide channels are provided between the linear inlet guide protrusions and connect the reactant gas inlet manifold to the reactant gas channel. A pitch between the linear inlet guide protrusions increases in accordance with an increase in a distance from the reactant gas inlet manifold to the linear inlet guide protrusions.Type: GrantFiled: January 8, 2015Date of Patent: June 20, 2017Assignee: HONDA MOTOR CO., LTD.Inventors: Kenji Nagumo, Kentaro Ishida, Keisuke Suda, Yuji Asano, Akihiro Matsui
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Patent number: 9673458Abstract: A fuel cell includes a membrane electrode assembly, a separator, a fluid channel, a fluid manifold, a plurality of protruding elastic members, and a plurality of sealing members. A fluid is to flow in a stacking direction through the fluid manifold. A connection channel is provided between the plurality of protruding elastic members to connect the fluid channel and the fluid manifold. The plurality of sealing members are provided adjacent to the plurality of protruding elastic members in the stacking direction and extend in a direction to cross a flow direction in which the fluid flows along the connection channel. Each of the plurality of protruding elastic members has overlapping regions that overlap the plurality of sealing members as seen from the stacking direction. The overlapping regions are separated from each other in the flow direction.Type: GrantFiled: February 27, 2014Date of Patent: June 6, 2017Assignee: HONDA MOTOR CO., LTD.Inventors: Takeshi Ushio, Syuji Sato, Masaru Oda, Yuji Asano, Koji Moriyama
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Patent number: 9653479Abstract: To provide a semiconductor device with excellent electrical characteristics or a semiconductor device with stable electrical characteristics. A semiconductor device includes a first transistor, a second transistor, a first insulator, a second insulator, a first wiring, and a first plug. The first transistor includes silicon. The second transistor includes an oxide semiconductor. The first insulator is located over the first transistor. The second insulator is located over the first insulator. The second transistor is located over the second insulator. The first wiring is located over the second insulator and the first plug. The first transistor and the second transistor are electrically connected to each other through the first wiring and the first plug. The first wiring has low hydrogen permeability. The hydrogen permeability of the second insulator is lower than the hydrogen permeability of the first insulator.Type: GrantFiled: March 16, 2016Date of Patent: May 16, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Yuichi Sato, Yuji Asano, Tetsunori Maruyama, Tatsuya Onuki, Shuhei Nagatsuka
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Publication number: 20170067130Abstract: According to an embodiment, an induction heating coil includes a heating conductor portion which is formed of a conductor member and has a zigzag shape in which a bent portion opened to one side in a first direction and a bent portion opened to the other side in the first direction are alternately continuously arranged in opposite directions along a second direction crossing the first directionType: ApplicationFiled: November 17, 2016Publication date: March 9, 2017Applicant: Neturen Co., Ltd.Inventors: Yoshimasa Tanaka, Yoshitaka Misaka, Yuji Asano
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Publication number: 20170025448Abstract: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.Type: ApplicationFiled: October 5, 2016Publication date: January 26, 2017Inventors: Jun KOYAMA, Junichiro SAKATA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Junichi KOEZUKA
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Patent number: 9534267Abstract: According to an embodiment, an induction heating coil includes a heating conductor portion which is formed of a conductor member and has a zigzag shape in which a bent portion opened to one side in a first direction and a bent portion opened to the other side in the first direction are alternately continuously arranged in opposite directions along a second direction crossing the first direction.Type: GrantFiled: January 27, 2012Date of Patent: January 3, 2017Assignee: Neturen Co., Ltd.Inventors: Yoshimasa Tanaka, Yoshitaka Misaka, Yuji Asano
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Publication number: 20160358950Abstract: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.Type: ApplicationFiled: August 22, 2016Publication date: December 8, 2016Inventors: Jun KOYAMA, Junichiro SAKATA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Junichi KOEZUKA
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Publication number: 20160300952Abstract: A minute transistor is provided. A semiconductor device includes a semiconductor over a substrate, a first conductor and a second conductor over the semiconductor, a first insulator over the first conductor and the second conductor, a second insulator over the semiconductor, a third insulator over the second insulator, and a third conductor over the third insulator. The third insulator is in contact with a side surface of the first insulator. The semiconductor includes a first region where the semiconductor overlaps with a bottom surface of the first conductor, a second region where the semiconductor overlaps with a bottom surface of the second conductor, and a third region where the semiconductor overlaps with a bottom surface of the third conductor. The length between a top surface of the semiconductor and the bottom surface of the third conductor is longer than the length between the first region and the third region.Type: ApplicationFiled: April 5, 2016Publication date: October 13, 2016Inventors: Satoshi TORIUMI, Takashi HAMADA, Tetsunori MARUYAMA, Yuki IMOTO, Yuji ASANO, Ryunosuke HONDA, Shunpei YAMAZAKI
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Publication number: 20160276370Abstract: To provide a semiconductor device with excellent electrical characteristics or a semiconductor device with stable electrical characteristics. A semiconductor device includes a first transistor, a second transistor, a first insulator, a second insulator, a first wiring, and a first plug. The first transistor includes silicon. The second transistor includes an oxide semiconductor. The first insulator is located over the first transistor. The second insulator is located over the first insulator. The second transistor is located over the second insulator. The first wiring is located over the second insulator and the first plug. The first transistor and the second transistor are electrically connected to each other through the first wiring and the first plug. The first wiring has low hydrogen permeability. The hydrogen permeability of the second insulator is lower than the hydrogen permeability of the first insulator.Type: ApplicationFiled: March 16, 2016Publication date: September 22, 2016Inventors: Hidekazu MIYAIRI, Yuichi SATO, Yuji ASANO, Tetsunori MARUYAMA, Tatsuya ONUKI, Shuhei NAGATSUKA
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Patent number: 9443888Abstract: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.Type: GrantFiled: August 18, 2014Date of Patent: September 13, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Jun Koyama, Junichiro Sakata, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Junichi Koezuka
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Patent number: 9419113Abstract: An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. A thin film transistor using an oxide semiconductor layer is formed in such a manner that buffer layers having higher conductivity than the oxide semiconductor layer are formed over the oxide semiconductor layer, source and drain electrode layers are formed over the buffer layers, and the oxide semiconductor layer is electrically connected to the source and drain electrode layers with the buffer layers interposed therebetween. In addition, the buffer layers are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere, whereby the buffer layers having higher conductivity than the oxide semiconductor layer are obtained.Type: GrantFiled: October 13, 2015Date of Patent: August 16, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuji Asano, Junichi Koezuka
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Patent number: 9331344Abstract: A power generation unit of a fuel cell stack includes a first metal separator, a first membrane electrode assembly, a second metal separator, a second membrane electrode assembly, and a third metal separator. A first oxygen-containing gas flow field includes a plurality of wavy flow grooves. An outlet merging area is provided at the end of the wavy flow grooves on the outlet side. The outlet merging area is connected to a plurality of straight connection flow grooves. The groove depth of the straight connection flow grooves is smaller than the groove depth of the wavy flow grooves.Type: GrantFiled: November 11, 2014Date of Patent: May 3, 2016Assignee: Honda Motor Co., Ltd.Inventors: Yuji Asano, Shuji Sato, Kenji Nagumo, Kentaro Ishida, Naoki Yamano
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Publication number: 20160043201Abstract: An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. The thin film transistor is formed in such a manner that a buffer layer including a high-resistance region and low-resistance regions is formed over an oxide semiconductor layer, and the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the low-resistance region of the buffer layer interposed therebetween.Type: ApplicationFiled: October 19, 2015Publication date: February 11, 2016Inventors: Yuji ASANO, Junichi KOEZUKA
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Publication number: 20160035866Abstract: An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. A thin film transistor using an oxide semiconductor layer is formed in such a manner that buffer layers having higher conductivity than the oxide semiconductor layer are formed over the oxide semiconductor layer, source and drain electrode layers are formed over the buffer layers, and the oxide semiconductor layer is electrically connected to the source and drain electrode layers with the buffer layers interposed therebetween. In addition, the buffer layers are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere, whereby the buffer layers having higher conductivity than the oxide semiconductor layer are obtained.Type: ApplicationFiled: October 13, 2015Publication date: February 4, 2016Inventors: Yuji ASANO, Junichi KOEZUKA
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Patent number: 9202827Abstract: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.Type: GrantFiled: December 18, 2009Date of Patent: December 1, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Jun Koyama, Junichiro Sakata, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Junichi Koezuka