Patents by Inventor Yuji Komatsu

Yuji Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072030
    Abstract: A semiconductor power module for an electrical axle drive in an electric vehicle and/or a hybrid vehicle includes a plurality of semiconductor switching elements for generating an output current on the basis of an input current provided by a voltage source by switching the semiconductor switching elements comprising a plurality of diodes which each have an anode and a cathode, a first leadframe, and a second leadframe having a plurality of conductor tracks for electrically connecting the semiconductor switching elements to form a half-bridge having a high side and a low side, wherein the first leadframe is assigned to the high side and the second leadframe is assigned to the low side, wherein electrical contact is made with the diodes between the first leadframe and the second leadframe so that the anode of the diodes faces a cooler mechanically connected and thermally coupled to the semiconductor power module.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 29, 2024
    Applicant: ZF Friedrichshafen AG
    Inventors: Yuji Komatsu, Florian Wilhelmi
  • Patent number: 10861694
    Abstract: A method of manufacturing an insulation layer on silicon carbide includes first preparing a surface of the silicon carbide, then forming a first part of the insulation layer on the surface at a temperature lower than 400° Celsius. Finally, a second part of the insulation layer is formed by depositing a dielectric film on the first part. The surface of the silicon carbide is illuminated by a light at a wavelength below and/or equal to 450 nm during and/or after the formation of the first part of the insulation layer.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: December 8, 2020
    Assignee: ZF FRIEDRICHSHAFEN AG
    Inventor: Yuji Komatsu
  • Patent number: 10580922
    Abstract: Method of providing a boron doped region (8, 8a, 8b) in a silicon substrate (1), includes the steps of: (a) depositing a boron doping source (6) over a first surface (2) of the substrate (1); (b) annealing the substrate (1) for diffusing boron from the boron doping source (6) into the first surface (2), thereby yielding a boron doped region; (c) removing the boron doping source (6) from at least part of the first surface (2); (d) depositing undoped silicon oxide (10) over the first surface (2); and (e) annealing the substrate (1) for lowering a peak concentration of boron in the boron doped region (8, 8a) through boron absorption by the undoped silicon oxide. The silicon oxide (10) acts as a boron absorber to obtain the desired concentration of the boron doped region (8).
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 3, 2020
    Assignee: NEDERLANDSE ORGANISATIE VOOR TOEGEPAST-NATUURWETENSCHAPPELIJK ONDERZOEK TNO
    Inventors: Yuji Komatsu, John Anker, Paul Cornelis Barton, Ingrid Gerdina Romijn
  • Publication number: 20200027716
    Abstract: A method of manufacturing an insulation layer on a silicon carbide substrate, the method including preparing a surface of a silicon carbide substrate, forming a first part of an insulation layer on the surface of the silicon carbide substrate at a temperature below 400° Celsius, and forming a second part of the insulation layer by depositing a dielectric film on the first part of the insulation layer.
    Type: Application
    Filed: August 8, 2017
    Publication date: January 23, 2020
    Inventor: Yuji Komatsu
  • Publication number: 20190371601
    Abstract: A method of manufacturing an insulation layer on silicon carbide includes first preparing a surface of the silicon carbide, then forming a first part of the insulation layer on the surface at a temperature lower than 400° Celsius. Finally, a second part of the insulation layer is formed by depositing a dielectric film on the first part. The surface of the silicon carbide is illuminated by a light at a wavelength below and/or equal to 450 nm during and/or after the formation of the first part of the insulation layer.
    Type: Application
    Filed: December 21, 2017
    Publication date: December 5, 2019
    Inventor: Yuji Komatsu
  • Patent number: 9871151
    Abstract: Known photovoltaic cells with wrap through connections have output terminals of both polarities on its back surface, one of which is coupled to the front surface via the wrap through connections. The invented solar cell is manufactured by creating an emitter layer on the back surface. Electrode material is applied in mutually separate first and second areas on the back surface. The electrode material in the first area contacts the emitter. The second area covers a surrounding of a hole that provides for the connection on the back surface. The electrode material in the second area lies on the emitter and around the second area the emitter is interrupted by a trench. On the front surface a further area of electrode material is applied over the hole. If necessary the electrode material in the second area on the back surface is applied on a supporting surface that is substantially electrically isolated from current flowing laterally through the emitter layer underneath the first area.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: January 16, 2018
    Assignee: STICHTING ENERGIEONDERZOEK CENTRUM NEDERLAND
    Inventors: Yu Wu, Lambert Johan Geerligs, Johannes Adrianus Maria van Roosmalen, Yuji Komatsu, Nicolas Guillevin
  • Publication number: 20150357499
    Abstract: Method of providing a boron doped region (8, 8a, 8b) in a silicon substrate (1), includes the steps of: (a) depositing a boron doping source (6) over a first surface (2) of the substrate (1); (b) annealing the substrate (1) for diffusing boron from the boron doping source (6) into the first surface (2), thereby yielding a boron doped region; (c) removing the boron doping source (6) from at least part of the first surface (2); (d) depositing undoped silicon oxide (10) over the first surface (2); and (e) annealing the substrate (1) for lowering a peak concentration of boron in the boron doped region (8, 8a) through boron absorption by the undoped silicon oxide. The silicon oxide (10) acts as a boron absorber to obtain the desired concentration of the boron doped region (8).
    Type: Application
    Filed: January 9, 2014
    Publication date: December 10, 2015
    Inventors: Yuji KOMATSU, John ANKER, Paul Cornelis BARTON, Ingrid Gerdina ROMIJN
  • Publication number: 20140174525
    Abstract: Known photovoltaic cells with wrap through connections have output terminals of both polarities on its back surface, one of which is coupled to the front surface via the wrap through connections. The invented solar cell is manufactured by creating an emitter layer on the back surface. Electrode material is applied in mutually separate first and second areas on the back surface. The electrode material in the first area contacts the emitter. The second area covers a surrounding of a hole that provides for the connection on the back surface. The electrode material in the second area lies on the emitter and around the second area the emitter is interrupted by a trench. On the front surface a further area of electrode material is applied over the hole. If necessary the electrode material in the second area on the back surface is applied on a supporting surface that is substantially electrically isolated from current flowing laterally through the emitter layer underneath the first area.
    Type: Application
    Filed: July 2, 2012
    Publication date: June 26, 2014
    Applicant: Stichting Energieonderzoek Cenrum Nederland
    Inventors: Yu Wu, Lambert Johan Geerligs, Johannes Adrianus Maria Van Roosmalen, Yuji Komatsu, Nicolas Guillevin
  • Patent number: 8709853
    Abstract: The present invention provides a method of manufacturing a crystalline silicon solar cell, comprising: —providing a crystalline silicon substrate having a front side and a back side; —forming a thin silicon oxide film on at least one of the front and the back side by soaking the crystalline silicon substrate in a chemical solution; —forming a dielectric coating film on the thin silicon oxide film on at least one of the front and the back side. The thin silicon oxide film may be formed with a thickness of 0.5-10 nm. By forming a oxide layer using a chemical solution, it is possible to form a thin oxide film for surface passivation wherein the relatively low temperature avoids deterioration of the semiconductor layers.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: April 29, 2014
    Assignee: ECN Energieonderzoek Centrum Nederland
    Inventors: Yuji Komatsu, Lambert Johan Geerligs, Valentin Dan Mihailetchi
  • Patent number: 8445312
    Abstract: A method of manufacturing a crystalline silicon solar cell, subsequently including: providing a crystalline silicon substrate having a first side and a second side opposite the first side; pre-diffusing Phosphorus into a first side of the substrate to render a Phosphorus diffused layer having an initial depth; blocking the first side of the substrate; exposing a second side of the substrate to a Boron diffusion source; heating the substrate for a certain period of time and to a certain temperature so as to diffuse Boron into the second side of the substrate and to simultaneously diffuse the Phosphorus further into the substrate.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: May 21, 2013
    Assignee: Stichting Energieonderzoek Centrum Nederland
    Inventors: Valentin Dan Mihailetchi, Yuji Komatsu
  • Publication number: 20100319771
    Abstract: A method of manufacturing a crystalline silicon solar cell, subsequently including: providing a crystalline silicon substrate having a first side and a second side opposite the first side; pre-diffusing Phosphorus into a first side of the substrate to render a Phosphorus diffused layer having an initial depth; blocking the first side of the substrate; exposing a second side of the substrate to a Boron diffusion source; heating the substrate for a certain period of time and to a certain temperature so as to diffuse Boron into the second side of the substrate and to simultaneously diffuse the Phosphorus further into the substrate.
    Type: Application
    Filed: November 13, 2008
    Publication date: December 23, 2010
    Applicant: STICHTING ENERGIEONDERZOEK CENTRUM NEDERLAND
    Inventors: Valentin Dan Mihailetchi, Yuji Komatsu
  • Publication number: 20100154883
    Abstract: The present invention provides a method of manufacturing a crystalline silicon solar cell, comprising: —providing a crystalline silicon substrate having a front side and a back side; —forming a thin silicon oxide film on at least one of the front and the back side by soaking the crystalline silicon substrate in a chemical solution; —forming a dielectric coating film on the thin silicon oxide film on at least one of the front and the back side. The thin silicon oxide film may be formed with a thickness of 0.5-10 nm. By forming a oxide layer using a chemical solution, it is possible to form a thin oxide film for surface passivation wherein the relatively low temperature avoids deterioration of the semiconductor layers.
    Type: Application
    Filed: September 20, 2007
    Publication date: June 24, 2010
    Applicant: ECN ENERGIEONDERZOEK CENTRUM NEDERLAND
    Inventors: Yuji Komatsu, Lambert Johan Geerligs, Valentin Dan Mihailetchi
  • Publication number: 20090038682
    Abstract: A semiconductor substrate for a solar cell, comprising the semiconductor substrate having a surface which constitutes a light incident face of the solar cell and having a surface irregularities structure, wherein the surface has an surface area from 1.2 to 2.2 times that of an imaginary smooth face and the standard deviation of the heights of the irregularities is 1.0 ?m or less.
    Type: Application
    Filed: May 26, 2005
    Publication date: February 12, 2009
    Inventors: Yuji Komatsu, Hiroyuki Fukumura, Yoshiroh Takaba, Ryoh Ozaki, Tohru Nunoi
  • Publication number: 20080283120
    Abstract: The invention provides solar cells and methods of manufacturing solar cells having a Hetero-junction with Intrinsic Thin-layer (HIT) structure using an n-type multicrystalline silicon substrate. An n-type multicrystalline silicon substrate is subjected to a phosphorus diffusion step using a relatively high temperature. The front side diffusion layer is then removed. As a next step, a p-type silicon thin film is deposited at the front side of the substrate. This sequence avoids heating the p-type silicon thin film above its deposition temperature, and maintains the quality of the p-type silicon thin film.
    Type: Application
    Filed: October 4, 2006
    Publication date: November 20, 2008
    Applicant: STICHTING ENERGIEONDERZOEK CENTRUM NEDERLAND
    Inventors: Yuji Komatsu, Hanno Dietrich Goldbach, Rudolf Emmanuel Isidore Schropp, Lambert Johan Geerligs
  • Publication number: 20050221613
    Abstract: A method for forming an electrode according to the present invention includes a step of discharging a paste containing an electrode material from a discharge port of a nozzle, and drawing a fine-line pattern on a surface of a semiconductor substrate, and a step of drying and baking the drawn fine-line pattern, and forming a fine-line electrode.
    Type: Application
    Filed: June 2, 2005
    Publication date: October 6, 2005
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Ryoh Ozaki, Hitomi Ohta, Hiroyuki Fukumura, Yoshiroh Takaba, Yuji Komatsu, Tohru Nunoi
  • Patent number: 6825408
    Abstract: A stacked photoelectric conversion device comprising at least two photoelectric conversion element layers sandwiched between a first electrode layer and a light receiving second electrode layer, and at least one intermediate layer sandwiched between any two of said at least two photoelectric conversion element layers, wherein the intermediate layer has uneven surfaces on a light receiving side and a light outgoing side, the uneven surface on the latter having a greater average level difference than that on the former.
    Type: Grant
    Filed: August 21, 2002
    Date of Patent: November 30, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasue Nagano, Naoki Koide, Takanori Nakano, Mingju Yang, Yuji Komatsu
  • Publication number: 20030111106
    Abstract: A stacked photoelectric conversion device comprising at least two photoelectric conversion element layers sandwiched between a first electrode layer and a light receiving second electrode layer, and at least one intermediate layer sandwiched between any two of said at least two photoelectric conversion element layers, wherein the intermediate layer has uneven surfaces on a light receiving side and a light outgoing side, the uneven surface on the latter having a greater average level difference than that on the former.
    Type: Application
    Filed: August 21, 2002
    Publication date: June 19, 2003
    Inventors: Yasue Nagano, Naoki Koide, Takanori Nakano, Mingju Yang, Yuji Komatsu
  • Patent number: 6504091
    Abstract: A photoelectric converting device is provided with enhanced photoelectric conversion efficiency by optimizing a combination of materials used for top and bottom cells. The photoelectric converting device of the present invention is provided with first and second pn junctions. The first pn junction is formed in a semiconductor substantially represented by (Al1-yGay)1-xInxP, and the second pn junction is formed in a semiconductor substantially represented by Ga1-zInzAs.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: January 7, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tadashi Hisamatsu, Kazuyo Nakamura, Yuji Komatsu, Masafumi Shimizu
  • Patent number: 6329860
    Abstract: A frequency monitor compares an actual frequency of an oscillating circuit with a target frequency for producing a control signal representative of the comparison result, a controller is responsive to the control signal so as to trim the resistance of a resistor string with an n-bit control signal regulated through a binary search algorithm, and quickly adjusts the actual frequency to the target frequency, because the trimming operation is only repeated n times at the maximum.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: December 11, 2001
    Assignee: NEC Corporation
    Inventor: Yuji Komatsu
  • Publication number: 20010018924
    Abstract: A photoelectric converting device is provided with enhanced photoelectric conversion efficiency by optimizing a combination of materials used for top and bottom cells. The photoelectric converting device of the present invention is provided with first and second pn junctions. The first pn junction is formed in a semiconductor substantially represented by (Al1−yGay)1−xInxP, and the second pn junction is formed in a semiconductor substantially represented by Ga1−zInzAs.
    Type: Application
    Filed: February 9, 2001
    Publication date: September 6, 2001
    Inventors: Tadashi Hisamatsu, Kazuyo Nakamura, Yuji Komatsu, Masafumi Shimizu