Patents by Inventor Yuji MORINAGA

Yuji MORINAGA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190237377
    Abstract: An electronic device has a substrate 5, a first conductor layer 71 provided on the substrate 5, a second conductor layer 72 provided on the substrate 5; an electronic element provided on the first conductor layer 71, and a sealing part 90 covering the substrate 5, the first conductor layer 71, the second conductor layer 72, and the electronic element 95. The first conductor layer 71 is not provided on a virtual straight line VL including the second conductor layer 72 in an in-plane direction of the substrate 5. The second conductor layer 72 is sealed inside the sealing part 90 and covered only with the sealing part 90.
    Type: Application
    Filed: February 20, 2017
    Publication date: August 1, 2019
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Soichiro UMEDA, Yuji MORINAGA
  • Publication number: 20190186400
    Abstract: A flow rate detector includes a detection circuit, which is configured to output as an analog signal a voltage in accordance with a flow rate of air flowing through an intake pipe, and a conversion circuit, which is configured to convert the analog signal input from the detection circuit to a digital signal based on an analog-to-digital conversion characteristic to output the digital signal. The analog signal that corresponds to a forward flow direction and is input to the conversion circuit is set to have a value larger than an input voltage range in which a missing code may occur in the analog-to-digital conversion characteristic.
    Type: Application
    Filed: May 31, 2018
    Publication date: June 20, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Naoki MORINAGA, Yuji ARIYOSHI, Masahiro KAWAI, Shinichiro HIDAKA
  • Patent number: 10319704
    Abstract: A semiconductor module includes: a first substrate having a first insulating substrate and a first conductor layer; a power device part having a first electrode, a second electrode and a gate electrode; a second substrate having a second insulating substrate and a second conductor layer, wherein the second conductor layer has a bonding portion and a surrounding wall portion formed at a position which surrounds the bonding portion as viewed in a plan view; an inner resin portion; a control IC; and an outer resin portion, wherein the power device part is disposed such that the gate electrode is positioned outside a region defined by the surrounding wall portion as viewed in a plan view, and the gate electrode is electrically connected to an output terminal of the control IC through a connecting member.
    Type: Grant
    Filed: January 31, 2016
    Date of Patent: June 11, 2019
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Kosuke Ikeda, Yuji Morinaga
  • Patent number: 10251256
    Abstract: The present invention provides a heat dissipating structure with high heat dissipation performance while reducing the electric resistance. A heat dissipating structure includes: a heat sink having a base portion, and a plurality of heat dissipating fins provided upright on a first surface of the base portion; a first heat generating component provided on a side of the first surface of the base portion while being in contact with at least one heat dissipating fin of the plurality of heat dissipating fins; a circuit board joined to a second surface, opposite to the first face, of the base portion while being electrically connected to the first heat generating component; a second heat generating component provided on the circuit board, the second heat generating component generating a smaller amount of heat than the first heat generating component; and a connector electrically connecting the first heat generating component and the second heat generating component.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: April 2, 2019
    Assignee: Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Kosuke Ikeda, Yuji Morinaga, Osamu Matsuzaki
  • Patent number: 10243477
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, semiconductor switching parts 10 and 20, and a bypass capacitor 80, the semiconductor switching part 10 provided on the conductive pattern part 51, the semiconductor switching part 20 provided on the conductive pattern part 52, the semiconductor switching part 10 having a side S1 and a side S2, the semiconductor switching part 20 having a side S3 and a side S4, an imaginary line L1 extending along the side S1 and an imaginary line L2 extending along the side S3 intersecting each other.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: March 26, 2019
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuji Morinaga, Atsushi Kyutoku, Yoshihiko Kikuchi
  • Publication number: 20190051577
    Abstract: An electronic device has a substrate 5, a first electric element 91 provided on a first conductor layer 71, a second electric element 92 provided on the first electric element 91, and a connector 50 having a base end part 45 provided on a second conductor layer 72 and a head part 40 provided on a front surface electrode 92a of the second electric element 92 via a conductive adhesive 75. An area of the base end part 45 placed on the second conductor layer 72 is larger than an area of the head part 40 placed on the second electric element 92. The base end part 45 is located at a side of the substrate 5 compared with the head part 40, and a gravity center position of the connector 50 is at a side of the base end part 45 of the connector 50.
    Type: Application
    Filed: February 20, 2017
    Publication date: February 14, 2019
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuji MORINAGA, Soichiro UMEDA
  • Patent number: 10199486
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, a GaN-HEMI 10 disposed on the conductive pattern part 51, and a GaN-HEMT 20 disposed on the conductive pattern part 52, wherein an imaginary line L1 of the GaN-HEMT 10 and an imaginary line L2 of the GaN-HEMT 20 intersect each other, a GaN gate electrode 23 of the GaN-HEMT 20 is electrically connected to the conductive pattern part 55 via a metal wire 6, and the metal wire 6 is perpendicular to a side 55 of the GaN-HEMT 20 and a conductive pattern side 55S of the conductive pattern part 55.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: February 5, 2019
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuji Morinaga, Atsushi Kyutoku, Yoshihiko Kikuchi
  • Publication number: 20180366567
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, a GaN-HEMT 10 disposed on the conductive pattern part 51, and a GaN-HEMT 20 disposed on the conductive pattern part 52, wherein an imaginary line L1 of the GaN-HEMT 10 and an imaginary line L2 of the GaN-HEMT 20 intersect each other, a GaN gate electrode 23 of the GaN-HEMT 20 is electrically connected to the conductive pattern part 55 via a metal wire 6, and the metal wire 6 is perpendicular to a side 55 of the GaN-HEMT 20 and a conductive pattern side 55S of the conductive pattern part 55.
    Type: Application
    Filed: June 19, 2017
    Publication date: December 20, 2018
    Inventors: Yuji MORINAGA, Atsushi KYUTOKU, Yoshihiko KIKUCHI
  • Publication number: 20180367054
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, semiconductor switching parts 10 and 20, and a bypass capacitor 80, the semiconductor switching part 10 provided on the conductive pattern part 51, the semiconductor switching part 20 provided on the conductive pattern part 52, the semiconductor switching part 10 having a side S1 and a side S2, the semiconductor switching part 20 having a side S3 and a side S4, an imaginary line L1 extending along the side SI and an imaginary line L2 extending along the side S3 intersecting each other.
    Type: Application
    Filed: June 19, 2017
    Publication date: December 20, 2018
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuji MORINAGA, Atsushi KYUTOKU, Yoshihiko KIKUCHI
  • Patent number: 10159166
    Abstract: A heat sink according to one embodiment of the present invention includes: a base portion having a first surface and a second surface which oppose each other; at least one heat dissipating fin extending vertically from the first surface, each of the at least one heat dissipating fin having an insertion groove extending from an end portion thereof toward the base portion, and a first fin portion and a second fin portion which are separated by the insertion move; and a connector included in the base portion, the connector being above the insertion groove in plan view, and the connector being configured to electrically connect a first heat generating component to be inserted into the insertion groove from a side of the first surface and a second heat generating component to be disposed on a side of the second surface.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: December 18, 2018
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Kosuke Ikeda, Yuji Morinaga, Osamu Matsuzaki
  • Patent number: 10083844
    Abstract: Provided is a method of manufacturing a bonded body having a structure where a substrate and an electronic part are bonded to each other with a metal particle paste interposed therebetween. The method includes an assembled body forming step where the electronic part is mounted on the substrate with the metal particle paste interposed therebetween, an assembled body arranging step of arranging the assembled body between two heating plates opposite to one another, and a bonding step of bonding the substrate and the electronic part to each other by heating while applying pressure to the assembled body by moving at least one of two heating plates to the other of two heating plates. The bonding step is performed under a condition that a temperature of the assembled body is within 0° C. to 150° C. In the bonding step, a metal particle paste minimally generates a sintering reaction.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: September 25, 2018
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Ryo Matsubayashi, Yuji Morinaga
  • Publication number: 20180226356
    Abstract: A semiconductor module includes: a first substrate having a first insulating substrate and a first conductor layer; a power device part having a first electrode, a second electrode and a gate electrode; a second substrate having a second insulating substrate, a second conductor layer and a third conductor layer wherein a hole is formed in the second insulating substrate, the second conductor layer has a bonding portion and a surrounding wall portion; an inner resin portion; a control IC; and an outer resin portion, wherein the first substrate, the power device part, the second substrate and the control IC are stacked in this order, a connector is disposed in the inside of the hole, and the gate electrode is electrically connected to a control signal output terminal of the control IC through a connector.
    Type: Application
    Filed: January 31, 2016
    Publication date: August 9, 2018
    Inventors: Kosuke IKEDA, Yuji MORINAGA
  • Publication number: 20180182745
    Abstract: A semiconductor module includes: a first substrate having a first insulating substrate and a first conductor layer; a power device part having a first electrode, a second electrode and a gate electrode; a second substrate having a second insulating substrate and a second conductor layer, wherein the second conductor layer has a bonding portion and a surrounding wall portion formed at a position which surrounds the bonding portion as viewed in a plan view; an inner resin portion; a control IC; and an outer resin portion, wherein the power device part is disposed such that the gate electrode is positioned outside a region defined by the surrounding wall portion as viewed in a plan view, and the gate electrode is electrically connected to an output terminal of the control IC through a connecting member.
    Type: Application
    Filed: January 31, 2016
    Publication date: June 28, 2018
    Inventors: Kosuke IKEDA, Yuji MORINAGA
  • Publication number: 20170311482
    Abstract: A heat sink according to one embodiment of the present invention includes: a base portion having a first surface and a second surface which oppose each other; at least one heat dissipating fin extending vertically from the first surface, each of the at least one heat dissipating fin having an insertion groove extending from an end portion thereof toward the base portion, and a first fin portion and a second fin portion which are separated by the insertion move; and a connector included in the base portion, the connector being above the insertion groove in plan view, and the connector being configured to electrically connect a first heat generating component to be inserted into the insertion groove from a side of the first surface and a second heat generating component to be disposed on a side of the second surface.
    Type: Application
    Filed: April 13, 2015
    Publication date: October 26, 2017
    Inventors: Kosuke IKEDA, Yuji MORINAGA, Osamu MATSUZAKI
  • Publication number: 20170303385
    Abstract: The present invention provides a heat dissipating structure with high heat dissipation performance while reducing the electric resistance. A heat dissipating structure includes: a heat sink having a base portion, and a plurality of heat dissipating fins provided upright on a first surface of the base portion; a first heat generating component provided on a side of the first surface of the base portion while being in contact with at least one heat dissipating fin of the plurality of heat dissipating fins; a circuit board joined to a second surface, opposite to the first face, of the base portion while being electrically connected to the first heat generating component; a second heat generating component provided on the circuit board, the second heat generating component generating a smaller amount of heat than the first heat generating component; and a connector electrically connecting the first heat generating component and the second heat generating component.
    Type: Application
    Filed: October 29, 2014
    Publication date: October 19, 2017
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Kosuke Ikeda, Yuji Morinaga, Osamu Matsuzaki
  • Patent number: 9704828
    Abstract: A semiconductor module according to one embodiment of the present invention includes: a first circuit board having thermal conductivity; a second circuit board having thermal conductivity and disposed opposing the first circuit board; a first semiconductor element joined to an opposing surface of the first circuit board opposing the second circuit board; a second semiconductor element joined to an opposing surface of the second circuit board opposing the first circuit board; and a connector electrically connecting the first semiconductor element and the second semiconductor element. The connector includes a portion which is sandwiched between the first semiconductor element and the second circuit board without through the second semiconductor element, and which is in contact with the first semiconductor element and the second circuit board.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: July 11, 2017
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Kosuke Ikeda, Yuji Morinaga, Osamu Matsuzaki
  • Publication number: 20170103903
    Abstract: Provided is a method of manufacturing a bonded body having a structure where a substrate and an electronic part are bonded to each other with a metal particle paste interposed therebetween. The method includes an assembled body forming step where the electronic part is mounted on the substrate with the metal particle paste interposed therebetween, an assembled body arranging step of arranging the assembled body between two heating plates opposite to one another, and a bonding step of bonding the substrate and the electronic part to each other by heating while applying pressure to the assembled body by moving at least one of two heating plates to the other of two heating plates. The bonding step is performed under a condition that a temperature of the assembled body is within 0° C. to 150° C. In the bonding step, a metal particle paste minimally generates a sintering reaction.
    Type: Application
    Filed: March 31, 2015
    Publication date: April 13, 2017
    Inventors: Ryo MATSUBAYASHI, Yuji MORINAGA
  • Publication number: 20160254250
    Abstract: A semiconductor module according to one embodiment of the present invention includes: a first circuit board having thermal conductivity; a second circuit board having thermal conductivity and disposed opposing the first circuit board; a first semiconductor element joined to an opposing surface of the first circuit board opposing the second circuit board; a second semiconductor element joined to an opposing surface of the second circuit board opposing the first circuit board; and a connector electrically connecting the first semiconductor element and the second semiconductor element. The connector includes a portion which is sandwiched between the first semiconductor element and the second circuit board without through the second semiconductor element, and which is in contact with the first semiconductor element and the second circuit board.
    Type: Application
    Filed: October 16, 2014
    Publication date: September 1, 2016
    Inventors: Kosuke IKEDA, Yuji MORINAGA, Osamu MATSUZAKI