Abstract: To provide a method for manufacturing a semiconductor device, which the method is capable of efficient mass production of high-performance semiconductor devices by, upon manufacture of a semiconductor device, eliminating unwanted features (e.g., side lobes) created together with a resist pattern by thickening the resist pattern, to reduce the burden in designing photomasks and to increase depth of focus. The method of the present invention for manufacturing a semiconductor device includes at least: forming a resist pattern on a work surface and applying over a surface of the resist pattern a resist pattern thickening material to thereby thicken the resist pattern to eliminate an unwanted feature created together with the resist pattern.

Abstract: The semiconductor device manufacturing method comprises the step of transferring patterns formed on a reticle to a semiconductor substrate by an exposure with oblique incidence illumination. In the step of making the exposure with oblique incidence illumination, the exposure is made with an aperture stop 16 including a first ring-shaped aperture 22, and a plurality of second apertures 24a1-24a4 formed around the first ring-shaped aperture 22. The exposure is made with an aperture stop 16 having the first ring-shaped aperture 22 which can transfer patterns arranged at a medium pitch to a relatively large pitch with a relatively high resolution and the second aperture 24a1-24a4 which can transfer patterns arranged at a relatively small pitch with a relatively high resolution, whereby even when the patterns are arranged at various pitch values, the DOF can be surely sufficient, and the patterns can be stably transferred.

Abstract: A semiconductor device manufacturing method includes: forming a conductive film over a substrate; forming an assist pattern on the conductive film; forming a metal film to cover the conductive film and the assist pattern; etching back the metal film to form at least one side wall film on a side surface of the assist pattern; removing the assist pattern; forming at least one resist pattern to selectively expose a portion of the conductive film and a portion of the side wall film; performing etching using the resist pattern as a mask to remove the exposed portion of the side wall film; and etching the conductive film using the side wall film as a mask to form a gate electrode and a contact region electrically connected to the gate electrode.

Abstract: A method of manufacturing a film pattern includes forming a film over a substrate, applying a photoresist over the film, exposing the photoresist using a first mask pattern including a first mask opening and a second mask opening, and an optical proximity correction being applied only to the first mask opening, exposing the photoresist using a second mask pattern including a third mask opening and a fourth mask opening, an optical proximity correction being applied only to the fourth mask opening.

Abstract: A semiconductor device manufacturing method includes: forming a conductive film over a substrate; forming an assist pattern on the conductive film; forming a metal film to cover the conductive film and the assist pattern; etching back the metal film to form at least one side wall film on a side surface of the assist pattern; removing the assist pattern; forming at least one resist pattern to selectively expose a portion of the conductive film and a portion of the side wall film; performing etching using the resist pattern as a mask to remove the exposed portion of the side wall film; and etching the conductive film using the side wall film as a mask to form a gate electrode and a contact region electrically connected to the gate electrode.

Abstract: A method for designing a photomask pattern is provided. First, all line ends of object patterns are determined with reference to layout data. Then, object patterns, front edge portions, and joints, which are aligned on the same line extending along the Y-axis, are connected to form first reticle data. Reticle pattern data having data representing binding portions serving as light blocking portions is formed. The front edge portions being adjacent to each other and aligned in the X-axis are connected and adjacent joints being aligned in the same manner as the front edge portions are also connected to form second reticle data. Then, portions are provided at central regions between the binding portions so as to connect the adjacent binding portions including the front edge portions and the joints. Then, reticle data having data representing the binding portions serving as transparent patterns is formed.

Abstract: An exposure mask 24, includes a quartz (transparent) substrate 20, a film 21 formed on the quartz substrate 20, a rectangular main feature 21a formed in the film 21, a first assist feature 21b formed in the film 21 away from the main feature 21a and having a size that is not resolved as a rectangle that has a long side 21e opposing to one side 21d of the main feature 21d, and a second assist feature 21c formed in the film 21 and positioned on a virtual prolonged line L of a diagonal of the main feature 21a and having a size that is not resolved.

Abstract: A method for designing a photomask pattern is provided. First, all line ends of object patterns are determined with reference to layout data. Then, object patterns, front edge portions, and joints, which are aligned on the same line extending along the Y-axis, are connected to form first reticle data. Reticle pattern data having data representing binding portions serving as light blocking portions is formed. The front edge portions being adjacent to each other and aligned in the X-axis are connected and adjacent joints being aligned in the same manner as the front edge portions are also connected to form second reticle data. Then, portions are provided at central regions between the binding portions so as to connect the adjacent binding portions including the front edge portions and the joints. Then, reticle data having data representing the binding portions serving as transparent patterns is formed.

Abstract: A method of manufacturing a film pattern includes forming a film over a substrate, applying a photoresist over the film, exposing the photoresist using a first mask pattern including a first mask opening and a second mask opening, and an optical proximity correction being applied only to the first mask opening, exposing the photoresist using a second mask pattern including a third mask opening and a fourth mask opening, an optical proximity correction being applied only to the fourth mask opening.

Abstract: To provide a method for manufacturing a semiconductor device, which the method is capable of efficient mass production of high-performance semiconductor devices by, upon manufacture of a semiconductor device, eliminating unwanted features (e.g., side lobes) created together with a resist pattern by thickening the resist pattern, to reduce the burden in designing photomasks and to increase depth of focus. The method of the present invention for manufacturing a semiconductor device includes at least: forming a resist pattern on a work surface and applying over a surface of the resist pattern a resist pattern thickening material to thereby thicken the resist pattern to eliminate an unwanted feature created together with the resist pattern.

Abstract: The semiconductor device manufacturing method comprises the step of transferring patterns formed on a reticle to a semiconductor substrate by an exposure with oblique incidence illumination. In the step of making the exposure with oblique incidence illumination, the exposure is made with an aperture stop 16 including a first ring-shaped aperture 22, and a plurality of second apertures 24a1-24a4 formed around the first ring-shaped aperture 22. The exposure is made with an aperture stop 16 having the first ring-shaped aperture 22 which can transfer patterns arranged at a medium pitch to a relatively large pitch with a relatively high resolution and the second aperture 24a1-24a4 which can transfer patterns arranged at a relatively small pitch with a relatively high resolution, whereby even when the patterns are arranged at various pitch values, the DOF can be surely sufficient, and the patterns can be stably transferred.

Abstract: An exposure mask 24, includes a quartz (transparent) substrate 20, a film 21 formed on the quartz substrate 20, a rectangular main feature 21a formed in the film 21, a first assist feature 21b formed in the film 21 away from the main feature 21a and having a size that is not resolved as a rectangle that has a long side 21e opposing to one side 21d of the main feature 21d, and a second assist feature 21c formed in the film 21 and positioned on a virtual prolonged line L of a diagonal of the main feature 21a and having a size that is not resolved.

Abstract: The semiconductor device comprises a gate interconnection 24a including a gate electrode formed over a semiconductor substrate 14 with a gate insulation film 22 formed therebetween; a first source/drain diffused layer 28 formed near the end of the gate interconnection 24a; a second source/drain diffused layer 34 formed remote from the gate interconnection 24a and the first source/drain diffused layer 28; and an insulation film 40 formed over the gate interconnection 24a, the first source/drain diffused layer 28 and the second source/drain diffused layer 34, and having a groove-shaped opening 42a formed in, which integrally exposes the gate interconnection 24a, one of the first source/drain diffused layer 28, and one of the second source/drain diffused layer 34; and a contact layer 48a buried in the groove-shaped opening 42a. The groove-shaped openings 42a for the contact layers 48a to be buried in can be formed without failure.

Abstract: The semiconductor device comprises a gate interconnection 24a including a gate electrode formed over a semiconductor substrate 14 with a gate insulation film 22 formed therebetween; a first source/drain diffused layer 28 formed near the end of the gate interconnection 24a; a second source/drain diffused layer 34 formed remote from the gate interconnection 24a and the first source/drain diffused layer 28; and an insulation film 40 formed over the gate interconnection 24a, the first source/drain diffused layer 28 and the second source/drain diffused layer 34, and having a groove-shaped opening 42a formed in, which integrally exposes the gate interconnection 24a, one of the first source/drain diffused layer 28, and one of the second source/drain diffused layer 34; and a contact layer 48a buried in the groove-shaped opening 42a. The groove-shaped openings 42a for the contact layers 48a to be buried in can be formed without failure.

Abstract: The semiconductor device comprises a gate interconnection 24a including a gate electrode formed over a semiconductor substrate 14 with a gate insulation film 22 formed therebetween; a first source/drain diffused layer 28 formed near the end of the gate interconnection 24a; a second source/drain diffused layer 34 formed remote from the gate interconnection 24a and the first source/drain diffused layer 28; and an insulation film 40 formed over the gate interconnection 24a, the first source/drain diffused layer 28 and the second source/drain diffused layer 34, and having a groove-shaped opening 42a formed in, which integrally exposes the gate interconnection 24a, one of the first source/drain diffused layer 28, and one of the second source/drain diffused layer 34; and a contact layer 48a buried in the groove-shaped opening 42a. The groove-shaped openings 42a for the contact layers 48a to be buried in can be formed without failure.

Abstract: The semiconductor device comprises a gate interconnection 24a including a gate electrode formed over a semiconductor substrate 14 with a gate insulation film 22 formed therebetween; a first source/drain diffused layer 28 formed near the end of the gate interconnection 24a; a second source/drain diffused layer 34 formed remote from the gate interconnection 24a and the first source/drain diffused layer 28; and an insulation film 40 formed over the gate interconnection 24a, the first source/drain diffused layer 28 and the second source/drain diffused layer 34, and having a groove-shaped opening 42a formed in, which integrally exposes the gate interconnection 24a, one of the first source/drain diffused layer 28, and one of the second source/drain diffused layer 34; and a contact layer 48a buried in the groove-shaped opening 42a. The groove-shaped openings 42a for the contact layers 48a to be buried in can be formed without failure.