Patents by Inventor Yuji Toyota

Yuji Toyota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220216842
    Abstract: An acoustic wave device includes a piezoelectric layer, at least one pair of electrodes adjacent to each other, and an additional film. The piezoelectric layer is made of lithium niobate or lithium tantalate, and includes first and second opposing principal surfaces. The at least one pair of electrodes is located on the first principal surface of the piezoelectric layer. The additional film is located on the piezoelectric layer or either one or both of the electrodes so as to overlap, in plan view, either one or both of areas in which the electrodes are located and an area between the electrodes. When d represents a thickness of the piezoelectric layer and p represents a center-to-center distance between the electrodes, d/p is equal to or less than about 0.5.
    Type: Application
    Filed: March 25, 2022
    Publication date: July 7, 2022
    Inventors: Sho NAGATOMO, Tetsuya KIMURA, Takashi YAMANE, Katsuya DAIMON, Takuya KOYANAGI, Yuji TOYOTA
  • Patent number: 11314183
    Abstract: A developing device includes a developer container, a developer carrier, and first and second stirring/conveying members. The developer container includes a first partition wall partitioning between the two conveying chambers longitudinally, a first communication portion for passing developer from the first to the second conveying chamber, a second communication portion for passing developer from the second to the first conveying chamber, a developer supply port for supplying developer in, a developer discharge portion for discharging excessive developer, a second partition wall arranged, adjacent to the regulating portion, downstream of the second communication portion to partition between the first conveying chamber and the regulating portion, and a shield portion connected to the two partition walls to bridge between them to shield a top part of the second communication portion. A gap is formed between an upper end part of the shield portion and the inner surface of the developer container.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: April 26, 2022
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Masashi Fujishima, Norio Kubo, Asami Sasaki, Yasuhiro Tauchi, Tamotsu Shimizu, Akira Matayoshi, Masaki Kadota, Koji Suenami, Yuji Toyota
  • Publication number: 20220077377
    Abstract: A wiring electrode on a piezoelectric substrate includes layers including an adhesive layer in contact with the piezoelectric substrate, an outermost layer indirectly above the adhesive layer, a low-resistance layer between the adhesive layer and the outermost layer, including first and second principal surfaces, and having a lowest electric resistance among the layers, and a barrier layer between the low-resistance layer and the outermost layer. An outer peripheral edge of the second principal surface of the low-resistance layer is inside an outer peripheral edge of the barrier layer, and an outer peripheral edge of the adhesive layer is outside an outer peripheral edge of the low-resistance layer, in plan view.
    Type: Application
    Filed: November 17, 2021
    Publication date: March 10, 2022
    Inventor: Yuji TOYOTA
  • Publication number: 20220057727
    Abstract: An image forming apparatus includes an image carrier, a charging device, an exposure device, a development device, a transferring part, a development bias applying part, an electric current detection part, a density detection part and a bias condition determination part. The bias condition determination part performs a DC voltage determination mode (a DC calibration) determining a reference DC voltage serving as a reference of a DC voltage of a development bias applied to a development roller and a peak-to-peak voltage determination mode (an AC calibration) determining a reference peak-to-peak voltage serving as a reference of a peak-to-peak voltage of an AC voltage of the development bias. When a difference between the reference DC voltages determined the successive DC voltage determination modes exceeds a predetermined threshold value, the bias condition determination part performs the peak-to-peak determination mode.
    Type: Application
    Filed: August 16, 2021
    Publication date: February 24, 2022
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Tamotsu SHIMIZU, Masashi FUJISHIMA, Akira MATAYOSHI, Yasuhiro TAUCHI, Yuji TOYOTA, Norio KUBO
  • Patent number: 11209752
    Abstract: A developing device includes a developer container, a developer carrier, and first and second members for stirring/conveying. The developer container includes a first partition wall between first and second chambers, a communication portion through which those chambers communicate at opposite ends of the first partition wall, a developer supply port, and a developer discharge portion. The first member stirs and conveys developer in the first chamber in a first direction. The second member stirs and conveys developer in the second chamber in a second direction and includes a regulating portion and a discharging blade. The developer container includes a second partition wall between the first chamber and the regulating portion. The gap from the upper end of the second partition wall to the inner surface of the developer container is larger than the gap thereto from the upper ends of a first helical blade and the regulating portion.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: December 28, 2021
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Asami Sasaki, Akira Matayoshi, Norio Kubo, Koji Suenami, Yuji Toyota, Tamotsu Shimizu, Masashi Fujishima, Yasuhiro Tauchi
  • Publication number: 20210364944
    Abstract: A developing device includes a developer container, a developer carrier, and first and second stirring/conveying members. The developer container includes a first partition wall partitioning between the two conveying chambers longitudinally, a first communication portion for passing developer from the first to the second conveying chamber, a second communication portion for passing developer from the second to the first conveying chamber, a developer supply port for supplying developer in, a developer discharge portion for discharging excessive developer, a second partition wall arranged, adjacent to the regulating portion, downstream of the second communication portion to partition between the first conveying chamber and the regulating portion, and a shield portion connected to the two partition walls to bridge between them to shield a top part of the second communication portion. A gap is formed between an upper end part of the shield portion and the inner surface of the developer container.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 25, 2021
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Masashi FUJISHIMA, Norio KUBO, Asami SASAKI, Yasuhiro TAUCHI, Tamotsu SHIMIZU, Akira MATAYOSHI, Masaki KADOTA, Koji SUENAMI, Yuji TOYOTA
  • Publication number: 20210364951
    Abstract: A developing device includes a developer container, a developer carrier, and first and second members for stirring/conveying. The developer container includes a first partition wall between first and second chambers, a communication portion through which those chambers communicate at opposite ends of the first partition wall, a developer supply port, and a developer discharge portion. The first member stirs and conveys developer in the first chamber in a first direction. The second member stirs and conveys developer in the second chamber in a second direction and includes a regulating portion and a discharging blade. The developer container includes a second partition wall between the first chamber and the regulating portion. The gap from the upper end of the second partition wall to the inner surface of the developer container is larger than the gap thereto from the upper ends of a first helical blade and the regulating portion.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 25, 2021
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Asami SASAKI, Akira MATAYOSHI, Norio KUBO, Koji SUENAMI, Yuji TOYOTA, Tamotsu SHIMIZU, Masashi FUJISHIMA, Yasuhiro TAUCHI
  • Patent number: 11163243
    Abstract: A bias condition determiner executes, in order, a first direct current voltage determination mode (first DC calibration) for determining a provisional reference direct current voltage that is a provisional reference for a direct current voltage of a developing bias applied to a developing roller, an inter-peak voltage determination mode (AC calibration) for determining a reference inter-peak voltage that is a reference for an inter-peak voltage of an alternating current voltage of the developing bias applied to the developing roller in an image forming operation, and a second direct current voltage determination mode (second DC calibration) for determining a reference direct current voltage that is a reference for the direct current voltage of the developing bias applied to the developing roller in the image forming operation.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: November 2, 2021
    Assignee: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventors: Tamotsu Shimizu, Norio Kubo, Asami Sasaki, Yasuhiro Tauchi, Yuji Toyota
  • Publication number: 20210302867
    Abstract: A bias condition determiner executes, in order, a first direct current voltage determination mode (first DC calibration) for determining a provisional reference direct current voltage that is a provisional reference for a direct current voltage of a developing bias applied to a developing roller, an inter-peak voltage determination mode (AC calibration) for determining a reference inter-peak voltage that is a reference for an inter-peak voltage of an alternating current voltage of the developing bias applied to the developing roller in an image forming operation, and a second direct current voltage determination mode (second DC calibration) for determining a reference direct current voltage that is a reference for the direct current voltage of the developing bias applied to the developing roller in the image forming operation.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 30, 2021
    Inventors: Tamotsu Shimizu, Norio Kubo, Asami Sasaki, Yasuhiro Tauchi, Yuji Toyota
  • Publication number: 20210302866
    Abstract: A bias condition determiner executes a direct current voltage determination mode (DC calibration) for determining a reference direct current voltage that is a reference for a direct current voltage of a developing bias applied to a developing roller in an image forming operation and an inter-peak voltage determination mode (AC calibration) for determining a reference inter-peak voltage that is a reference for an inter-peak voltage of an alternating current voltage of the developing bias applied to the developing roller in the image forming operation. A calibration executor determines whether the inter-peak voltage determination mode needs to be executed in accordance with a value of the reference direct current voltage.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 30, 2021
    Inventors: Tamotsu SHIMIZU, Norio KUBO, Asami SASAKI, Yasuhiro TAUCHI, Yuji TOYOTA
  • Patent number: 11112722
    Abstract: A bias condition determiner executes a direct current voltage determination mode (DC calibration) for determining a reference direct current voltage that is a reference for a direct current voltage of a developing bias applied to a developing roller in an image forming operation and an inter-peak voltage determination mode (AC calibration) for determining a reference inter-peak voltage that is a reference for an inter-peak voltage of an alternating current voltage of the developing bias applied to the developing roller in the image forming operation. A calibration executor determines whether the inter-peak voltage determination mode needs to be executed in accordance with a value of the reference direct current voltage.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: September 7, 2021
    Assignee: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventors: Tamotsu Shimizu, Norio Kubo, Asami Sasaki, Yasuhiro Tauchi, Yuji Toyota
  • Patent number: 11105555
    Abstract: The present invention aims to provide a method and an apparatus for producing a lyophilized body, each of which can achieve energy saving, low cost, and a reduction in processing time and can provide a lyophilized body less damaged by a freezing process and a drying process. The present invention relates to a method for lyophilizing a substance using an electromagnetic wave, and the lyophilization method includes freezing the substance under irradiation of at least an electromagnetic wave and reduced-pressure drying the frozen substance under irradiation of at least an electromagnetic wave.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: August 31, 2021
    Assignee: NITTO DENKO CORPORATION
    Inventors: Chie Matsumoto, Takao Yoshikawa, Takuya Shishido, Yuji Toyota, Sachiko Sakamoto, Yoshimitsu Shimomura, Mitsuhiko Hori
  • Patent number: 11048192
    Abstract: Provided is an image forming apparatus capable of suppressing the occurrence of image defects in response to a difference in carrier resistance and obtaining high image quality. A developing unit has a developing roller that carries toner in a two-component developer that includes a toner and a magnetic carrier on the surface thereof, and forms a toner image on the surface of a photosensitive drum. A current detecting unit detects developing current flowing between the developing roller and the photosensitive drum when a developing voltage is applied to the developing roller by a developing power supply. When the developing voltage is applied to the photosensitive drum, a control unit derives a carrier resistance based on the developing current detected by a current detecting unit, and controls an AC amplitude of an AC voltage of the developing voltage based on the carrier resistance.
    Type: Grant
    Filed: December 6, 2020
    Date of Patent: June 29, 2021
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Yuji Toyota, Yasuhiro Tauchi, Masashi Fujishima, Norio Kubo, Akira Matayoshi
  • Publication number: 20210173330
    Abstract: Provided is an image forming apparatus capable of suppressing the occurrence of image defects in response to a difference in carrier resistance and obtaining high image quality. A developing unit has a developing roller that carries the toner in a two-component developer that includes a toner and a magnetic carrier on the surface thereof, and forms a toner image on the surface of a photosensitive drum. A current detecting unit detects developing current flowing between the developing roller and the photosensitive drum when a developing voltage is applied to the developing roller by a developing power supply. When the developing voltage is applied to the photosensitive drum, the control unit derives a carrier resistance based on the developing current detected by a current detecting unit, and controls the AC amplitude of the AC voltage of the development voltage is based on the carrier resistance.
    Type: Application
    Filed: December 6, 2020
    Publication date: June 10, 2021
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Yuji TOYOTA, Yasuhiro TAUCHI, Masashi FUJISHIMA, Norio KUBO, Akira MATAYOSHI
  • Patent number: 10840879
    Abstract: A surface acoustic wave device includes a piezoelectric substrate with an IDT electrode that excites a surface acoustic wave provided on a principal surface, a cover layer opposing the principal surface and that covers the IDT electrode, a support provided in a standing manner around the IDT electrode on the one principal surface, and that, with the cover layer separated from the IDT electrode, supports a piezoelectric-substrate-side surface of the cover layer, and a connector that is provided on the piezoelectric-substrate-side surface of the cover layer and that joins the cover layer and the support to each other. At least a portion of a cover-layer-side end portion of the support exists in the connector. A dimension of the connector in a normal direction to the one principal surface is less than a dimension of the support in the normal direction.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: November 17, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yuji Toyota
  • Patent number: 10644671
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, an IDT electrode that is provided on the piezoelectric substrate and includes combtooth-shaped electrode fingers, and a wiring electrode that is connected to the IDT electrode. A line width of the electrode fingers at a lower edge thereof and a line width of the electrode fingers at an upper edge thereof in a cross section of the electrode fingers that is perpendicular or substantially perpendicular to a longitudinal direction of the electrode fingers is smaller than a maximum line width of the electrode fingers.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: May 5, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yuji Toyota
  • Publication number: 20200025443
    Abstract: The present invention aims to provide a method and an apparatus for producing a lyophilized body, each of which can achieve energy saving, low cost, and a reduction in processing time and can provide a lyophilized body less damaged by a freezing process and a drying process. The present invention relates to a method for lyophilizing a substance using an electromagnetic wave, and the lyophilization method includes freezing the substance under irradiation of at least an electromagnetic wave and reduced-pressure drying the frozen substance under irradiation of at least an electromagnetic wave.
    Type: Application
    Filed: April 2, 2018
    Publication date: January 23, 2020
    Applicant: NITTO DENKO CORPORATION
    Inventors: Chie MATSUMOTO, Takao YOSHIKAWA, Takuya SHISHIDO, Yuji TOYOTA, Sachiko SAKAMOTO, Yoshimitsu SHIMOMURA, Mitsuhiko HORI
  • Publication number: 20190288669
    Abstract: In a composite component, a semiconductor device is stacked on an elastic wave device. Side electrodes extend from at least one side surface of a piezoelectric substrate of the elastic wave device to at least a side surface of a semiconductor substrate of the semiconductor device and are connected to an IDT electrode and functional electrodes. The side electrodes extend onto at least one of a second main surface of the piezoelectric substrate and a second main surface of the semiconductor substrate.
    Type: Application
    Filed: June 3, 2019
    Publication date: September 19, 2019
    Inventors: Katsuya MATSUMOTO, Yuji TOYOTA
  • Patent number: 10298274
    Abstract: A multiplexer includes filters, a common terminal with which an inductance element is connected to a connection path of the common terminal and an antenna element and a capacitance element is connected in series to the connection path, and another inductance element. An input terminal of one of the filters is connected to the common terminal via the another inductance element, and is connected to a parallel resonator. In each of the filters other than the one filter, one of the input terminal and the output terminal, which is a terminal closer to the antenna element, is connected to the common terminal, and is connected to the series resonator.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: May 21, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuichi Takamine, Tsutomu Takai, Yuji Toyota
  • Publication number: 20190089387
    Abstract: A multiplexer includes filters, a common terminal with which an inductance element is connected to a connection path of the common terminal and an antenna element and a capacitance element is connected in series to the connection path, and another inductance element. An input terminal of one of the filters is connected to the common terminal via the another inductance element, and is connected to a parallel resonator. In each of the filters other than the one filter, one of the input terminal and the output terminal, which is a terminal closer to the antenna element, is connected to the common terminal, and is connected to the series resonator.
    Type: Application
    Filed: November 19, 2018
    Publication date: March 21, 2019
    Inventors: Yuichi TAKAMINE, Tsutomu TAKAI, Yuji TOYOTA