Patents by Inventor Yujiro Tani

Yujiro Tani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9477882
    Abstract: In an object detection apparatus (1), a window setting unit (12) extracts a window (52) from an edge image (22), to thereby generate an ordinary window image (23). When an edge strength of the ordinary window image (23) is not larger than a usage reference value, a used image determination unit (15) determines to use the ordinary window image (23) for calculation of an identification value (30) indicating a degree of presence of a pedestrian in the window (52). When the edge strength of the ordinary window image (23) is larger than the usage reference value, a pixel value correction unit (13) generates a corrected window image (24) having an edge strength smaller than that of the ordinary window image (23) from the ordinary window image (23). When the edge strength of the corrected window image (24) is not larger than the usage reference value, the used image determination unit (15) determines the corrected window image (24) to be used for calculation of the identification value (30).
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: October 25, 2016
    Assignee: MegaChips Corporation
    Inventors: Yuki Haraguchi, Yujiro Tani
  • Patent number: 9454826
    Abstract: An image processor includes an LSRAM accessible with a higher speed than a frame memory and configured to hold a second image in a predetermined range of a first image, an image production unit configured to read an image in a predetermined range of the second image from the LSRAM and produce a third image for rough search based on the read image, an MSRAM accessible with a higher speed than the frame memory and configured to hold the third image produced by the image production unit, a search unit configured to read the third image from the MSRAM and perform first motion search based on the third image, and a search unit configured to read a fourth image in a predetermined range of the second image from the LSRAM based on a search result by the search unit and perform second motion search that is more detailed than the first motion search based on the fourth image.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 27, 2016
    Assignee: MegaChips Corporation
    Inventors: Kazuhiro Saito, Yujiro Tani, Motoaki Yasui
  • Patent number: 9443319
    Abstract: An image processor includes an LSRAM accessible with a higher speed than a frame memory and configured to hold a second image in a predetermined range of a first image, an image production unit configured to read an image in a predetermined range of the second image and produce a third image for rough search based on the read image, an MSRAM accessible with a higher speed than the frame memory and configured to hold the third image, a first search unit configured to read the third image and perform first motion search based on the third image, and a second search unit configured to read a fourth image in a predetermined range of the second image based on a search result by the first search unit and perform second motion search that is more detailed than the first motion search based on the fourth image.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 13, 2016
    Assignee: MegaChips Corporation
    Inventors: Kazuhiro Saito, Yujiro Tani, Shinichi Murata
  • Patent number: 9208377
    Abstract: In a human detection device 1, an edge extractor 11 carries out edge extraction processing to an input image 21 and produces a horizontal edge image 22. A shoulder detector 12 detects a shoulder center and a shoulder width of a person included in the input image 21. A foot detector 13 detects a foot position of the person based on the detected shoulder center and shoulder width. A top detector 14 detects a top position of the person based on the detected shoulder center and shoulder width. A size determiner 15 determines a horizontal size of the person based on the detected shoulder width and determines a vertical size of the person based on the detected foot position and top position. The size determiner 15 produces human range data 28 including the determined sizes, the shoulder center position, the foot position, and the top position.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: December 8, 2015
    Assignee: MegaChips Corporation
    Inventors: Yusuke Mizuno, Shohei Nomoto, Yujiro Tani, Yuki Haraguchi
  • Publication number: 20150262363
    Abstract: In an object detection apparatus (1), a window setting unit (12) extracts a window (52) from an edge image (22), to thereby generate an ordinary window image (23). When an edge strength of the ordinary window image (23) is not larger than a usage reference value, a used image determination unit (15) determines to use the ordinary window image (23) for calculation of an identification value (30) indicating a degree of presence of a pedestrian in the window (52). When the edge strength of the ordinary window image (23) is larger than the usage reference value, a pixel value correction unit (13) generates a corrected window image (24) having an edge strength smaller than that of the ordinary window image (23) from the ordinary window image (23). When the edge strength of the corrected window image (24) is not larger than the usage reference value, the used image determination unit (15) determines the corrected window image (24) to be used for calculation of the identification value (30).
    Type: Application
    Filed: March 13, 2015
    Publication date: September 17, 2015
    Applicant: MegaChips Corporation
    Inventors: Yuki HARAGUCHI, Yujiro Tani
  • Publication number: 20150243169
    Abstract: A technique of determining the situation of a traffic lane. A traffic lane situation determining device includes a camera that is mounted in a vehicle and obtains an image whose object is a road in a travelling direction of the vehicle, a straight line detecting section that extracts a plurality of lines defining a traffic lane of the road from the image to detect a plurality of straight lines that respectively approximate the plurality of lines, an intersection identifying section that identifies an intersection of extended lines respectively obtained by extending the plurality of straight lines, and a traffic lane situation determining section that compares a location of the intersection with a location of a point at infinity preset in the image to determine a situation of the traffic lane.
    Type: Application
    Filed: July 30, 2013
    Publication date: August 27, 2015
    Applicant: MegaChips Corporation
    Inventor: Yujiro Tani
  • Publication number: 20140369562
    Abstract: An image processor includes an LSRAM accessible with a higher speed than a frame memory and configured to hold a second image in a predetermined range of a first image, an image production unit configured to read an image in a predetermined range of the second image and produce a third image for rough search based on the read image, an MSRAM accessible with a higher speed than the frame memory and configured to hold the third image, a first search unit configured to read the third image and perform first motion search based on the third image, and a second search unit configured to read a fourth image in a predetermined range of the second image based on a search result by the first search unit and perform second motion search that is more detailed than the first motion search based on the fourth image.
    Type: Application
    Filed: November 30, 2012
    Publication date: December 18, 2014
    Applicant: MegaChips Corporation
    Inventors: Kazuhiro Saito, Yujiro Tani, Shinichi Murata
  • Publication number: 20140334688
    Abstract: An image processor includes an LSRAM accessible with a higher speed than a frame memory and configured to hold a second image in a predetermined range of a first image, an image production unit configured to read an image in a predetermined range of the second image from the LSRAM and produce a third image for rough search based on the read image, an MSRAM accessible with a higher speed than the frame memory and configured to hold the third image produced by the image production unit, a search unit configured to read the third image from the MSRAM and perform first motion search based on the third image, and a search unit configured to read a fourth image in a predetermined range of the second image from the LSRAM based on a search result by the search unit and perform second motion search that is more detailed than the first motion search based on the fourth image.
    Type: Application
    Filed: November 30, 2012
    Publication date: November 13, 2014
    Applicant: MegaChips Corporation
    Inventors: Kazuhiro Saito, Yujiro Tani, Motoaki Yasui
  • Publication number: 20140286532
    Abstract: In a human detection device 1, an edge extractor 11 carries out edge extraction processing to an input image 21 and produces a horizontal edge image 22. A shoulder detector 12 detects a shoulder center and a shoulder width of a person included in the input image 21. A foot detector 13 detects a foot position of the person based on the detected shoulder center and shoulder width. A top detector 14 detects a top position of the person based on the detected shoulder center and shoulder width. A size determiner 15 determines a horizontal size of the person based on the detected shoulder width and determines a vertical size of the person based on the detected foot position and top position. The size determiner 15 produces human range data 28 including the determined sizes, the shoulder center position, the foot position, and the top position.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 25, 2014
    Applicant: MegaChips Corporation
    Inventors: Yusuke MIZUNO, Shohei NOMOTO, Yujiro TANI, Yuki HARAGUCHI
  • Patent number: 8571336
    Abstract: An image processor includes an encoder and a decoder. The encoder includes a frequency transform unit, a pre-filter, and a color conversion unit that converts a pixel signal of a first color space inputted from outside into a pixel signal of a second color space including a luminance signal and chrominance signals. The decoder includes a frequency inverse transform unit, a post-filter, and a color inverse conversion unit that inversely converts a pixel signal of the second color space into a pixel signal of the first color space. The pre-filter performs prefiltering on one or plural specific signals among the luminance and chrominance signals. The post-filter does not perform postfiltering on the above specific signals.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: October 29, 2013
    Assignee: MegaChips Corporation
    Inventors: Atsushi Uchiyama, Yujiro Tani, Hiromu Hasegawa
  • Patent number: 8494293
    Abstract: The image processor 1 includes a frequency transform unit 12, an encoding unit 15, and a memory 4. The encoding unit 15 includes a DC processing unit 31 that generates a direct-current stream, an LP processing unit 32 that generates a low-frequency stream, an HP processing unit 33 that generates an upper high-frequency stream and a lower high-frequency stream, and an output unit 34 having output ports 41 to 44 to output the direct-current stream, the low-frequency stream, the upper high-frequency stream, and the lower high-frequency stream to the memory 4.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: July 23, 2013
    Assignee: MegaChips Corporation
    Inventors: Yusuke Mizuno, Yujiro Tani
  • Patent number: 8369634
    Abstract: A sorting unit sorts a plurality of data sets of HP component having been processed by a decoding unit, selectively employing one of a first table corresponding to a first orientation of prediction and a second table corresponding to a second orientation of prediction in accordance with an orientation of prediction of HP component. The sorting unit includes an inverse prediction unit performing inverse prediction on data of LP component inputted from the decoding unit, a processing unit obtaining an orientation of prediction of HP component, based on the data of LP component after inverse prediction by the inverse prediction unit, and a selecting unit selecting one of the first and second tables, based on the orientation of prediction of HP component obtained by the processing unit.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: February 5, 2013
    Assignee: MegaChips Corporation
    Inventors: Nobuhiro Minami, Yujiro Tani, Yusuke Mizuno, Hideki Daian, Masahiro Moriyama, Hiromu Hasegawa
  • Patent number: 8315471
    Abstract: An image processor includes a frequency transform unit performing frequency transform independently on a luminance signal and plural chrominance signals and outputting an item of frequency data of the luminance signal and plural items of frequency data of the chrominance signals, and a quantization unit performing quantization independently on plural items of frequency data inputted from the frequency transform unit. The quantization unit performs quantization on one or plural specific items of frequency data corresponding to a signal with noise among the frequency data of the luminance signal and the chrominance signals, employing a quantization coefficient having a value greater than “1”, and performs quantization on frequency data apart from the specific items of frequency data, employing a quantization coefficient having a value “1”.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: November 20, 2012
    Assignee: MegaChips Corporation
    Inventors: Atsushi Uchiyama, Yujiro Tani, Hiromu Hasegawa
  • Patent number: 8270740
    Abstract: On the first hierarchical layer, the input image adjuster selects an overlap processing area from a frequency-unconverted image. On the first hierarchical layer, the overlap processor performs overlap processing on the overlap processing area, and holds the image data of the remaining processing areas, which cannot be frequency-converted. The remaining processing area, which is a linear area, can have an image width reduced down to the displacement between the overlap processing area and the block areas. The processes on the second hierarchical layer are identical to those on the first hierarchical layer. As a result, the encoder maximizes the advantage of the high performance achieved by hardware implementation.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: September 18, 2012
    Assignee: MegaChips Corporation
    Inventor: Yujiro Tani
  • Patent number: 8239411
    Abstract: A first sorting unit includes a second sorting unit that sorts first frequency data for luminance based on a first table, a third sorting unit that sorts second frequency data for chrominance based on a second table, a fourth sorting unit that sorts third frequency data for chrominance based on a third table, and an updating unit that updates the second and third tables based on nonzero information on the first and second frequency data before the third and fourth sorting units start sorting.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: August 7, 2012
    Assignee: MegaChips Corporation
    Inventors: Yujiro Tani, Kazuyuki Takahashi
  • Patent number: 8224081
    Abstract: In a first input step from outside to an image processor, a signal input unit inputs to a pre-filter a first part of first luminance signals inputted from outside, which is a part to be processed by the pre-filter in the first input step, and stores a remaining second part of the first luminance signals in the memory unit. In a second input step following the first input step, the signal input unit inputs to the pre-filter the second part of the first luminance signals read from the memory unit and a first part of second luminance signals inputted from outside, which is a part to be processed by the pre-filter in the second input step, and stores a remaining second part of the second luminance signals in the memory unit.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: July 17, 2012
    Assignee: MegaChips Corporation
    Inventors: Yujiro Tani, Atsushi Uchiyama
  • Patent number: 8204342
    Abstract: An image processor includes a frequency transform unit performing frequency transform on a first pixel block as a target block, and a pre-filter performing prefiltering with a region which overlaps with plural unit regions for processing by the frequency transform unit as a unit region for processing, before frequency transform is performed. The pre-filter performs prefiltering on a second pixel block being a predetermined number of pixels each larger horizontally and vertically than the first pixel block as a target block. The pre-filter performs prefiltering sequentially on a plurality of second pixel blocks aligned horizontally. The number of pixel signals in a vertical direction within a group of pixel signals continuously inputted to the pre-filter for prefiltering is equal to the number of rows in the second pixel block.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: June 19, 2012
    Assignee: MegaChips Corporation
    Inventors: Yujiro Tani, Atsushi Uchiyama
  • Patent number: 8160377
    Abstract: A symbol generation part serially inputs a data string of quantization data. If quantization data of non-zero coefficient is inputted, respective information on an absolute value, a zero run and a sign of the non-zero coefficient are stored in registers. When quantization data of the next non-zero coefficient is inputted, the respective information on the absolute value, the zero run and the sign stored in the registers are updated. At that time, the contents of the registers which have been stored immediately before the input are outputted as symbol data of the immediately preceding non-zero coefficient.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: April 17, 2012
    Assignee: MegaChips Corporation
    Inventors: Yujiro Tani, Yusuke Mizuno, Hideki Daian, Nobuhiro Minami, Masahiro Moriyama, Hiromu Hasegawa
  • Patent number: 8160376
    Abstract: An image compression apparatus performs quantization of DC component data, low-pass component data and high-pass component data which are generated by frequency conversion of still image data. An extracting part extracts additional data and coding object data which is to be entropy coded, from quantization data. An entropy coding part performs entropy coding of the coding object data stored in a coding object data memory. An additional data processing part generates a flex bit from the additional data. A pattern information generation part acquires the coding object data directly from the extracting part, to generate pattern information indicating whether the coding object data is zero or not. A bit stream generation part outputs the pattern information, the coding object data and the flex bit in a predetermined order, to output a bit stream.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: April 17, 2012
    Assignee: MegaChips Corporation
    Inventors: Masahiro Moriyama, Yujiro Tani, Yusuke Mizuno, Hideki Daian, Nobuhiro Minami, Hiromu Hasegawa
  • Patent number: 8107746
    Abstract: A decoding unit includes a first processing unit including ND decoding units and decoding a group of Normal Data, a second processing unit decoding a group of Flex Bits, and a selector. The ND decoding units perform decoding of the group of Normal Data, stepwise varying a start position of decoding in the data stream, concurrently with decoding of the group of Flex Bits by the second processing unit. The selector selects one ND decoding unit with a start position of decoding being set at a position immediately following an end position of the group of Flex Bits, from the ND decoding units, based on a result of decoding of the group of Flex Bits.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: January 31, 2012
    Assignee: MegaChips Corporation
    Inventors: Hideki Daian, Yujiro Tani, Yusuke Mizuno, Nobuhiro Minami, Masahiro Moriyama, Hiromu Hasegawa