Abstract: Provided is a gas generator including in a housing having a top plate, a bottom plate and a circumferential wall provided with a gas discharge port; a first combustion chamber arranged on the side of the top plate; a second combustion chamber arranged on the side of the bottom plate; a plenum chamber facing the gas discharge port and arranged between the first combustion chamber and the second combustion chamber; a first igniter for igniting and burning a first gas generating agent in the first combustion chamber; and a second igniter for igniting and burning a second gas generating agent in the second combustion chamber.

Abstract: The present invention provides a gas generator including: a housing including a top plate, a bottom plate axially opposite to the top plate, and a circumferential wall located between the top plate and the bottom plate and provided with a gas discharge port; a partition wall having a single connection hole and a second communication hole, the partition wall being radially disposed in the housing to partition an interior of the housing into a first combustion chamber on the side of the top plate, which accommodates a first gas generating agent, and a second combustion chamber on the side of the bottom plate, which accommodates a second gas generating agent; an inner cylindrical member disposed in the housing to enclose the first igniter attached to the bottom plate, such that a second end opening side thereof passes through the connection hole in the partition wall in order to be located within the first combustion chamber, closer to the top plate than the partition wall is, and to be spaced from the top p

Abstract: According to the present invention, there is provided a water-repellent protective film-forming chemical liquid containing: a first solvent being at least one kind selected from the group consisting of an ether solvent and a hydrocarbon solvent; a second solvent being a glycol ether; a silylation agent represented by the following general formula [1]; and a base represented by the following general formula [2] and/or the following general formula [3], wherein the concentration of the second solvent in the chemical liquid is 1 to 30 mass %, wherein the concentration of the silylation agent in the chemical liquid is 2 to 15 mass %, wherein the concentration of the base in the chemical liquid is 0.05 to 2 mass %, and wherein the mass ratio of the silylation agent to the base is 4.5 or greater.

Abstract: The present invention provides a gas generator including: a housing having a top plate, a bottom plate located axially opposite to the top plate, and a circumferential wall located between the top plate and the bottom plate and provided with a gas discharge port; a partition wall provided with a single first communication hole, the partition wall being radially disposed in the housing to partition an interior of the housing into a first combustion chamber on the side of the top plate, which accommodates a first gas generating agent, and a second combustion chamber on the side of the bottom plate, which accommodates a second gas generating agent; a cylindrical guide member disposed between the first igniter attached to the bottom surface and the first communication hole, and provided with a second communication hole in a cylindrical wall thereof, the cylindrical guide member being disposed so as to enclose the first igniter, such that a second end opening thereof is connected to the first communication hole

Abstract: The present invention provides a gas generator including in a housing having a top plate, a bottom plate and a circumferential wall provided with a gas discharge port, a first combustion chamber arranged on the side of the top plate, a second combustion chamber arranged on the side of the bottom plate, and a plenum chamber facing the gas discharge port and arranged between the first combustion chamber and the second combustion chamber, a first igniter and a second igniter mounted to the bottom plate, the first igniter for igniting and burning a first gas generating agent in the first combustion chamber, and the second igniter for igniting and burning a second gas generating agent in the second combustion chamber; the first combustion chamber being a space surrounded by the inner cylinder, the first annular retainer and the top plate, the plenum chamber being a space surrounded by the inner cylinder, the first annular retainer, the circumferential wall of the housing provided with the gas discharge port and

Abstract: Disclosed are a water-repellent protective film forming agent for forming a water-repellent protective film on a silicon element-containing surface of a wafer and a water-repellent protective film forming liquid chemical in which the water-repellent protective film forming agent is dissolved in an organic solvent, characterized in that the water-repellent protective film forming agent consists of at least one kind of silicon compound selected from the group consisting of a sulfonimide derivative represented by the following general formula [1], a sulfonimide derivative represented by the following general formula [2] and a sulfonmethide derivative represented by the following general formula [3].

Abstract: A mounting substrate that includes external connection electrodes on a rear surface of a base material, and mounting electrodes on a front surface of the base material. In-hole electrodes connect the external connection electrodes and the mounting electrodes. A reflective film containing Al is located between the base material and the mounting electrodes. The reflective film is covered with an insulating film layer.

Abstract: To provide a water-repellent protective film-forming liquid chemical used in a process of cleaning a wafer by means of a cleaning machine whose liquid contact member contains a vinyl chloride resin. A liquid chemical is used, which includes an alkoxysilane represented by the following general formula [1]; at least one kind selected from the group consisting of a sulfonic acid represented by the following general formula [2], an anhydride of the sulfonic acid, a salt of the sulfonic acid and a sulfonic acid derivative represented by the following general formula [3]; and a diluent solvent containing at least one kind selected from the group consisting of a hydrocarbon, an ether and a thiol.

Abstract: Provided herein is a method for cleaning a wafer having a fine uneven surface pattern that at least partially contains a silicon element using a wafer cleaning device that includes a vinyl chloride resin as a liquid contacting member, the method including retaining a water-repellent protective film-forming chemical in at least a recessed portion of the uneven pattern to form a water-repellent protective film on a surface of the recessed portion, the water-repellent protective film-forming chemical containing: a monoalkoxysilane represented by the following general formula [1], (R1)aSi(H)3-a(OR2)??[1]; a sulfonic acid represented by the following general formula [2], R3—S(?O)2OH??[2]; and a diluting solvent, wherein the diluting solvent contains 80 to 100 mass % of alcohol with respect to the total 100 mass % of the diluting solvent.

Abstract: A mounting substrate that includes external connection electrodes on a rear surface of a base material, and mounting electrodes on a front surface of the base material. In-hole electrodes connect the external connection electrodes and the mounting electrodes. A reflective film containing Al is located between the base material and the mounting electrodes. The reflective film is covered with an insulating film layer.

Abstract: The generation of a variation in properties of vertical transistors is restrained. A vertical MOS transistor is formed in a semiconductor substrate. A first interlayer dielectric film and a first source wiring are formed over the front surface of the substrate. The first source wiring is formed over the first interlayer dielectric film, and is overlapped with the vertical MOS transistor as viewed in plan. Contacts are buried in the first interlayer dielectric film. Through the contacts, an n-type source layer of vertical MOS transistor is coupled with the first source wiring. Openings are made in the first source wiring.

Abstract: A method for manufacturing a semiconductor device, includes forming a recess over a surface of an n-type semiconductor substrate, forming a gate insulation film over an inner wall and a bottom face of the recess, embedding a gate electrode into the recess, forming a p-type base layer in a surface layer of the semiconductor substrate so as to be shallower than the recess, and forming an n-type source layer in the p-type base layer so as to be shallower than the p-type base layer. An impurity profile of the p-type base layer in a thickness direction includes a first peak, a second peak being located closer to a bottom face side of the semiconductor substrate than the first peak and being higher than the first peak, and a third peak located between the first peak and the second peak by implanting impurity ions three times or more at ion implantation energies different from each other in the forming of the p-type base layer.

Abstract: A method for manufacturing a semiconductor device, includes forming a recess over a surface of an n-type semiconductor substrate, forming a gate insulation film over an inner wall and a bottom face of the recess, embedding a gate electrode into the recess, forming a p-type base layer in a surface layer of the semiconductor substrate so as to be shallower than the recess, and forming an n-type source layer in the p-type base layer so as to be shallower than the p-type base layer. An impurity profile of the p-type base layer in a thickness direction includes a first peak, a second peak being located closer to a bottom face side of the semiconductor substrate than the first peak and being higher than the first peak, and a third peak located between the first peak and the second peak by implanting impurity ions three times or more at ion implantation energies different from each other in the forming of the p-type base layer.

Abstract: A method for manufacturing a semiconductor device includes forming a recess over a surface of an n-type semiconductor substrate, forming a gate insulation film over an inner wall and a bottom face of the recess, embedding a gate electrode into the recess, forming a p-type base layer in the surface layer of the substrate so as to be shallower than the recess; and forming an n-type source layer in the p-type base layer so as to be shallower than the p-type base layer. The impurity profile of the p-type base layer in a thickness direction includes a second peak being located closer to a bottom face side of the substrate than the first peak and being higher than the first peak, and a third peak located between the first peak and the second peak by implanting impurity ions three times or more at ion implantation energies different from each other.

Abstract: The generation of a variation in properties of vertical transistors is restrained. A vertical MOS transistor is formed in a semiconductor substrate. A first interlayer dielectric film and a first source wiring are formed over the front surface of the substrate. The first source wiring is formed over the first interlayer dielectric film, and is overlapped with the vertical MOS transistor as viewed in plan. Contacts are buried in the first interlayer dielectric film. Through the contacts, an n-type source layer of vertical MOS transistor is coupled with the first source wiring. Openings are made in the first source wiring.

Abstract: The generation of a variation in properties of vertical transistors is restrained. A vertical MOS transistor is formed in a semiconductor substrate. A first interlayer dielectric film and a first source wiring are formed over the front surface of the substrate. The first source wiring is formed over the first interlayer dielectric film, and is overlapped with the vertical MOS transistor as viewed in plan. Contacts are buried in the first interlayer dielectric film. Through the contacts, an n-type source layer of vertical MOS transistor is coupled with the first source wiring. Openings are made in the first source wiring.

Abstract: The generation of a variation in properties of vertical transistors is restrained. A vertical MOS transistor is formed in a semiconductor substrate. A first interlayer dielectric film and a first source wiring are formed over the front surface of the substrate. The first source wiring is formed over the first interlayer dielectric film, and is overlapped with the vertical MOS transistor as viewed in plan. Contacts are buried in the first interlayer dielectric film. Through the contacts, an n-type source layer of vertical MOS transistor is coupled with the first source wiring. Openings are made in the first source wiring.

Abstract: A method for manufacturing a semiconductor device includes forming a recess over a surface of an n-type semiconductor substrate, forming a gate insulation film over an inner wall and a bottom face of the recess, embedding a gate electrode into the recess, forming a p-type base layer in the surface layer of the substrate so as to be shallower than the recess; and forming an n-type source layer in the p-type base layer so as to be shallower than the p-type base layer. The impurity profile of the p-type base layer in a thickness direction includes a second peak being located closer to a bottom face side of the substrate than the first peak and being higher than the first peak, and a third peak located between the first peak and the second peak by implanting impurity ions three times or more at ion implantation energies different from each other.

Abstract: The present invention makes it possible to inhibit an SOA (Safe Operating Area) in a vertical-type bipolar transistor from narrowing. A p-type base layer 150 includes a first peak, a second peak, and a third peak in an impurity profile in the thickness direction. The first peak is located on the topmost surface side of a semiconductor substrate 100. The second peak is located closer to the bottom face side of the semiconductor substrate 100 than the first peak and higher than the first peak. The third peak is located between the first peak and the second peak.

Abstract: An identification device capable of improving identification accuracy. The identification device performs identification according to a face area contained in image data. Feature data is extracted from a face area in each of frames of image data. The extracted feature data is registered in a person database section. Identification is performed through comparison between the feature data registered in the person database section and the extracted feature data. A tracking section identifies an identical face area in consecutive frames. If a face area is identified in a first frame, but a face area in a second frame following the first frame, which is identified by the tracking section as identical to the identified face area in the first frame, is not identified, the extracted feature data associated with the face area in the second frame is registered as additional feature data in the person database section.