Patents by Inventor Yuki Matsuura

Yuki Matsuura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7061019
    Abstract: A circuit array substrate is provided with thin-film transistors 4 and 5 and PIN diode 6 formed on insulation substrate 3. Active layer 11 and photo-electric sensor portion 21 are made of poly-silicon films. Impurities are doped into active layer 11 and photo-electric sensor portion 21 in the same process chamber, if necessary, to make their impurity concentrations different from each other. Thin-film transistors 4 and 5 with prescribed characteristics and PIN diode 6 with improved photosensitivity can be simultaneously, easily manufactured on insulation substrate 3 with a lesser number of processes.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: June 13, 2006
    Assignee: Toshiba Matsushita Display Technology Co., Ltd.
    Inventors: Arichika Ishida, Masayoshi Fuchi, Yuki Matsuura, Norio Tada
  • Publication number: 20050218407
    Abstract: A gate insulating film is formed on a glass substrate on which a plurality of polysilicon films are formed as islands. A first meal layer formed on the gate insulating film is patterned to form gate electrodes on the gate insulating film facing a polysilicon layer which gives rise to thin film transistors. A second metal layer is formed on the gate insulating film to cover the gate electrodes. Wiring portions are stacked on the gate electrodes of the thin film transistors.
    Type: Application
    Filed: June 1, 2005
    Publication date: October 6, 2005
    Inventors: Yuki Matsuura, Arichika Ishida
  • Publication number: 20050175912
    Abstract: An improved electrophotographic photosensitive device is disclosed. The device comprises a photosensitive layer coupled to a conductive substrate. The photosensitive layer preferably includes a vinyl chloride resin and the vinyl chloride resin preferably comprises an acid esterified vinyl chloride polymer having polymer hydroxy groups, epoxy groups and strong acid radicals as substituent groups, so that the epoxy groups and the hydroxy groups are partially esterified.
    Type: Application
    Filed: January 7, 2005
    Publication date: August 11, 2005
    Inventors: Ikuo Takaki, Yoichi Nakamura, Yuki Matsuura
  • Publication number: 20050017318
    Abstract: A circuit array substrate is provided with thin-film transistors 4 and 5 and PIN diode 6 formed on insulation substrate 3. Active layer 11 and photo-electric sensor portion 21 are made of poly-silicon films. Impurities are doped into active layer 11 and photo-electric sensor portion 21 in the same process chamber, if necessary, to make their impurity concentrations different from each other. Thin-film transistors 4 and 5 with prescribed characteristics and PIN diode 6 with improved photosensitivity can be simultaneously, easily manufactured on insulation substrate 3 with a lesser number of processes.
    Type: Application
    Filed: July 12, 2004
    Publication date: January 27, 2005
    Applicant: Toshiba Matsushita Display Technology Co., Ltd
    Inventors: Arichika Ishida, Masayoshi Fuchi, Yuki Matsuura, Norio Tada
  • Patent number: 6288342
    Abstract: An insulated wire having excellent fabricability causing no cracking in the film even after severe winding or rolling fabrication and also having heat resistance comparable to that of polyamideimide is disclosed, in which a first insulation layer of a thermosetting resin composition having a Tg of 250° C. or higher is formed on a conductor, on which a second insulation layer formed of a mixture of a thermosetting resin composition having a Tg of 250° C. or higher and a thermoplastic resin composition having a Tg of 140° C.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: September 11, 2001
    Assignees: Sumitomo Electric Industries, Ltd., Denso Corporation
    Inventors: Isao Ueoka, Masaaki Yamauchi, Masaharu Kurata, Yoshihiro Nakazawa, Yuki Matsuura, Hideyuki Hashimoto, Hiromitu Asai, Shinichi Matsubara, Makoto Takahashi
  • Patent number: 6194023
    Abstract: A method of manufacturing a poly-crystalline silicon (p-Si) film includes the steps in which an excimer laser anneals an amorphous silicon (a-Si) film deposited on a glass substrate and makes the same into the poly-crystalline silicon while the glass substrate is moved in a moving direction relative to the laser. Prior to carrying out the annealing step, a couple of the laser pulses are applied to different places of the a-Si film, provided that each of the laser pulses has different energy fluence and one pulse at a time is applied to the a-Si film. The pulse applied area is divided into two sections by a reference line perpendicular to the moving direction of the glass substrate. Average grain sizes of the p-Si film in the two sections are compared to each other to determine the moving direction.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: February 27, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Mitsuhashi, Yuki Matsuura, Takashi Fujimura, Nobuo Imai, Yasumasa Goto
  • Patent number: 5970368
    Abstract: There is disclosed a method for manufacturing a polycrystal semiconductor film comprising the steps of applying a high energy beam to a surface of a semiconductor film comprising an amorphous or a polycrystal semiconductor provided on a surface of a substrate to melt only the semiconductor film, and solidifying the film via a solid and liquid coexisting state to form a semiconductor film comprising a polycrystal semiconductor having a large grain diameter, by heating a liquid part using a difference in an electric resistance in the liquid and solid coexisting state to heat only the liquid part, and by extending the solidification time until the completion of solidifying of the molten liquid crystal film. Furthermore, as the base film of the semiconductor film, a material having a melting point of 1600.degree. C. and a thermal conductivity of 0.01 cal/cm.s..degree. C.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: October 19, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Sasaki, Michihiro Oose, Isao Suzuki, Shiro Takeno, Mitsuhiro Tomita, Yoshito Kawakyu, Yuki Matsuura, Hiroshi Mitsuhashi
  • Patent number: 5393612
    Abstract: An insulated wire comprising a conductor and an insulating coating which has a tensile strength of at least 13 kg/mm.sup.2 and a Young's modulus of at least 270 kg/mm.sup.2, which has good flexibility and resistance to flaw.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: February 28, 1995
    Assignees: Sumitomo Electric Industries, Ltd., Nippondenso Co., Ltd.
    Inventors: Yuki Matsuura, Isao Ueoka, Koichi Iwata, Hiromitsu Kawabe, Yoshitaka Natsume
  • Patent number: 5356708
    Abstract: An insulated wire comprising a conductor and an insulating coating made from a polyamideimide base coating, which polyamideimide is made of an acid component and a diisocyanate component containing 10 to 80 % by mole of an aromatic diisocyanate compound of the formula: ##STR1## or which polyamideimide is made of an diisocyanate component and an imidodicarboxylic acid that is a reaction product of an acid component and a diamine component, in which the diamine component contains an aromatic diamine compound of the formula: ##STR2## and/or the diisocyanate component contains the above aromatic diisocyanate compound in such an amount that a total amount of the aromatic diamine compound and the diisocyanate compound is from 10 to 80 % by mole based on the total amount of the whole diamine component and the whole diisocyanate component.
    Type: Grant
    Filed: November 23, 1992
    Date of Patent: October 18, 1994
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yuki Matsuura, Isao Ueoka, Koichi Iwata