Abstract: A method for inspecting a semiconductor memory having nonvolatile memory cells using ferroelectric capacitors is disclosed which comprises, after shelf-aging the ferroelectric capacitor in a first polarized state, the steps of: (a) writing a second polarized state opposite to the first polarized state; (b) shelf-aging the ferroelectric capacitor in the second polarized state; and (c) reading the second polarized state. The temperature or voltage in the step (a) is lower than the temperature or voltage in the step (c). This method for inspecting a semiconductor memory enables to evaluate the imprint characteristics in a short time.

Abstract: A semiconductor device includes: a semiconductor substrate; a MOS transistor formed in the semiconductor substrate and having an insulated gate and source/drain regions on both sides of the insulated gate; a ferroelectric capacitor formed above the semiconductor substrate and having a lower electrode, a ferroelectric layer and an upper electrode; a metal film formed on the upper electrode and having a thickness of a half of or thinner than a thickness of the upper electrode; an interlayer insulating film burying the ferroelectric capacitor and the metal film; a conductive plug formed through the interlayer insulating film, reaching the metal film and including a conductive glue film and a tungsten body; and an aluminum wiring formed on the interlayer insulating film and connected to the conductive plug. A new problem near an upper electrode contact is solved which may otherwise be caused by adopting a W plug over the F capacitor.

Abstract: A PLZT film (30) is formed as the material film of a capacitor dielectric film and a top electrode film (31) is formed on the PLZT film (30). The top electrode film (31) comprises two IrOx films having different composition. Subsequently, back face of a semiconductor substrate (11) is cleaned and an Ir adhesion film (32) is formed on the top electrode film (31). Substrate temperature is set at 400° C. or above at that time. Thereafter, a TiN film and a TEOS film are formed sequentially as a hard mask. In such a method, carbon remaining on the top electrode film (31) after cleaning the back face is discharged into the chamber while the temperature of the semiconductor substrate (11) is kept at 400° C. or above in order to form the Ir adhesion film (32). Consequently, adhesion is enhanced between a TiN film being formed subsequently and the Ir adhesion film (32) thus preventing the TiN film from being stripped.

Abstract: A semiconductor device manufacturing method, includes a step of forming refractory metal silicide layers 13a to 13c in a partial area of a semiconductor substrate 10, a step of forming an interlayer insulating film 21 on the refractory metal silicide layers 13a to 13c, a step of forming a first conductive film 31, a ferroelectric film 32, and a second conductive film 33 in sequence on the interlayer insulating film 21, a step of forming a capacitor Q consisting of a lower electrode 31a, a capacitor dielectric film 32a, and an upper electrode 33a by patterning the first conductive film 33, the ferroelectric film 32, and the second conductive film 31, and a step of performing an annealing for an annealing time to suppress a agglomeration area of the refractory metal silicide layers 13a to 13c within an upper limit area.

Abstract: There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing insulating layer formed on the first insulating layer to cover side surfaces of the oxygen-barrier metal layer, a capacitor having a lower electrode formed on the oxygen-barrier metal layer and the oxidation-preventing insulating layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a second insulating layer for covering the capacitor and the oxidation-preventing insulating layer, a third hole formed in respective layers from the second insulating layer to the oxidation-preventing insulating layer on the second conductive plug, and a third conductive plug formed in the third hole and connected to the second conductive plug.

Abstract: A method for inspecting a semiconductor memory having nonvolatile memory cells using ferroelectric capacitors is disclosed which comprises, after shelf-aging the ferroelectric capacitor in a first polarized state, the steps of: (a) writing a second polarized state opposite to the first polarized state; (b) shelf-aging the ferroelectric capacitor in the second polarized state; and (c) reading the second polarized state. The temperature or voltage in the step (a) is lower than the temperature or voltage in the step (c). This method for inspecting a semiconductor memory enables to evaluate the imprint characteristics in a short time.

Abstract: A semiconductor device manufacturing method, includes a step of forming refractory metal silicide layers 13a to 13c in a partial area of a semiconductor substrate 10, a step of forming an interlayer insulating film 21 on the refractory metal silicide layers 13a to 13c, a step of forming a first conductive film 31, a ferroelectric film 32, and a second conductive film 33 in sequence on the interlayer insulating film 21, a step of forming a capacitor Q consisting of a lower electrode 31a, a capacitor dielectric film 32a, and an upper electrode 33a by patterning the first conductive film 33, the ferroelectric film 32, and the second conductive film 31, and a step of performing an annealing for an annealing time to suppress a agglomeration area of the refractory metal silicide layers 13a to 13c within an upper limit area.

Abstract: A semiconductor device includes: a semiconductor substrate; a MOS transistor formed in the semiconductor substrate and having an insulated gate and source/drain regions on both sides of the insulated gate; a ferroelectric capacitor formed above the semiconductor substrate and having a lower electrode, a ferroelectric layer and an upper electrode; a metal film formed on the upper electrode and having a thickness of a half of or thinner than a thickness of the upper electrode; an interlayer insulating film burying the ferroelectric capacitor and the metal film; a conductive plug formed through the interlayer insulating film, reaching the metal film and including a conductive glue film and a tungsten body; and an aluminum wiring formed on the interlayer insulating film and connected to the conductive plug. A new problem near an upper electrode contact is solved which may otherwise be caused by adopting a W plug over the F capacitor.

Abstract: A PLZT film (30) is formed as the material film of a capacitor dielectric film and a top electrode film (31) is formed on the PLZT film (30). The top electrode film (31) comprises two IrOx films having different composition. Subsequently, back face of a semiconductor substrate (11) is cleaned and an Ir adhesion film (32) is formed on the top electrode film (31). Substrate temperature is set at 400° C. or above at that time. Thereafter, a TiN film and a TEOS film are formed sequentially as a hard mask. In such a method, carbon remaining on the top electrode film (31) after cleaning the back face is discharged into the chamber while the temperature of the semiconductor substrate (11) is kept at 400° C. or above in order to form the Ir adhesion film (32). Consequently, adhesion is enhanced between a TiN film being formed subsequently and the Ir adhesion film (32) thus preventing the TiN film from being stripped.

Abstract: A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.

Abstract: A method of the present invention of manufacturing a semiconductor memory device provided with a capacitor over a semiconductor substrate, which has a lamination of a lower electrode made of a first conductive film, a capacitor dielectric film made of a dielectric film, and an upper electrode made of a second conductive film, comprises the steps of forming an insulating film, forming a capacitor on the insulating film, forming a dielectric monitor that is made of same material and has a same layer structure as the capacitor on the insulating film, measuring characteristics of the dielectric monitor in middle of a step of forming the capacitor, and evaluating the capacitor based on measured results of the characteristics of the dielectric monitor.

Abstract: A semiconductor device having conductive plug for connecting capacitor and conductive pattern, comprises first and second impurity diffusion regions formed in a semiconductor substrate, a first insulating film formed over the semiconductor substrate, a first hole formed in the first insulating film on the first impurity diffusion region, a first conductive plug formed in the first hole and made of a metal film, a second hole formed in the first insulating film on the second impurity diffusion region, a second conductive plug formed in the second hole and made of conductive material that is hard to be oxidized rather than the metal film, and a capacitor that consists of a lower electrode connected to an upper surface of the second conductive plug, a dielectric film, and an upper electrode.

Abstract: There is provided a semiconductor device which includes a capacitor including a lower electrode, a dielectric film, and an upper electrode, a first protection film formed on the capacitor, a first wiring formed on the first protection film, a first insulating film formed on the first wiring, a second wiring formed on the first insulating film, a second insulating film formed on the second wiring, and at least one of a second protection film formed between the first insulating film and the first wiring to cover at least the capacitor and a third protection film formed on the second insulating film to cover the capacitor and set to an earth potential. Accordingly, the degradation of the ferroelectric capacitor formed under the multi-layered wiring structure can be suppressed.

Abstract: A method of the present invention of manufacturing a semiconductor memory device provided with a capacitor over a semiconductor substrate, which has a lamination of a lower electrode made of a first conductive film, a capacitor dielectric film made of a dielectric film, and an upper electrode made of a second conductive film, comprises the steps of forming an insulating film, forming a capacitor on the insulating film, forming a dielectric monitor that is made of same material and has a same layer structure as the capacitor on the insulating film, measuring characteristics of the dielectric monitor in middle of a step of forming the capacitor, and evaluating the capacitor based on measured results of the characteristics of the dielectric monitor.

Abstract: There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing insulating layer formed on the first insulating layer to cover side surfaces of the oxygen-barrier metal layer, a capacitor having a lower electrode formed on the oxygen-barrier metal layer and the oxidation-preventing insulating layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a second insulating layer for covering the capacitor and the oxidation-preventing insulating layer, a third hole formed in respective layers from the second insulating layer to the oxidation-preventing insulating layer on the second conductive plug, and a third conductive plug formed in the third hole and connected to the second conductive plug.

Abstract: There is provided a semiconductor device which comprises a capacitor including a lower electrode, a dielectric film, and an upper electrode, a first protection film formed on the capacitor, a first wiring formed on the first protection film, a first insulating film formed on the first wiring, a second wiring formed on the first insulating film, a second insulating film formed on the second wiring, and at least one of a second protection film formed between the first insulating film and the first wiring to cover at least the capacitor and a third protection film formed on the second insulating film to cover the capacitor and set to an earth potential. Accordingly, the degradation of the ferroelectric capacitor formed under the multi-layered wiring structure can be suppressed.

Abstract: A semiconductor device having conductive plug for connecting capacitor and conductive pattern, comprises first and second impurity diffusion regions formed in a semiconductor substrate, a first insulating film formed over the semiconductor substrate, a first hole formed in the first insulating film on the first impurity diffusion region, a first conductive plug formed in the first hole and made of a metal film, a second hole formed in the first insulating film on the second impurity diffusion region, a second conductive plug formed in the second hole and made of conductive material that is hard to be oxidized rather than the metal film, and a capacitor that consists of a lower electrode connected to an upper surface of the second conductive plug, a dielectric film, and an upper electrode.

Abstract: There is provided a semiconductor device which comprises a capacitor including a lower electrode, a dielectric film, and an upper electrode, a first protection film formed on the capacitor, a first wiring formed on the first protection film, a first insulating film formed on the first wiring, a second wiring formed on the first insulating film, a second insulating film formed on the second wiring, and at least one of a second protection film formed between the first insulating film and the first wiring to cover at least the capacitor and a third protection film formed on the second insulating film to cover the capacitor and set to an earth potential. Accordingly, the degradation of the ferroelectric capacitor formed under the multi-layered wiring structure can be suppressed.

Abstract: There are provided the steps of forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.

Abstract: A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.