Abstract: There is provided a semiconductor device which comprises a capacitor including a lower electrode, a dielectric film, and an upper electrode, a first protection film formed on the capacitor, a first wiring formed on the first protection film, a first insulating film formed on the first wiring, a second wiring formed on the first insulating film, a second insulating film formed on the second wiring, and at least one of a second protection film formed between the first insulating film and the first wiring to cover at least the capacitor and a third protection film formed on the second insulating film to cover the capacitor and set to an earth potential. Accordingly, the degradation of the ferroelectric capacitor formed under the multi-layered wiring structure can be suppressed.

Abstract: There are provided the steps of forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.

Abstract: A method of manufacturing a semiconductor device including the steps of: (a) transporting a semiconductor wafer into a plasma process system, the semiconductor wafer having a semiconductor layer, a field insulating film and a gate insulating film formed on the semiconductor layer, said gate insulating film having a breakdown voltage of B (V) and a thickness of 10 nm or thinner, a conductive layer of a structured antenna formed on the gate insulating film and the field insulating film, the conductive layer having an antenna ratio of 500 or higher, and an insulating material pattern formed on the conductive layer, the insulating material pattern having an opening with an aspect ratio larger than 1; and (b) processing the semiconductor wafer in plasma having an electron temperature of Te (eV) equal to or less than B. With this method, it is possible to prevent damages to a gate insulating film even during a fine pattern process.

Abstract: A method for measuring electron density n.sub.p of a plasma in a plasma reaction chamber for semiconductor fabrication processes is capable of an accurate measurement without time-drifting of measuring values and metal contamination to semiconductor wafers. The method comprises injecting electrons in the plasma to generate a plasma oscillation, getting a plasma oscillation frequency .omega..sub.p by antenna and frequency analyzer, and easily computing n.sub.p by a well-known formula using the value of .omega..sub.p. A plasma generating apparatus for semiconductor fabrication processes is capable of keeping the electron density in a plasma reaction chamber constant. The apparatus comprises feed-back circuits for feeding back a deviation signal of the computed (n.sub.p) from a presetting value to an RF oscillator or a gas control unit so as to control RF power or pressure of a source gas, respectively.