Patents by Inventor Yukio Maehashi
Yukio Maehashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10164612Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.Type: GrantFiled: September 1, 2016Date of Patent: December 25, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yukio Maehashi, Seiichi Yoneda, Wataru Uesugi
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Patent number: 10079053Abstract: An object is to provide a memory element having a novel structure where data can be held even after power supply is stopped. The memory element includes a latch circuit, a first selection circuit, a second selection circuit, a first nonvolatile memory circuit, and a second nonvolatile memory circuit. The first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor and a capacitor. The transistor included in each of the first nonvolatile memory circuit and the second nonvolatile memory circuit is a transistor in which a channel is formed in an oxide semiconductor film. The off-state current of such a transistor is extremely small. The transistor is turned off after data is input to a node where the transistor and the capacitor are connected to each other, and data can be held for a long time even after supply of power supply voltage is stopped.Type: GrantFiled: April 11, 2012Date of Patent: September 18, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuro Ohmaru, Yukio Maehashi
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Patent number: 9935143Abstract: A small semiconductor device suitable for high-speed operation is provided. The semiconductor device includes a first circuit, a global bit line pair for writing, a global bit line pair for reading, and a local bit line pair. The first circuit includes second to fifth circuits. The second to fifth circuits are electrically connected to each other by the local bit line pair. The second circuit functions as a read/write selection switch. The third circuit functions as a working memory that stores 1-bit complementary data temporarily. The fourth circuit has a function of precharging the local bit line pair. The fifth circuit includes n (n is an integer of 2 or more) sixth circuits. The sixth circuits each have a function of retaining 1-bit complementary data written from the third circuit.Type: GrantFiled: September 21, 2016Date of Patent: April 3, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuro Ohmaru, Yukio Maehashi
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Publication number: 20170092674Abstract: A small semiconductor device suitable for high-speed operation is provided. The semiconductor device includes a first circuit, a global bit line pair for writing, a global bit line pair for reading, and a local bit line pair. The first circuit includes second to fifth circuits. The second to fifth circuits are electrically connected to each other by the local bit line pair. The second circuit functions as a read/write selection switch. The third circuit functions as a working memory that stores 1-bit complementary data temporarily. The fourth circuit has a function of precharging the local bit line pair. The fifth circuit includes n (n is an integer of 2 or more) sixth circuits. The sixth circuits each have a function of retaining 1-bit complementary data written from the third circuit.Type: ApplicationFiled: September 21, 2016Publication date: March 30, 2017Inventors: Takuro OHMARU, Yukio MAEHASHI
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Patent number: 9569713Abstract: To provide a semiconductor device that is capable of displaying data even when a radio signal is not supplied. The semiconductor device includes an antenna, a battery, a sensor, a nonvolatile memory, a first circuit, and a second circuit. Power supplied from the antenna is converted into first power via the first circuit. The battery stores the first power and supplies second power. The sensor performs sensing with the second power. The nonvolatile memory stores analog data acquired by the sensor. The second power is used to store the analog data. The second circuit converts the analog data into digital data with the use of the first power. The nonvolatile memory preferably includes an oxide semiconductor transistor.Type: GrantFiled: October 22, 2015Date of Patent: February 14, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Seiichi Yoneda, Yukio Maehashi
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Publication number: 20160373089Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.Type: ApplicationFiled: September 1, 2016Publication date: December 22, 2016Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yukio MAEHASHI, Siichi YONEDA, Wataru UESUGI
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Patent number: 9438234Abstract: A logic circuit that can retain a state even without power supply is provided. The logic circuit includes a first circuit, a pair of retention circuits, and a second circuit. The pair of retention circuits includes two switches electrically connected to each other in series and a capacitor electrically connected to a connection portion of the two switches. Each of the two switches is formed using an oxide semiconductor transistor. The first circuit has a function of generating complementary data from a piece of input data. The pair of retention circuits retains the complementary data. The second circuit has a function of amplifying the complementary data retained in the pair of retention circuits.Type: GrantFiled: November 18, 2015Date of Patent: September 6, 2016Assignee: Semiconductor Energy Laboratory Co., LTD.Inventors: Yukio Maehashi, Wataru Uesugi
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Patent number: 9438206Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.Type: GrantFiled: August 28, 2014Date of Patent: September 6, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yukio Maehashi, Seiichi Yoneda, Wataru Uesugi
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Patent number: 9406348Abstract: A semiconductor storage device capable of performing low-voltage operation, reducing standby current, and decreasing memory size is provided. The semiconductor storage device is a semiconductor device including first to fourth transistors and a capacitor. The first transistor has a function of supplying a first signal to the capacitor. The capacitor has a function of accumulating electric charge based on the first signal. The second transistor has a function of supplying the electric charge based on the first signal to a gate of the third transistor. The third transistor has a function of outputting a first potential to a wiring and a function of supplying the first potential to a gate of the fourth transistor. The fourth transistor has a function of supplying a second potential to the capacitor through the second transistor.Type: GrantFiled: December 19, 2014Date of Patent: August 2, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yukio Maehashi
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Publication number: 20160149573Abstract: A logic circuit that can retain a state even without power supply is provided. The logic circuit includes a first circuit, a pair of retention circuits, and a second circuit. The pair of retention circuits includes two switches electrically connected to each other in series and a capacitor electrically connected to a connection portion of the two switches. Each of the two switches is formed using an oxide semiconductor transistor. The first circuit has a function of generating complementary data from a piece of input data. The pair of retention circuits retains the complementary data. The second circuit has a function of amplifying the complementary data retained in the pair of retention circuits.Type: ApplicationFiled: November 18, 2015Publication date: May 26, 2016Inventors: Yukio MAEHASHI, Wataru UESUGI
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Publication number: 20160117584Abstract: To provide a semiconductor device that is capable of displaying data even when a radio signal is not supplied. The semiconductor device includes an antenna, a battery, a sensor, a nonvolatile memory, a first circuit, and a second circuit. Power supplied from the antenna is converted into first power via the first circuit. The battery stores the first power and supplies second power. The sensor performs sensing with the second power. The nonvolatile memory stores analog data acquired by the sensor. The second power is used to store the analog data. The second circuit converts the analog data into digital data with the use of the first power. The nonvolatile memory preferably includes an oxide semiconductor transistor.Type: ApplicationFiled: October 22, 2015Publication date: April 28, 2016Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Seiichi YONEDA, Yukio MAEHASHI
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Patent number: 9300292Abstract: The power consumption of a semiconductor device that can function as a latch circuit or the like is reduced. The semiconductor device includes a first circuit and a switch that controls conduction between an input terminal and the first circuit. The first circuit includes n second circuits (n is an integer of 2 or more) and a variable resistor. An output node of any of the n second circuits is electrically connected to an input node of the second circuit in a first stage through the variable resistor. The variable resistor can be, for example, a transistor whose channel is formed in an oxide semiconductor layer. A reduction in the number of elements or signals leads to a reduction of the power consumption of the semiconductor device.Type: GrantFiled: January 7, 2015Date of Patent: March 29, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Wataru Uesugi, Yukio Maehashi
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Publication number: 20150200668Abstract: The power consumption of a semiconductor device that can function as a latch circuit or the like is reduced. The semiconductor device includes a first circuit and a switch that controls conduction between an input terminal and the first circuit. The first circuit includes n second circuits (n is an integer of 2 or more) and a variable resistor. An output node of any of the n second circuits is electrically connected to an input node of the second circuit in a first stage through the variable resistor. The variable resistor can be, for example, a transistor whose channel is formed in an oxide semiconductor layer. A reduction in the number of elements or signals leads to a reduction of the power consumption of the semiconductor device.Type: ApplicationFiled: January 7, 2015Publication date: July 16, 2015Inventors: Wataru Uesugi, Yukio Maehashi
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Publication number: 20150187778Abstract: A semiconductor storage device capable of performing low-voltage operation, reducing standby current, and decreasing memory size is provided. The semiconductor storage device is a semiconductor device including first to fourth transistors and a capacitor. The first transistor has a function of supplying a first signal to the capacitor. The capacitor has a function of accumulating electric charge based on the first signal. The second transistor has a function of supplying the electric charge based on the first signal to a gate of the third transistor. The third transistor has a function of outputting a first potential to a wiring and a function of supplying the first potential to a gate of the fourth transistor. The fourth transistor has a function of supplying a second potential to the capacitor through the second transistor.Type: ApplicationFiled: December 19, 2014Publication date: July 2, 2015Inventor: Yukio Maehashi
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Publication number: 20150061742Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.Type: ApplicationFiled: August 28, 2014Publication date: March 5, 2015Inventors: Yukio Maehashi, Seiichi YONEDA, Wataru UESUGI
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Patent number: 8958252Abstract: To provide a signal processing circuit including a nonvolatile memory circuit with a novel structure, the signal processing circuit includes an arithmetic portion, a memory, and a control portion for controlling the arithmetic portion and the memory. The control portion includes a set of a volatile memory circuit and a first nonvolatile memory circuit for storing data held in the volatile memory circuit, the memory includes a plurality of second nonvolatile memory circuits, and the first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor having a channel in an oxide semiconductor layer and a capacitor in which one of a pair of electrodes is electrically connected to a node which is set in a floating state when the transistor is turned off.Type: GrantFiled: May 8, 2014Date of Patent: February 17, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidetomo Kobayashi, Yukio Maehashi
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Publication number: 20140247650Abstract: To provide a signal processing circuit including a nonvolatile memory circuit with a novel structure, the signal processing circuit includes an arithmetic portion, a memory, and a control portion for controlling the arithmetic portion and the memory. The control portion includes a set of a volatile memory circuit and a first nonvolatile memory circuit for storing data held in the volatile memory circuit, the memory includes a plurality of second nonvolatile memory circuits, and the first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor having a channel in an oxide semiconductor layer and a capacitor in which one of a pair of electrodes is electrically connected to a node which is set in a floating state when the transistor is turned off.Type: ApplicationFiled: May 8, 2014Publication date: September 4, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidetomo Kobayashi, Yukio Maehashi
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Patent number: 8742804Abstract: A semiconductor device with low power consumption and a small area is provided. By using a transistor including an oxide semiconductor for a channel as a transistor included in a flip-flop circuit, a divider circuit in which the number of transistors is small, power consumption is low, and the area is small can be achieved. By using the divider circuit, a semiconductor device which operates stably and is highly reliable can be provided.Type: GrantFiled: May 17, 2012Date of Patent: June 3, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Fujita, Yukio Maehashi
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Patent number: 8724407Abstract: To provide a signal processing circuit including a nonvolatile memory circuit with a novel structure, the signal processing circuit includes an arithmetic portion, a memory, and a control portion for controlling the arithmetic portion and the memory. The control portion includes a set of a volatile memory circuit and a first nonvolatile memory circuit for storing data held in the volatile memory circuit, the memory includes a plurality of second nonvolatile memory circuits, and the first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor having a channel in an oxide semiconductor layer and a capacitor in which one of a pair of electrodes is electrically connected to a node which is set in a floating state when the transistor is turned off.Type: GrantFiled: March 23, 2012Date of Patent: May 13, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidetomo Kobayashi, Yukio Maehashi
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Publication number: 20120299626Abstract: A semiconductor device with low power consumption and a small area is provided. By using a transistor including an oxide semiconductor for a channel as a transistor included in a flip-flop circuit, a divider circuit in which the number of transistors is small, power consumption is low, and the area is small can be achieved. By using the divider circuit, a semiconductor device which operates stably and is highly reliable can be provided.Type: ApplicationFiled: May 17, 2012Publication date: November 29, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masashi FUJITA, Yukio MAEHASHI