Patents by Inventor Yuko Watanabe
Yuko Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120066244Abstract: Name retrieval methods and name retrieval apparatuses that detect retrieval-target names that are representable as character strings including a ligature taking arbitrary property of a ligature into consideration in both a case where the ligature is input, and a case where the series of characters corresponding to the ligature is input, are provided so that convenience and reliability of name retrieval are improved. When a specific ligature is input, the specific ligature is converted into the series of characters corresponding to the specific ligature in accordance with the corresponding relationship TB stored in a storage device M, and specific retrieval-target names that include the series of characters obtained by the conversion in an input position of the specific ligature and an arrangement position of the series of characters corresponding to the number of coupled characters are retrieved from a database DB by character-string matching.Type: ApplicationFiled: August 25, 2011Publication date: March 15, 2012Inventors: Kazuomi Chiba, Yuko Watanabe
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Patent number: 8014081Abstract: An imaging optics capable of compensating for chromatic aberration is provided with a light shielding means in a surface peripheral area of a certain lens element in a lens system so as to block a light flux of a specified wavelength range, thereby eliminating chromatic aberration in halo of the light flux of the specified wavelength range when it passes the periphery of the lens system. Thus, the invention provides the imaging optics that, without an increase in the number of pieces of lens elements and without a use of an expensive specified low-dispersion glass material, in contrast with the prior art imaging optics of the same optical performances, well compensates for chromatic aberration, especially, in halo.Type: GrantFiled: August 9, 2006Date of Patent: September 6, 2011Assignee: Tamron Co., Ltd.Inventors: Yuko Watanabe, Takashi Sakamoto, Hiroyuki Taira, Seigou Nakai
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Patent number: 7995405Abstract: A semiconductor memory device having high integration, low power consumption and high operation speed. The memory device includes a sense amplifier circuit having plural pull-down circuits and a pull-up circuit. A transistor constituting one of the plural pull-down circuits has a larger constant than that of a transistor constituting the other pull-down circuits, for example, a channel length and a channel width. The pull-down circuit having the larger constant transistor is activated earlier than the other pull-down circuits and the pull-up circuit, which are activated to conduct reading. The data line and the earlier driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.Type: GrantFiled: December 14, 2010Date of Patent: August 9, 2011Assignees: Hitachi, Ltd., Elpida Memory, Inc.Inventors: Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
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Patent number: 7979055Abstract: When a server receives an information designating image from a communication terminal connected to a server through a network, it sends a URL identifying the storage location of the image to the communication terminal. When the communication terminal receives the URL, it loads the URL into an email and transmits the email to another communication terminal. When the communication terminal that received this email finds out that the URL integrated in the email identifies the storage location of the image, it downloads the image from the server and displays it along with the email by using the URL.Type: GrantFiled: December 5, 2001Date of Patent: July 12, 2011Assignee: NTT DoCoMo, Inc.Inventors: Yuko Watanabe, Madoka Tsutsumi, Hidetoshi Yazaki, Takeshi Higuchi
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Publication number: 20110079858Abstract: A semiconductor memory device having high integration, low power consumption and high operation speed. The memory device includes a sense amplifier circuit having plural pull-down circuits and a pull-up circuit. A transistor constituting one of the plural pull-down circuits has a larger constant than that of a transistor constituting the other pull-down circuits, for example, a channel length and a channel width. The pull-down circuit having the larger constant transistor is activated earlier than the other pull-down circuits and the pull-up circuit, which are activated to conduct reading. The data line and the earlier driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.Type: ApplicationFiled: December 14, 2010Publication date: April 7, 2011Inventors: Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
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Publication number: 20110074945Abstract: An imaging apparatus includes an imaging unit for capturing a subject and generating image data of the subject, an operation input unit for receiving inputs of operation signals containing a release signal for instructing the imaging unit to shoot, an acceleration detector for detecting an acceleration of the imaging apparatus, a state detector for separately detecting a case in which the imaging apparatus is overland, a case in which the imaging apparatus is underwater and a photographer shoots while swimming, and a case in which the imaging apparatus is underwater and the photographer shoots while changing a water depth, and a control unit for performing operation control depending on an input into the operation input unit and/or into the acceleration detector according to a state detection result by the state detector.Type: ApplicationFiled: September 27, 2010Publication date: March 31, 2011Inventors: Yuko Watanabe, Yoko Saito, Tomoko Kobayashi, Koichi Shintani
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Patent number: 7876627Abstract: A semiconductor memory device having high integration, low power consumption and high operation speed. The memory device includes a sense amplifier circuit having plural pull-down circuits and a pull-up circuit. A transistor constituting one of the plural pull-down circuits has a larger constant than that of a transistor constituting the other pull-down circuits, for example, a channel length and a channel width. The pull-down circuit having the larger constant transistor is activated earlier than the other pull-down circuits and the pull-up circuit, which are activated to conduct reading. The data line and the earlier driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.Type: GrantFiled: January 3, 2008Date of Patent: January 25, 2011Assignees: Hitachi, Ltd., Elpida Memory, Inc.Inventors: Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
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Patent number: 7842976Abstract: A semiconductor device includes a plurality of signal lines which are arranged at a predetermined pitch; first and second MOS transistors which are connected to the signal lines, and also serially connected to each other; and a connection device which functions as a connection node between the serially-connected first and second MOS transistors, and connects a source area of one of the first and second MOS transistors to a drain area of the other of the first and second MOS transistors via contact holes, which are formed through an insulating layer, and a conduction layer connected to the contact holes.Type: GrantFiled: October 28, 2008Date of Patent: November 30, 2010Assignee: Elpida Memory, Inc.Inventors: Isamu Fujii, Shinichi Miyatake, Yuko Watanabe, Homare Sato
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Patent number: 7652827Abstract: A zoom lens includes a first and a second lens group respectively having negative and positive refractive power, and changes a focal length by changing a distance between the first and the second lens group. The second lens group includes a first lens having positive refractive power and a convex surface, a second lens having positive refractive power, an aspheric surface, and a convex surface, a third lens having negative refractive power, a fourth lens having positive refractive power, and a fifth lens including one lens or more having positive refractive power. The third and the fourth lenses are connected, and the zoom lens satisfies Nd21>1.8 and ?d24>80, where Nd21 is a refractive index of the first lens of the second lens group at a d-line, and ?d24 is an Abbe number of the fourth lens of the second lens group at a d-line.Type: GrantFiled: February 28, 2008Date of Patent: January 26, 2010Assignee: Tamron Co., Ltd.Inventors: Hironori Taguchi, Hiroyuki Taira, Yuko Watanabe
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Publication number: 20090108376Abstract: A semiconductor device includes a plurality of signal lines which are arranged at a predetermined pitch; first and second MOS transistors which are connected to the signal lines, and also serially connected to each other; and a connection device which functions as a connection node between the serially-connected first and second MOS transistors, and connects a source area of one of the first and second MOS transistors to a drain area of the other of the first and second MOS transistors via contact holes, which are formed through an insulating layer, and a conduction layer connected to the contact holes.Type: ApplicationFiled: October 28, 2008Publication date: April 30, 2009Applicant: ELPIDA MEMORY, INC.Inventors: Isamu FUJII, Shinichi MIYATAKE, Yuko WATANABE, Homare SATO
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Publication number: 20080212203Abstract: A zoom lens includes a first and a second lens group respectively having negative and positive refractive power, and changes a focal length by changing a distance between the first and the second lens group. The second lens group includes a first lens having positive refractive power and a convex surface, a second lens having positive refractive power, an aspheric surface, and a convex surface, a third lens having negative refractive power, a fourth lens having positive refractive power, and a fifth lens including one lens or more having positive refractive power. The third and the fourth lenses are connected, and the zoom lens satisfies Nd21>1.8 and ?d24>80, where Nd21 is a refractive index of the first lens of the second lens group at a d-line, and ?d24 is an Abbe number of the fourth lens of the second lens group at a d-line.Type: ApplicationFiled: February 28, 2008Publication date: September 4, 2008Inventors: Hironori Taguchi, Hiroyuki Taira, Yuko Watanabe
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Patent number: 7418685Abstract: Bit lines and a pair of two tungsten wires having the same widths are formed at a portion where a through-hole is to be formed such that the bit lines and the tungsten wires are arranged at regular intervals. A through-hole for connection to another wiring layer is formed between the tungsten wires. A connection wiring made of tungsten is formed over the through-hole so as to have a predetermined margin around the through-hole. In a photolithography process, a slit having a small width enough to be insensitive to a photo-resist is formed so as to span the through-hole.Type: GrantFiled: June 25, 2004Date of Patent: August 26, 2008Assignees: Elpida Memory, Inc., Hitachi Ulsi Systems, Co., Ltd., Hitachi Ltd.Inventors: Yuko Watanabe, Koji Arai, Seiji Narui
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Patent number: 7414874Abstract: Disclosed is a semiconductor memory device comprising a memory cell array block, and a circuit region arranged with the memory cell array block along a first direction. The circuit region comprises a first region and a second region arranged with the first region along the first direction. The first region is provided with a first circuit and a second circuit which are aligned in a second direction perpendicular to the first direction. The second region is provided with a plurality of third circuits which are aligned in the second direction.Type: GrantFiled: October 27, 2006Date of Patent: August 19, 2008Assignee: Elpida Memory, Inc.Inventors: Hiroki Fujisawa, Isamu Fujii, Yuko Watanabe
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Patent number: 7412223Abstract: A transmission-reception device receives site screen data transmitted from an IP server. An SRAM records the site screen data received by the transmission-reception device. When in a reception standby state, the CPU reads the site screen data recorded in the SRAM, generates a site screen, and displays this on the liquid crystal display.Type: GrantFiled: May 15, 2000Date of Patent: August 12, 2008Assignee: NTT DoCoMo, Inc.Inventors: Masaaki Yamamoto, Yuko Watanabe, Kouji Chiba, Masaharu Nakatsuchi
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Publication number: 20080175084Abstract: A semiconductor memory device having high integration, low consumption power and high operation speed compatible to each other including a sense amplifier circuit having plural pull-down circuits and a pull-up circuit, in which a transistor constituting one of plural pull-down circuits has a larger constant than that of a transistor constituting other pull-down circuits, for example, a channel length and a channel width, a pull-down circuit having a larger constant of the transistor in the plural pull-down circuits is precedingly activated and then another pull-down circuit and the pull-up circuit are activated to conduct reading and, further, the data line and the precedingly driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.Type: ApplicationFiled: January 3, 2008Publication date: July 24, 2008Inventors: Satoru AKIYAMA, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
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Publication number: 20070096156Abstract: Disclosed is a semiconductor memory device comprising a memory cell array block, and a circuit region arranged with the memory cell array block along a first direction. The circuit region comprises a first region and a second region arranged with the first region along the first direction. The first region is provided with a first circuit and a second circuit which are aligned in a second direction perpendicular to the first direction. The second region is provided with a plurality of third circuits which are aligned in the second direction.Type: ApplicationFiled: October 27, 2006Publication date: May 3, 2007Inventors: Hiroki Fujisawa, Isamu Fujii, Yuko Watanabe
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Publication number: 20070002450Abstract: An imaging optics capable of compensating for chromatic aberration is provided with a light shielding means in a surface peripheral area of a certain lens element in a lens system so as to block a light flux of a specified wavelength range, thereby eliminating chromatic aberration in halo of the light flux of the specified wavelength range when it passes the periphery of the lens system. Thus, the invention provides the imaging optics that, without an increase in the number of pieces of lens elements and without a use of an expensive specified low-dispersion glass material, in contrast with the prior art imaging optics of the same optical performances, well compensates for chromatic aberration, especially, in halo.Type: ApplicationFiled: August 9, 2006Publication date: January 4, 2007Inventors: Yuko Watanabe, Takashi Sakamoto, Hiroyuki Taira, Seigou Nakai
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Publication number: 20070003685Abstract: The present invention is to provide a novel prostacyclin production-increasing agent, a blood flow enhancer, a prophylaxis or improvement agent of blood flow disorder, or a skin improving agent, each of which comprises an elderberry extract as an effective ingredient, and foods, medicaments or cosmetics containing the same.Type: ApplicationFiled: June 29, 2006Publication date: January 4, 2007Inventor: Yuko Watanabe
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Patent number: 7111046Abstract: In accordance with the registration contents of the divided mail table, the control unit determines whether to handle each mail section as one electronic mail or to handle all the interrelated mail sections as one compiled electronic mail and executes a processing in accordance with the determination, when the mail sections are deleted, returned or transferred, after the mail sections are received by a portable phone and stored in the mail memory.Type: GrantFiled: December 3, 2001Date of Patent: September 19, 2006Assignee: NTT DoCoMo, Inc.Inventors: Yuko Watanabe, Madoka Tsutsumi, Hidetoshi Yazaki, Takeshi Higuchi
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Patent number: 7106515Abstract: A method for producing an optical element having a multi-layered antireflection film formed on a synthetic resin substrate, in which the antireflection film formed has good heat resistance, and its heat resistance lowers little with time. At least one high-refraction layer of the multi-layered anti-reflection film contains niobium oxide, zirconium oxide, yttrium oxide, and optionally aluminum oxide. High-refraction layers can be formed within a shorter period of time while not detracting from the good physical properties intrinsic to the layers.Type: GrantFiled: November 13, 2001Date of Patent: September 12, 2006Assignee: Hoya CorporationInventors: Takeshi Mitsuishi, Hitoshi Kamura, Kenichi Shinde, Hiroki Takei, Akinori Kobayashi, Yukihiro Takahashi, Yuko Watanabe