Patents by Inventor Yuko Watanabe

Yuko Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120066244
    Abstract: Name retrieval methods and name retrieval apparatuses that detect retrieval-target names that are representable as character strings including a ligature taking arbitrary property of a ligature into consideration in both a case where the ligature is input, and a case where the series of characters corresponding to the ligature is input, are provided so that convenience and reliability of name retrieval are improved. When a specific ligature is input, the specific ligature is converted into the series of characters corresponding to the specific ligature in accordance with the corresponding relationship TB stored in a storage device M, and specific retrieval-target names that include the series of characters obtained by the conversion in an input position of the specific ligature and an arrangement position of the series of characters corresponding to the number of coupled characters are retrieved from a database DB by character-string matching.
    Type: Application
    Filed: August 25, 2011
    Publication date: March 15, 2012
    Inventors: Kazuomi Chiba, Yuko Watanabe
  • Patent number: 8014081
    Abstract: An imaging optics capable of compensating for chromatic aberration is provided with a light shielding means in a surface peripheral area of a certain lens element in a lens system so as to block a light flux of a specified wavelength range, thereby eliminating chromatic aberration in halo of the light flux of the specified wavelength range when it passes the periphery of the lens system. Thus, the invention provides the imaging optics that, without an increase in the number of pieces of lens elements and without a use of an expensive specified low-dispersion glass material, in contrast with the prior art imaging optics of the same optical performances, well compensates for chromatic aberration, especially, in halo.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: September 6, 2011
    Assignee: Tamron Co., Ltd.
    Inventors: Yuko Watanabe, Takashi Sakamoto, Hiroyuki Taira, Seigou Nakai
  • Patent number: 7995405
    Abstract: A semiconductor memory device having high integration, low power consumption and high operation speed. The memory device includes a sense amplifier circuit having plural pull-down circuits and a pull-up circuit. A transistor constituting one of the plural pull-down circuits has a larger constant than that of a transistor constituting the other pull-down circuits, for example, a channel length and a channel width. The pull-down circuit having the larger constant transistor is activated earlier than the other pull-down circuits and the pull-up circuit, which are activated to conduct reading. The data line and the earlier driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: August 9, 2011
    Assignees: Hitachi, Ltd., Elpida Memory, Inc.
    Inventors: Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
  • Patent number: 7979055
    Abstract: When a server receives an information designating image from a communication terminal connected to a server through a network, it sends a URL identifying the storage location of the image to the communication terminal. When the communication terminal receives the URL, it loads the URL into an email and transmits the email to another communication terminal. When the communication terminal that received this email finds out that the URL integrated in the email identifies the storage location of the image, it downloads the image from the server and displays it along with the email by using the URL.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: July 12, 2011
    Assignee: NTT DoCoMo, Inc.
    Inventors: Yuko Watanabe, Madoka Tsutsumi, Hidetoshi Yazaki, Takeshi Higuchi
  • Publication number: 20110079858
    Abstract: A semiconductor memory device having high integration, low power consumption and high operation speed. The memory device includes a sense amplifier circuit having plural pull-down circuits and a pull-up circuit. A transistor constituting one of the plural pull-down circuits has a larger constant than that of a transistor constituting the other pull-down circuits, for example, a channel length and a channel width. The pull-down circuit having the larger constant transistor is activated earlier than the other pull-down circuits and the pull-up circuit, which are activated to conduct reading. The data line and the earlier driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.
    Type: Application
    Filed: December 14, 2010
    Publication date: April 7, 2011
    Inventors: Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
  • Publication number: 20110074945
    Abstract: An imaging apparatus includes an imaging unit for capturing a subject and generating image data of the subject, an operation input unit for receiving inputs of operation signals containing a release signal for instructing the imaging unit to shoot, an acceleration detector for detecting an acceleration of the imaging apparatus, a state detector for separately detecting a case in which the imaging apparatus is overland, a case in which the imaging apparatus is underwater and a photographer shoots while swimming, and a case in which the imaging apparatus is underwater and the photographer shoots while changing a water depth, and a control unit for performing operation control depending on an input into the operation input unit and/or into the acceleration detector according to a state detection result by the state detector.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 31, 2011
    Inventors: Yuko Watanabe, Yoko Saito, Tomoko Kobayashi, Koichi Shintani
  • Patent number: 7876627
    Abstract: A semiconductor memory device having high integration, low power consumption and high operation speed. The memory device includes a sense amplifier circuit having plural pull-down circuits and a pull-up circuit. A transistor constituting one of the plural pull-down circuits has a larger constant than that of a transistor constituting the other pull-down circuits, for example, a channel length and a channel width. The pull-down circuit having the larger constant transistor is activated earlier than the other pull-down circuits and the pull-up circuit, which are activated to conduct reading. The data line and the earlier driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: January 25, 2011
    Assignees: Hitachi, Ltd., Elpida Memory, Inc.
    Inventors: Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
  • Patent number: 7842976
    Abstract: A semiconductor device includes a plurality of signal lines which are arranged at a predetermined pitch; first and second MOS transistors which are connected to the signal lines, and also serially connected to each other; and a connection device which functions as a connection node between the serially-connected first and second MOS transistors, and connects a source area of one of the first and second MOS transistors to a drain area of the other of the first and second MOS transistors via contact holes, which are formed through an insulating layer, and a conduction layer connected to the contact holes.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: November 30, 2010
    Assignee: Elpida Memory, Inc.
    Inventors: Isamu Fujii, Shinichi Miyatake, Yuko Watanabe, Homare Sato
  • Patent number: 7652827
    Abstract: A zoom lens includes a first and a second lens group respectively having negative and positive refractive power, and changes a focal length by changing a distance between the first and the second lens group. The second lens group includes a first lens having positive refractive power and a convex surface, a second lens having positive refractive power, an aspheric surface, and a convex surface, a third lens having negative refractive power, a fourth lens having positive refractive power, and a fifth lens including one lens or more having positive refractive power. The third and the fourth lenses are connected, and the zoom lens satisfies Nd21>1.8 and ?d24>80, where Nd21 is a refractive index of the first lens of the second lens group at a d-line, and ?d24 is an Abbe number of the fourth lens of the second lens group at a d-line.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: January 26, 2010
    Assignee: Tamron Co., Ltd.
    Inventors: Hironori Taguchi, Hiroyuki Taira, Yuko Watanabe
  • Publication number: 20090108376
    Abstract: A semiconductor device includes a plurality of signal lines which are arranged at a predetermined pitch; first and second MOS transistors which are connected to the signal lines, and also serially connected to each other; and a connection device which functions as a connection node between the serially-connected first and second MOS transistors, and connects a source area of one of the first and second MOS transistors to a drain area of the other of the first and second MOS transistors via contact holes, which are formed through an insulating layer, and a conduction layer connected to the contact holes.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 30, 2009
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Isamu FUJII, Shinichi MIYATAKE, Yuko WATANABE, Homare SATO
  • Publication number: 20080212203
    Abstract: A zoom lens includes a first and a second lens group respectively having negative and positive refractive power, and changes a focal length by changing a distance between the first and the second lens group. The second lens group includes a first lens having positive refractive power and a convex surface, a second lens having positive refractive power, an aspheric surface, and a convex surface, a third lens having negative refractive power, a fourth lens having positive refractive power, and a fifth lens including one lens or more having positive refractive power. The third and the fourth lenses are connected, and the zoom lens satisfies Nd21>1.8 and ?d24>80, where Nd21 is a refractive index of the first lens of the second lens group at a d-line, and ?d24 is an Abbe number of the fourth lens of the second lens group at a d-line.
    Type: Application
    Filed: February 28, 2008
    Publication date: September 4, 2008
    Inventors: Hironori Taguchi, Hiroyuki Taira, Yuko Watanabe
  • Patent number: 7418685
    Abstract: Bit lines and a pair of two tungsten wires having the same widths are formed at a portion where a through-hole is to be formed such that the bit lines and the tungsten wires are arranged at regular intervals. A through-hole for connection to another wiring layer is formed between the tungsten wires. A connection wiring made of tungsten is formed over the through-hole so as to have a predetermined margin around the through-hole. In a photolithography process, a slit having a small width enough to be insensitive to a photo-resist is formed so as to span the through-hole.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: August 26, 2008
    Assignees: Elpida Memory, Inc., Hitachi Ulsi Systems, Co., Ltd., Hitachi Ltd.
    Inventors: Yuko Watanabe, Koji Arai, Seiji Narui
  • Patent number: 7414874
    Abstract: Disclosed is a semiconductor memory device comprising a memory cell array block, and a circuit region arranged with the memory cell array block along a first direction. The circuit region comprises a first region and a second region arranged with the first region along the first direction. The first region is provided with a first circuit and a second circuit which are aligned in a second direction perpendicular to the first direction. The second region is provided with a plurality of third circuits which are aligned in the second direction.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: August 19, 2008
    Assignee: Elpida Memory, Inc.
    Inventors: Hiroki Fujisawa, Isamu Fujii, Yuko Watanabe
  • Patent number: 7412223
    Abstract: A transmission-reception device receives site screen data transmitted from an IP server. An SRAM records the site screen data received by the transmission-reception device. When in a reception standby state, the CPU reads the site screen data recorded in the SRAM, generates a site screen, and displays this on the liquid crystal display.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: August 12, 2008
    Assignee: NTT DoCoMo, Inc.
    Inventors: Masaaki Yamamoto, Yuko Watanabe, Kouji Chiba, Masaharu Nakatsuchi
  • Publication number: 20080175084
    Abstract: A semiconductor memory device having high integration, low consumption power and high operation speed compatible to each other including a sense amplifier circuit having plural pull-down circuits and a pull-up circuit, in which a transistor constituting one of plural pull-down circuits has a larger constant than that of a transistor constituting other pull-down circuits, for example, a channel length and a channel width, a pull-down circuit having a larger constant of the transistor in the plural pull-down circuits is precedingly activated and then another pull-down circuit and the pull-up circuit are activated to conduct reading and, further, the data line and the precedingly driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.
    Type: Application
    Filed: January 3, 2008
    Publication date: July 24, 2008
    Inventors: Satoru AKIYAMA, Tomonori Sekiguchi, Riichiro Takemura, Hiroaki Nakaya, Shinichi Miyatake, Yuko Watanabe
  • Publication number: 20070096156
    Abstract: Disclosed is a semiconductor memory device comprising a memory cell array block, and a circuit region arranged with the memory cell array block along a first direction. The circuit region comprises a first region and a second region arranged with the first region along the first direction. The first region is provided with a first circuit and a second circuit which are aligned in a second direction perpendicular to the first direction. The second region is provided with a plurality of third circuits which are aligned in the second direction.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 3, 2007
    Inventors: Hiroki Fujisawa, Isamu Fujii, Yuko Watanabe
  • Publication number: 20070002450
    Abstract: An imaging optics capable of compensating for chromatic aberration is provided with a light shielding means in a surface peripheral area of a certain lens element in a lens system so as to block a light flux of a specified wavelength range, thereby eliminating chromatic aberration in halo of the light flux of the specified wavelength range when it passes the periphery of the lens system. Thus, the invention provides the imaging optics that, without an increase in the number of pieces of lens elements and without a use of an expensive specified low-dispersion glass material, in contrast with the prior art imaging optics of the same optical performances, well compensates for chromatic aberration, especially, in halo.
    Type: Application
    Filed: August 9, 2006
    Publication date: January 4, 2007
    Inventors: Yuko Watanabe, Takashi Sakamoto, Hiroyuki Taira, Seigou Nakai
  • Publication number: 20070003685
    Abstract: The present invention is to provide a novel prostacyclin production-increasing agent, a blood flow enhancer, a prophylaxis or improvement agent of blood flow disorder, or a skin improving agent, each of which comprises an elderberry extract as an effective ingredient, and foods, medicaments or cosmetics containing the same.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 4, 2007
    Inventor: Yuko Watanabe
  • Patent number: 7111046
    Abstract: In accordance with the registration contents of the divided mail table, the control unit determines whether to handle each mail section as one electronic mail or to handle all the interrelated mail sections as one compiled electronic mail and executes a processing in accordance with the determination, when the mail sections are deleted, returned or transferred, after the mail sections are received by a portable phone and stored in the mail memory.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: September 19, 2006
    Assignee: NTT DoCoMo, Inc.
    Inventors: Yuko Watanabe, Madoka Tsutsumi, Hidetoshi Yazaki, Takeshi Higuchi
  • Patent number: 7106515
    Abstract: A method for producing an optical element having a multi-layered antireflection film formed on a synthetic resin substrate, in which the antireflection film formed has good heat resistance, and its heat resistance lowers little with time. At least one high-refraction layer of the multi-layered anti-reflection film contains niobium oxide, zirconium oxide, yttrium oxide, and optionally aluminum oxide. High-refraction layers can be formed within a shorter period of time while not detracting from the good physical properties intrinsic to the layers.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: September 12, 2006
    Assignee: Hoya Corporation
    Inventors: Takeshi Mitsuishi, Hitoshi Kamura, Kenichi Shinde, Hiroki Takei, Akinori Kobayashi, Yukihiro Takahashi, Yuko Watanabe