Patents by Inventor Yun Cheng

Yun Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of determining colorability of a semiconductor device and system for implementing the same
    Patent number: 10204205
    Abstract: A method of determining colorability of a layer of a semiconductor device includes iteratively decomposing a conflict graph to remove all nodes having fewer links than a threshold number of links. The method further includes determining whether the decomposed conflict graph is a simplified graph. The method further includes partitioning, using a specific purpose processing device, the decomposed conflict graph if the decomposed conflict graph is not a simplified graph. The method further includes determining whether the decomposed conflict graph is colorable based on a number of masks used to pattern the layer of the semiconductor device if the decomposed conflict graph is a simplified graph. The method further includes flagging violations if the decomposed conflict graph is not colorable.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Yun Cheng, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Jian-Yi Li, Li-Sheng Ke, Wen-Ju Yang
  • Method and Apparatus of Multiple Pass Video Processing Systems
    Publication number: 20190037223
    Abstract: A method and apparatus of scalable video coding using Inter prediction mode for a video coding system are disclosed, where video data being coded comprise BP (Basic Resolution Pass) pictures and UP (Upgrade Resolution Pass) pictures. In one embodiment according to the present invention, the method comprises receiving information associated with input data corresponding to a target block in a target UP picture. When the target block is Inter coded according to a current MV (motion vector) and uses a collocated BP picture as one reference picture, one or more BP MVs (motion vectors) of the collocated BP picture are scaled to generate one or more RCP (resolution change processing) MVs. The current MV of the target block is encoded or decoded using an UP MV predictor derived based on one or more temporal MVPs including said one or more RCP MVs.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 31, 2019
    Inventors: Yung-Chang CHANG, Chia-Yun CHENG, Cheng-Han LI
  • Dual inline memory module with temperature-sensing scenario mode
    Patent number: 10153041
    Abstract: Disclosed is a dual inline memory module with temperature-sensing scenario modes. A plurality of volatile memory components and an EEPROM component are disposed on a module board. A plurality of LED components and a scenario-lighting controller are disposed at a radiant side of the module board. A light bar is located at the radiant side of the module board without direct installing relationship. A plurality of clamping-type heat spreaders are fastened to one another in a manner that the light bar is tightly clamped. Therein, the power of the scenario-lighting controller component is shared and linked with the power supply system of the LED components and the signals of the scenario-lighting controller component are shared and linked with the signal connection system of the EEPROM component.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: December 11, 2018
    Assignee: Corsair Memory Inc.
    Inventors: Shu-Liang Ning, Fu-Yun Cheng, Ting-Yi Chang
  • Optical transceiver module and optical cable module
    Patent number: 10139578
    Abstract: An optical transceiver module and an optical cable module are disclosed. The optical cable module comprises an optical cable and the optical transceiver module connected to the optical cable. The optical transceiver module comprises a substrate, at least one optical receiving device, and a plurality of hermetic transmitting devices. The plurality of hermetic transmitting devices are disposed on the substrate, wherein each of the hermetic transmitting devices includes an optical transmitter, and the optical transmitters of the hermetic transmitting devices are completely sealed in one or more than one hermetic housing.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: November 27, 2018
    Assignee: USENLIGHT CORP.
    Inventors: Yun-Cheng Huang, Takashi Mogi, Toshikazu Uchida, Chang-Cherng Wu
  • Clustering user utterance intents with semantic parsing
    Patent number: 10134389
    Abstract: A system is provided that trains a spoken language understanding (SLU) classifier. A corpus of user utterances is received. For each of the user utterances in the corpus, the user utterance is semantically parsed, and the result of this semantic parsing is represented as a rooted semantic parse graph. The parse graphs representing all of the user utterances in the corpus are then combined into a single corpus graph that represents the semantic parses of the entire corpus. The user utterances in the corpus are then clustered into intent-wise homogeneous groups of user utterances, where this clustering includes finding subgraphs in the corpus graph that represent different groups of user utterances, and each of these different groups has a similar user intent. The intent-wise homogeneous groups of user utterances are then used to train the SLU classifier, and the trained SLU classifier is output.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: November 20, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Dilek Hakkani-Tur, Yun-Cheng Ju, Geoffrey G. Zweig, Gokhan Tur
  • Syntax parsing apparatus with multiple syntax parsing circuits for processing multiple image regions within same frame or processing multiple frames and related syntax parsing method
    Patent number: 10123028
    Abstract: A syntax parsing apparatus includes a plurality of syntax parsing circuits and a dispatcher. Each of the syntax parsing circuits has at least entropy decoding capability. The syntax parsing circuits generate a plurality of entropy decoding results of a plurality of image regions within a same frame, respectively. The dispatcher assigns bitstream start points of the image regions to the syntax parsing circuits, and triggers the syntax parsing circuits to start entropy decoding, respectively.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: November 6, 2018
    Assignee: MEDIATEK INC.
    Inventors: Ming-Long Wu, Chia-Yun Cheng, Yung-Chang Chang
  • Video processing apparatus for storing partial reconstructed pixel data in storage device for use in intra prediction and related video processing method
    Patent number: 10104397
    Abstract: A video processing apparatus includes a reconstruct circuit, a storage device, and an intra prediction circuit. The reconstruct circuit generates reconstructed pixels of a first block of a picture. The storage device at least stores a portion of the reconstructed pixels of the first block, wherein a capacity of the storage device is smaller than a reconstructed data size of the picture. The intra prediction circuit performs intra prediction of a second block of the picture based at least partly on pixel data obtained from the storage device.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: October 16, 2018
    Assignee: MEDIATEK INC.
    Inventors: Meng-Jye Hu, Yung-Chang Chang, Chia-Yun Cheng
  • Method and Apparatus of Motion Vector Prediction
    Publication number: 20180295380
    Abstract: A method and apparatus for video encoding or decoding used by an AVS2 (Second Generation of Audio Video Coding Standard) video encoder or decoder respectively are disclosed. According to this method, first motion vectors associated with spatial neighboring blocks of a current block are determined. For each spatial neighboring block, a value of 1 is assigned to a first BlockDistance associated with the spatial neighboring block if a corresponding first reference picture is a G picture or GB picture. Motion vector predictor candidates are derived from the first motion vectors by scaling each first motion vector according to a corresponding first BlockDistance and a current BlockDistance. A final motion vector predictor is determined among the motion vector predictor candidates.
    Type: Application
    Filed: December 6, 2017
    Publication date: October 11, 2018
    Inventors: Min-Hao Chiu, Chia-yun Cheng, Yung-Chang Chang
  • Multi-core video decoder system having at least one shared storage space accessed by different video decoder cores and related video decoding method
    Patent number: 10075722
    Abstract: A multi-core video decoder system includes a plurality of video decoder cores and a storage device. The video decoder cores are used to decode a picture, wherein each of the video decoder cores decodes a portion of the picture. The storage device has at least one shared storage space accessed by different video decoder cores of the video decoder cores. In addition, an associated video decoding method includes: performing a plurality of video decoding operations to decode a picture, wherein each of the video decoding operations decodes a portion of the picture; and controlling different video decoding operations of the video decoding operations to access at least one shared storage space.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: September 11, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Shun-Hsiang Chuang, Yung-Chang Chang
  • Video processing apparatus with transform unit size selection, mode information unit size selection and/or picture width/height decision, and related video processing method thereof
    Patent number: 10070070
    Abstract: One exemplary video processing apparatus includes a control circuit and a size selection circuit. The control circuit determines picture boundary information. The size selection circuit refers to at least the picture boundary information to select a size for a block associated with encoding of a picture, wherein selection of the size is constrained by the picture boundary information to ensure that the block with the selected size is not across a picture boundary of the picture.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: September 4, 2018
    Assignee: MEDIATEK INC.
    Inventors: Meng-Jye Hu, Yung-Chang Chang, Chia-Yun Cheng
  • BARRIER LAYER ABOVE ANTI-PUNCH THROUGH (APT) IMPLANT REGION TO IMPROVE MOBILITY OF CHANNEL REGION OF FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE
    Publication number: 20180204726
    Abstract: A fin field device structure and method for forming the same are provided. The FinFET device structure includes a protruding structure extending from a substrate and an anti-punch through implant (APT) region formed in the protruding structure. The FinFET device structure includes a barrier layer formed on the APT region, and the barrier layer has a width in a horizontal direction. The width gradually tapers from a bottom of the barrier layer to a top of the barrier layer.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 19, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Yao WEN, Sheng-Chen WANG, Sai-Hooi YEONG, Hsueh-Chang SUNG, Ya-Yun CHENG
  • Method and Apparatus of Error Handling for Video Coding Using Intra Block Copy Mode
    Publication number: 20180152727
    Abstract: In order to overcome the issue caused by a decoded block vector (BV) pointing to a reference block overlapping with an unavailable area, various methods are disclosed. According to one method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by padding from neighbouring available pixels. The padding can be done in the horizontal direction and then the vertical direction. The padding may also done in the vertical direction first and then horizontal direction. In another method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by using previous decoded pixels in the unavailable area. A pre-defined value may also be used for the unavailable area.
    Type: Application
    Filed: June 3, 2016
    Publication date: May 31, 2018
    Inventors: Tzu-Der CHUANG, Chia-Yun Cheng, Han-Liang Chou, Ching-Yeh Chen, Yu-Chen Sun, Yu-Wen Huang
  • Methods for Palette Coding of Image and Video Data
    Publication number: 20180152714
    Abstract: Methods of palette coding to reduce the required coding process are disclosed. According to one method, smaller blocks are derived from a large block. The histogram of the large block is derived based on the histograms of smaller blocks in the large block. According to another method, one or more palette tables are derived based on multiple blocks. One palette table is used for each of the multiple blocks. According to yet another method, index map transpose is performed in the parsing stage according to the transpose flag of the index map. Accordingly, a buffer to store the transpose flags can be saved. According to still yet another method, the palette predictor update is performed using an index mapping table to avoid the need for shuffling the contents of the palette predictor stored in a palette buffer.
    Type: Application
    Filed: June 3, 2016
    Publication date: May 31, 2018
    Inventors: Yu-Chen SUN, Tzu-Der CHUANG, Han-Liang CHOU, Chia-Yun Cheng, Ching-Yeh CHEN, Yu-Wen Huang
  • DECODING SYSTEM FOR TILE-BASED VIDEOS
    Publication number: 20180139464
    Abstract: Aspects of the disclosure provide a video decoding system. The video decoding system can include a decoder core configured to selectively decode independently decodable tiles in a picture, each tile including largest coding units (LCUs) each associated with a pair of picture-based (X, Y) coordinates or tile-based (X, Y) coordinates, and memory management circuitry configured to translate one or two coordinates of a current LCU to generate one or two translated coordinates, and to determine a target memory space storing reference data for decoding the current LCU based on the one or two translated coordinates.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 17, 2018
    Applicant: MEDIATEK INC.
    Inventors: Min-Hao CHIU, Ping Chao, Chia-Hung Kao, Huei-Min Lin, Hsiu-Yi Lin, Chi-Hung Chen, Chia-Yun Cheng, Chih-Ming Wang, Yung-Chang Chang
  • Multi-core video decoder system for decoding multiple coding rows by using multiple video decoder cores and related multi-core video decoding method
    Patent number: 9973748
    Abstract: A multi-core video decoder system has a syntax parser, a storage device, a plurality of video decoder cores and a control unit. The syntax parser performs syntax parsing upon an incoming encoded video bitstream to derive required information of each picture to be decoded. The storage device buffers the required information of each picture. The control unit controls the video decoder cores to load required information of a plurality of coding rows in a picture from the storage device and then decode the coding rows in the picture, respectively.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: May 15, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Yung-Chang Chang
  • DISPLAY DEVICE
    Publication number: 20180113348
    Abstract: A display device includes a backlight module, a liquid crystal layer, a lower polarizer, an upper polarizer, and a retardation layer. The liquid crystal layer is disposed on a lighting side of the backlight module while the lower polarizer is disposed between the liquid crystal layer and the backlight module. The upper polarizer is disposed on a side of the liquid crystal layer opposite to the lower polarizer, and the retardation layer is between the upper and lower polarizers. The retardation layer has a retardation area that may modulates the light passing through the lower polarizer and make the light passes through the upper polarizer.
    Type: Application
    Filed: July 18, 2017
    Publication date: April 26, 2018
    Inventors: Wang-Shuo KAO, Wen-Fang SUNG, Zhi-Lu YE, Yun CHENG
  • Barrier layer above anti-punch through (APT) implant region to improve mobility of channel region of fin field effect transistor (FinFET) device structure
    Patent number: 9953836
    Abstract: A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from the substrate. The FinFET device structure also includes an anti-punch through implant (APT) region formed in the fin structure and a barrier layer formed on the APT region. The barrier layer has a middle portion and a peripheral portion, and the middle portion is higher than the peripheral portion. The FinFET device structure further includes an epitaxial layer formed on the barrier layer.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: April 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Yao Wen, Sheng-Chen Wang, Sai-Hooi Yeong, Hsueh-Chang Sung, Ya-Yun Cheng
  • Method and Apparatus of Constrained Sequence Header
    Publication number: 20180109796
    Abstract: A method and apparatus for video encoding or decoding used by a video encoder or decoder respectively are disclosed. In one method, input data associated with a video sequence are received. A current sequence header for a current picture is determined. Whether the current sequence header corresponds to a first sequence header or a second sequence header is determined. If the current sequence header corresponds to the second sequence header, one or more syntax values of a syntax set associated with the first sequence header are assigned to corresponding one or more syntax values of the syntax set associated with the current sequence header. The current picture is then encoded or decoded according to the current sequence header.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Inventors: Min-Hao CHIU, Hsiu-Yi LIN, Chia-yun CHENG, Chih-Ming WANG, Yung-Chang CHANG
  • Electronic device
    Patent number: 9946913
    Abstract: An electronic device is disclosed herein and includes a multi-functional power button and a processor, where the multi-functional power button includes a power switch and a fingerprint recognition module. The fingerprint recognition module is combined on the power switch, and the processor is coupled to the multi-functional power button. The fingerprint recognition module is configured to extract a fingerprint feature information. The processor is configured to determine whether the multi-functional power button is pressed or touched to respectively cause the power switch to generate a switching signal or cause the fingerprint recognition module to extract the fingerprint feature information.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: April 17, 2018
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yun-Cheng Liu, Wan-Chi Lin
  • Method and Apparatus for Resource Sharing between Intra Block Copy Mode and Inter Prediction Mode in Video Coding Systems
    Publication number: 20180103260
    Abstract: A method and apparatus of sharing an on-chip buffer or cache memory for a video coding system using coding modes including Inter prediction mode or Intra Block Copy (IntraBC) mode are disclosed. At least partial pre-deblocking reconstructed video data of a current picture is stored in an on-chip buffer or cache memory. If the current block is coded using IntraBC mode, the pre-deblocking reconstructed video data of the current picture stored in the on-chip buffer or cache memory are used to derive IntraBC prediction for the current block. In some embodiments, if the current block is coded using Inter prediction mode, Inter reference video data from the previous picture stored in the on-chip buffer or cache memory are used to derive Inter prediction for the current block. In another embodiment, the motion compensation/motion estimation unit is shared by the two modes.
    Type: Application
    Filed: June 3, 2016
    Publication date: April 12, 2018
    Inventors: Tzu-Der CHUANG, Ping CHAO, Ching-Yeh CHEN, Yu-Chen Sun, Chih-Ming WANG, Chia-Yun Cheng, Han-Liang Chou, Yu-Wen Huang