Abstract: A multifunctional single-interface electronic expansion device, comprising an external electronic expansion device and a power transmitting cable. The external electronic expansion device comprises a device body, an electrical connecting module, a data signal processing module, a power transmitting module, and a first assembling member. The device body comprises a first wall surface and a second wall surface. The electrical connecting module is disposed at the device body and is exposed from the first wall surface to be electrically connected with or detached from an interface of a first electronic device. The data signal processing module is electrically connected with the electrical connecting module. The power transmitting module is electrically connected with the electrical connecting module. The power transmitting module comprises a power transmitting interface exposed from the second wall surface.

Abstract: A nerve conduit loaded with adipose-derived stem cells and a preparation method thereof are provided. The preparation method includes: S1, adding polycaprolactone and polyvinylpyrrolidone into a binary organic solvent, performing ultrasonic treatment, and then adding reduced graphene oxide nanoparticles to obtain a spinning solution; S2, electrospinning with the spinning solution and then washing for several times to obtain a semi-finished conduit product; and S3, injecting a cell mixture into the semi-finished conduit product to obtain the nerve conduit. A fiber surface of the nerve conduit has groove structures, and thus a specific surface area and cell adhesion sites are increased, and adhesion and proliferation of cells are facilitated.

Abstract: The present invention discloses a fabrication method and use of a ?40 mm large-size and high-contrast fiber optic image inverter, belonging to the field of manufacturing of fiber optic imaging elements. The light-absorbing glass for preparing the ?40 mm large-size and high-contrast fiber optic image inverter consists of the following components in molar percentage: SiO2 60-69.9, Al2O3 1.0-10.0, B2O3 10.1-15.0, Na2O 1.0-8.0, K2O 3.0-10.0, MgO 0.1-1.0, CaO 0.5-5.0, ZnO 0-0.1, TiO2 0-0.1, ZrO2 0.1-1.0, Fe2O3 3.0-6.5, Co2O3 0.1-0.5, V2O5 0.51-1.5 and MoO3 0.1-1.0. The fiber optic image inverter has the advantages of low crosstalk of stray light, high resolution and high contrast.

Abstract: A method and an apparatus of frequency regulation of a power system involving renewable energy power generation, a computer device, and a non-transitory computer readable storage medium are provided. The method includes: constructing a system frequency dynamic model according to parameters associated with power generator sets in the power system, where the power generator sets comprise a renewable energy power generator set and a conventional energy power generator set; calculating secure operation indexes of the power system according to the system frequency dynamic model of the power system; and obtaining system comprehensive cost indexes of the power system, constructing a reserve allocation model of the power generator sets according to the system comprehensive cost indexes and the secure operation indexes of the power system, and regulating a system frequency of the power system according to the reserve allocation model.

Abstract: The present disclosure provides a three-dimensional memory device and a method of fabricating the same, which includes a substrate, and a memory stack structure. The memory stack structure is disposed on the substrate, and includes a plurality of stack units sequentially stacked into a staircase shape, wherein each of the stack units has a stepped slope, the stepped slope of any one of the stack units disposed in a related lower position is less than the stepped slope of another one of the stack units disposed over the one of the stack units. Through this arrangements, the three-dimensional memory device may therefore obtain an optimized structural integrity, as well as improved component efficiency.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A three-dimensional memory device includes a staircase structure comprising steps respectively comprising a conductive layers and a dielectric layer. A sidewall of the conductive layer is recessed from a sidewall of the dielectric layer to form a recess that exposes a portion of a bottom surface of the dielectric layer.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A DRAM includes a substrate, a plurality of first active regions disposed on the substrate and arranged end-to-end along the first direction, and a plurality of second active regions disposed between the first active regions and arranged end-to-end along the first direction. The second active regions respectively have a first sidewall adjacent to a first trench between the second active region and one of the first active regions and a second sidewall adjacent to a second trench between the ends of the first active regions, wherein the second sidewall is taper than the first sidewall in a cross-sectional view.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A sound localization system includes a multi-mic sound collector and a computing device. The multi-mic sound collector includes a carrier and a plurality of sound receivers removably attached to the sound receivers. The computing device includes a data communicator, a synchronizer, and a processor. The data communicator receives preprocessed audio data from the multi-mic sound collector. The synchronizer synchronizes the preprocessed audio data. The processor analyzes the synchronized audio data to identify and localize a target audio feature. A sound localization method of the sound localization system is also provided. The present invention facilitates monitoring of the functioning or physiological signs of a monitored subject and allows early detection and diagnosis of abnormalities or diseases.

Abstract: Provided are the use of glycosyltransferases gGT25, gGT13, gGT30, gGT25-1, gGT25-3, gGT25-5, gGT29, gGT29-3, gGT29-4, gGT29-5, gGT29-6, gGT29-7, 3GT1, 3GT2, 3GT3, 3GT4 and derived polypeptides therefrom in the catalyzed glycosylation of terpenoid compounds and the synthesis of new saponins, wherein the glycosyltransferases can specifically and efficiently catalyze tetracyclic triterpenoid compound substrates at positions C-20 and/or C-6 and/or C-3 during hydroxyl glycosylation, and/or transfer the glycosyl from a glycosyl donor to the first glycosyl of the tetracyclic triterpenoid compounds at position C-3, so as to extend the sugar chain. The glycosyltransferases can also be used for constructing man-made synthetic rare ginsenosides and a variety of new ginsenosides and derivatives thereof.

Abstract: A sound localization system includes a multi-mic sound collector and a computing device. The multi-mic sound collector includes a carrier and a plurality of sound receivers removably attached to the sound receivers. The computing device includes a data communicator, a synchronizer, and a processor. The data communicator receives preprocessed audio data from the multi-mic sound collector. The synchronizer synchronizes the preprocessed audio data. The processor analyzes the synchronized audio data to identify and localize a target audio feature. A sound localization method of the sound localization system is also provided. The present invention facilitates monitoring of the functioning or physiological signs of a monitored subject and allows early detection and diagnosis of abnormalities or diseases.