Abstract: A method for detecting a metal mask includes: providing a metal mask, where the metal mask has first sites arranged along a first long side, and a second site and a third site form a first straight line; calculating a vertical distance from each first site to the first straight line, where the vertical distance includes a first vertical distance; in a case that the first vertical distance is greater than 10 ?m and not greater than 15 ?m, determining a type of the metal mask, where the type includes a first type; in a case that the metal mask is of the first type, calculating a first distance between the second site and the third site, and a second distance between the fourth site and a central point of the first long side; and calculating the percentage of the second distance relative to the first distance.

Abstract: A method and an apparatus of frequency regulation of a power system involving renewable energy power generation, a computer device, and a non-transitory computer readable storage medium are provided. The method includes: constructing a system frequency dynamic model according to parameters associated with power generator sets in the power system, where the power generator sets comprise a renewable energy power generator set and a conventional energy power generator set; calculating secure operation indexes of the power system according to the system frequency dynamic model of the power system; and obtaining system comprehensive cost indexes of the power system, constructing a reserve allocation model of the power generator sets according to the system comprehensive cost indexes and the secure operation indexes of the power system, and regulating a system frequency of the power system according to the reserve allocation model.

Abstract: The present disclosure provides a three-dimensional memory device and a method of fabricating the same, which includes a substrate, and a memory stack structure. The memory stack structure is disposed on the substrate, and includes a plurality of stack units sequentially stacked into a staircase shape, wherein each of the stack units has a stepped slope, the stepped slope of any one of the stack units disposed in a related lower position is less than the stepped slope of another one of the stack units disposed over the one of the stack units. Through this arrangements, the three-dimensional memory device may therefore obtain an optimized structural integrity, as well as improved component efficiency.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A three-dimensional memory device includes a staircase structure comprising steps respectively comprising a conductive layers and a dielectric layer. A sidewall of the conductive layer is recessed from a sidewall of the dielectric layer to form a recess that exposes a portion of a bottom surface of the dielectric layer.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A DRAM includes a substrate, a plurality of first active regions disposed on the substrate and arranged end-to-end along the first direction, and a plurality of second active regions disposed between the first active regions and arranged end-to-end along the first direction. The second active regions respectively have a first sidewall adjacent to a first trench between the second active region and one of the first active regions and a second sidewall adjacent to a second trench between the ends of the first active regions, wherein the second sidewall is taper than the first sidewall in a cross-sectional view.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A semiconductor device, a method of fabricating the semiconductor device and a memory are disclosed. In the provided semiconductor device, bit line contact plugs partially reside on insulating material layers in gate trenches in active areas and thus can come into sufficient contact with the active areas. This ensures good electrical transmission between the bit line contact plugs and the active areas even when there are internal voids in the bit line contact plugs. Such bit line contact plugs allowed to contain internal voids can be fabricated in an easier and faster manner, thus allowing a significantly enhanced memory fabrication throughput.

Abstract: A semiconductor structure and a method of forming the semiconductor structure are disclosed. Through forming an electrically conductive structure on a trench isolation structure, utilization of a space above the trench isolation structure is achievable, which can reduce the space required in a semiconductor integrated circuit to accommodate the electrically conductive structure, thus facilitating dimensional shrinkage of the semiconductor integrated circuit.

Abstract: A sound localization system includes a multi-mic sound collector and a computing device. The multi-mic sound collector includes a carrier and a plurality of sound receivers removably attached to the sound receivers. The computing device includes a data communicator, a synchronizer, and a processor. The data communicator receives preprocessed audio data from the multi-mic sound collector. The synchronizer synchronizes the preprocessed audio data. The processor analyzes the synchronized audio data to identify and localize a target audio feature. A sound localization method of the sound localization system is also provided. The present invention facilitates monitoring of the functioning or physiological signs of a monitored subject and allows early detection and diagnosis of abnormalities or diseases.

Abstract: Provided are the use of glycosyltransferases gGT25, gGT13, gGT30, gGT25-1, gGT25-3, gGT25-5, gGT29, gGT29-3, gGT29-4, gGT29-5, gGT29-6, gGT29-7, 3GT1, 3GT2, 3GT3, 3GT4 and derived polypeptides therefrom in the catalyzed glycosylation of terpenoid compounds and the synthesis of new saponins, wherein the glycosyltransferases can specifically and efficiently catalyze tetracyclic triterpenoid compound substrates at positions C-20 and/or C-6 and/or C-3 during hydroxyl glycosylation, and/or transfer the glycosyl from a glycosyl donor to the first glycosyl of the tetracyclic triterpenoid compounds at position C-3, so as to extend the sugar chain. The glycosyltransferases can also be used for constructing man-made synthetic rare ginsenosides and a variety of new ginsenosides and derivatives thereof.

Abstract: A sound localization system includes a multi-mic sound collector and a computing device. The multi-mic sound collector includes a carrier and a plurality of sound receivers removably attached to the sound receivers. The computing device includes a data communicator, a synchronizer, and a processor. The data communicator receives preprocessed audio data from the multi-mic sound collector. The synchronizer synchronizes the preprocessed audio data. The processor analyzes the synchronized audio data to identify and localize a target audio feature. A sound localization method of the sound localization system is also provided. The present invention facilitates monitoring of the functioning or physiological signs of a monitored subject and allows early detection and diagnosis of abnormalities or diseases.

Abstract: A system for recognizing physiological sound comprises a receiving module, a feature extracting module, a classifier, and a comparing module. A method for recognizing physiological sound comprises receiving a physiological sound by the receiving module; extracting at least one feature from the physiological sound by the feature extraction module; classifying the at least one feature to identify at least one category by a classifier; and comparing the at least one category with a normal physiological sound and/or an abnormal physiological sound by the comparing module for evaluating a risk of disease. The method and system for recognizing physiological sound can precisely identify the specific physiological sound and exclude the noise.

Abstract: A circuit board includes a circuit board plate, a conductive ring, a solder mask and at least one insulating pad. The circuit board plate includes a surface and a conductive through hole passing through the surface and the circuit board plate, wherein the conductive through hole have a conductive layer disposed on a wall thereof. The conductive ring on the surface surrounds an opening of the conductive through hole on the surface and electrically connects to the conductive layer. The solder mask is disposed on the surface. The conductive ring is exposed outside of the solder mask. The insulating pad has a thickness. The first surface of the insulating pad is adapted to contact the solder mask or the surface and sited at periphery of the conductive ring. The second surface of the insulating pad is adapted for spacing a distance between a solder coating tool and the solder mask.

Abstract: A system for recognizing physiological sound comprises a receiving module, a feature extracting module, a classifier, and a comparing module. A method for recognizing physiological sound comprises receiving a physiological sound by the receiving module; extracting at least one feature from the physiological sound by the feature extraction module; classifying the at least one feature to identify at least one category by a classifier; and comparing the at least one category with a normal physiological sound and/or an abnormal physiological sound by the comparing module for evaluating a risk of disease. The method and system for recognizing physiological sound can precisely identify the specific physiological sound and exclude the noise.