Abstract: A cable-winding charger includes a housing, a main circuit board, a plug, a pivot base, a torsion spring, and a data cable. The main circuit board is in the housing and includes conductive rings. The conductive rings are coaxially arranged around the column of the housing. The plug is pivotally connected to the housing and electrically connected to the main circuit board. The pivot base is pivotally connected to the housing. Each conductive piece of the pivot base contacts the corresponding conductive ring. One end of the torsion spring is fixed to the column, and the other end of the torsion spring is fixed to the pivot base. One end of the cable body of the data cable is electrically connected to the conductive pieces, and the other end of the cable body is electrically connected to the connection port.

Abstract: A semiconductor device is provided, which includes a semiconductor epitaxial structure, a metal contact structure, and a metal oxide layer. The semiconductor epitaxial structure includes an active structure and a semiconductor contact layer located on the active structure along a vertical direction. The metal contact structure directly contacts the semiconductor contact layer. The metal oxide layer is overlapped with the metal contact structure in a horizontal direction. The metal oxide layer and the metal contact structure are separated in the horizontal direction.

Abstract: A method of preparation of trientine tetrahydrochloride crystals in which an anti-solvent at a feeding temperature is added into a trientine tetrahydrochloride solution and stirred for crystallization wherein the feeding temperature ranges from 50° C. to 75° C. and the anti-solvent is an alcohol solvent. A novel trientine tetrahydrochloride featuring XRPD peaks detected at 21.9, 24.8, 25.2, 28.0 and 35.6±0.1° 2? for stable storage of a pharmaceutical composition manufactured with the trientine tetrahydrochloride.

Abstract: A semiconductor structure is provided. The semiconductor structure includes an interconnection structure, a first transistor, and a second transistor. The interconnection structure includes a first metal line layer, a second metal line layer and a third metal line layer arranged over one another. The first transistor includes a gate structure. The second transistor is disposed adjacent to the first transistor, and includes a source/drain structure. The gate structure of the first transistor is disposed over and electrically connected to the first metal line layer, and the source/drain structure of the second transistor is arranged below and electrically connected to the second metal line layer through the third metal line layer. A manufacturing method of a semiconductor structure is also provided.

Abstract: A low power consumption elevator brake includes the device body and the collection box located on the inner side of the device body. The bottom of the device body is installed with a base, and the side of the base is provided with a collection tank. The top of the device body is connected with a vacuum pipe connected to the collection tank. The top of the vacuum pipe is provided with an interception module. The side of the base is connected with an air outlet pipe connected to the collection tank. The air outlet pipe is provided with an exhaust fan, and the base is provided with a filter module through the collection tank.

Abstract: A three-dimensional integrated structure and the manufacturing method(s) thereof are described. The three-dimensional integrated structure includes a substrate having conductive features therein, and a component array disposed over the substrate and on the conductive features. The component array includes a metallic material layer and capacitor structures separated by the metallic material layer. Each of the capacitor structures includes a first metallic pillar, a first dielectric sheath surrounding the first metallic pillar, a second metallic sheath surrounding the first dielectric sheath, and a second dielectric sleeve surrounding the second metallic sheath. The metallic material layer laterally encapsulates the capacitor structures.

Abstract: Various embodiments of the present application are directed towards a memory device including a memory cell. The memory cell includes a plurality of semiconductor devices disposed on a substrate. A lower inter-metal dielectric (IMD) structure overlies the semiconductor devices. A plurality of conductive vias and a plurality of conductive wires are disposed within the IMD structure and are electrically coupled to the semiconductor devices. A data backup unit overlies the plurality of conductive vias and wires. The data backup unit includes a first source/drain structure, a second source/drain structure, a channel layer, a first memory gate structure, and a second memory gate structure. The first and second memory gate structures include an upper gate electrode over a ferroelectric layer. The first and second source/drain structures are directly electrically coupled to the semiconductor devices by way of the conductive vias and wires.

Abstract: An active device, a semiconductor device and a semiconductor chip are provided. The active device includes: a channel layer; a top source/drain electrode, disposed at a top side of the channel layer; a first bottom source/drain electrode and a second bottom source/drain electrode, disposed at a bottom side of the channel layer; a first gate structure and a second gate structure, located between the top source/drain electrode and the first bottom source/drain electrode, wherein the first gate structure comprises a non-ferroelectric dielectric layer, and the second gate structure comprises a ferroelectric layer; and a third gate structure and a fourth gate structure, located between the top source/drain electrode and the second bottom source/drain electrode, wherein the third gate structure comprises a non-ferroelectric dielectric layer, and the fourth gate structure comprises a ferroelectric layer.

Abstract: Provided are a semiconductor device and method of forming the same. The semiconductor device includes active components and a first barrier pattern. The active components are on a substrate. Each of the active components includes base insulation patterns on the substrate, gate electrodes on the substrate and spaced apart from each other with the base insulation patterns interposed therebetween, a gate dielectric layer on the gate electrodes and the base insulation patterns, a channel pattern on the gate dielectric layer, source electrodes on the channel pattern and spaced apart from each other, a drain electrode on the channel pattern and between the source electrodes, and second insulation patterns between the source electrodes and the drain electrode. The first barrier pattern disposed on the gate dielectric layer surrounds the channel patterns, the source electrodes, the drain electrodes, and the second insulation patterns of each of the active components.

Abstract: The present invention is related to 6-6 Fused Bicyclic Heteroaryl Compounds of the Formula A2 or A1 and their Use as LATS Inhibitors, or a salt, stereoisomer or pharmaceutical composition thereof; wherein the variables are as defined herein. The present invention further relates to a method of LATS inhibition in a cell population using a compound of Formula A1, or a salt, stereoisomer or pharmaceutical composition thereof. The present invention further provides a method for manufacturing compounds of the invention, and its therapeutic uses. The invention further provides methods to their preparation, to their medical use, their use in the treatment and management of diseases or disorders.

Abstract: A contextual visual-based synthetic-aperture radar (SAR) target detection method and apparatus, and a storage medium, belonging to the field of target detection is described. The method includes: obtaining an SAR image; and inputting the SAR image into a target detection model, and positioning and recognizing a target in the SAR image by using the target detection model, to obtain a detection result. In the present disclosure, a two-way multi-scale connection operation is enhanced through top-down and bottom-up attention, to guide learning of dynamic attention matrices and enhance feature interaction under different resolutions. The model can extract the multi-scale target feature information with higher accuracy, for bounding box regression and classification, to suppress interfering background information, thereby enhancing the visual expressiveness.

Abstract: The present disclosure provides a fire source detection method and device under the condition of a small sample size, and a storage medium, and belongs to the field of target detection and industrial deployment. The method includes the steps of acquiring fire source image data from an industrial site; constructing a fire source detection model; inputting the fire source image data to the fire source detection model, and analyzing the fire source image data via the fire source detection model to obtain a detection result, where the detection result includes a specific location, precision and type of a fire source. By means of the method, the problems of insufficient sample capacity and difficulty in training under the condition of a small sample size are solved, and different enhancement methods are used to greatly increase the number and quality of samples and improve the over-fitting ability of models.

Abstract: A suction assembly includes a main body, a sealing ring, an air duct, and a suction head. The main body includes a columnar wall, a top cover arranged at one end of the columnar wall and defining a first through hole, and a bottom cover arranged at another end of the columnar wall and defining a second through hole. The first through hole communicates with a negative pressure generating device. The sealing ring is sealed in the main body and movably arranged between the top cover and the bottom cover. The air duct includes a first end and a second end opposite the first end. The first end passes through the second through hole and is fixed in the sealing ring. The suction head is coupled to the second end.

Abstract: The present disclosure provides a synthetic aperture radar (SAR) image target detection method. The present disclosure takes the anchor-free target detection algorithm YOLOX as the basic framework, reconstructs the backbone feature extraction network from the lightweight perspective, and replaces the depthwise separable convolution in MobilenetV2 with one ordinary convolution and one depthwise separable convolution. The number of channels in the feature map is reduced by half through the ordinary convolution, features input from the ordinary convolution are further extracted by the depthwise separable convolution, and the convolutional results from the two convolutions are spliced. The present disclosure highlights the unique strong scattering characteristic of the SAR target through the attention enhancement pyramid attention network (CSEMPAN) by integrating channels and spatial attention mechanisms.

Abstract: An integrated device includes a power adapter and a wireless module. The power adapter includes a charging plug and a first connector. The wireless module includes a second connector mateable with the first connector. Each of the power adapter and the wireless module is an independent device. In addition, the power adapter and the wireless module can be detachably combined together through the first connector and the second connector. With this arrangement, when the power adapter and the wireless module are used separately, their respective functions can be achieved. When the power adapter and the wireless module are used in combination, the wireless module can be powered by the power adapter, thereby improving the convenience of using the integrated device.

Abstract: A memory device having a capacitor structure and a method of forming the same are provided. The memory device includes a substrate; a dielectric layer disposed on the substrate; and a plurality of capacitor structures respectively disposed in the dielectric layer. Each capacitor structure includes: a cup-shaped lower electrode; a first upper electrode conformally covering an outer surface of the cup-shaped lower electrode; a first capacitor dielectric layer disposed between the outer surface of the cup-shaped lower electrode and the first upper electrode; a second upper electrode conformally covering an inner surface of the cup-shaped lower electrode, wherein the second upper electrode is electrically connected to the first upper electrode by at least one connection via; and a second capacitor dielectric layer disposed between the inner surface of the cup-shaped lower electrode and the second upper electrode.

Abstract: An upright soundbar with projection function including an upright body, a projection module, a camera module, a computing module and a base is provided. A first projection lens of the projection module is tilted, a first projection angle is between a first projection optical axis of the first projection lens and a horizontal line, the first projection angle ranges from 15 degrees to 60 degrees, a projection direction of the projection module and a photography direction of the camera module are reversed with respect to each other, and the upright body is movable along a vertical direction with respect to the base.

Abstract: A physically unclonable function (PUF) device includes first and second inverters, each of which includes a common gate node and a common drain node. The common drain node of the first inverter is electrically connected to the common gate node of the second inverter. The PUF device also includes a common output node, a first resistive memory device (RMD) electrically connected to the common drain node of the first inverter and the common output node, and a second RMD electrically connected to the common drain node of the second inverter and the common output node.