Abstract: In some aspects, a fan with lighting effect includes a fan blade assembly, a fan frame, a light emitting module, a reflector and a light guide. The fan frame has a periphery structure radially disposed to surround the fan blade assembly, the periphery structure having an inner wall and an outer wall defining a slot therebetween. The light emitting module is disposed in the slot and oriented to emit light along a light path non-parallel with the rotational axis of the fan blade. The reflector is disposed in the slot and in the light path of the light emitting module for reflecting the light emitted by the light emitting module. The light guide is fitted to the slot in a manner to guide light to exit from the slot via the slot opening.

Abstract: Implementations of the subject matter described herein relate to generating animated infographics from static infographics. A computer-implemented method comprises: extracting visual elements of a static infographic; determining, based on the visual elements, a structure of the static infographic at least indicating a layout of the visual elements in the static infographic; and applying a dynamic effect to the visual elements based on the structure of the static infographic to generate an animated infographic.

Abstract: An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

Abstract: Systems and methods for reducing auxiliary transformer winding turns are disclosed. In one aspect, a circuit includes a transformer having a primary winding, a secondary winding and an auxiliary winding having a first end and a second end, a diode having a cathode and an anode, the anode coupled to the first end of the auxiliary winding, and a capacitor having a first terminal coupled to the second end of the auxiliary winding, and a second terminal coupled to the cathode.

Abstract: A method of verifying an integrated circuit stack includes adding a first dummy layer to a first contact pad of a circuit, wherein a location of the first dummy layer is determined based on a location of a second contact pad of a connecting substrate. The method further includes converting the first dummy layer location to the connecting substrate. The method further includes adjusting the first dummy layer location in the circuit in response to a determination that the first dummy layer location is misaligned with the second contact pad. The method further includes performing a first layout versus schematic (LVS) check of the connecting substrate including the first dummy layer in response to a determination that the first dummy layer is aligned with the second contact pad.

Abstract: A switch-mode power supply is used to provide an output voltage and includes an inductor and a power switch, where the power switch is used to control the current flowing through the inductor. A control method for the switch-mode power supply includes: providing a compensation signal controlled by the output voltage; providing a stable compensation signal for the low-frequency component of the compensation signal based on the compensation signal; providing a mixed operation mode, in which the switch-mode power supply alternately operates during a switching operation period and an skip period, the power switch opens at least once during the switching operation period, and the power switch is closed during the skip period; based on the difference between the compensation signal and the stable compensation signal, ending one of the switching operation period and skip period, and starting another one of the switching operation period and skip period.

Abstract: An electric auxiliary vehicle device and an operating method thereof are provided. An electric energy monitoring unit monitors an electric energy consumption and a charging amount of the electric auxiliary vehicle device. A processing circuit calculates a carbon emission and a carbon reduction based on the electric energy consumption and the charging amount of the electric auxiliary vehicle device, and generates a statistical data. A storage circuit stores the carbon emissions, the carbon reductions and the statistical data.

Abstract: A sperm sorting device includes a foundation unit and a channel unit. The foundation unit includes a foundation wall, a surrounding wall extending from a periphery of the foundation wall, and a plurality of column portions. The channel unit has an inner bordering wall, a base plate surrounded by and connected to the inner bordering wall and having first and second surfaces, and a plurality of channel holes. The column portions of the foundation unit respectively extend through the channel holes. A distance between a summit surface of each of the column portions and the foundation wall is not smaller than a distance between the second surface and the foundation wall. Each of the channel holes has a selection space that is not occupied by the respective one of the column portions and that gradually reduces in size in a direction from the foundation wall to the base plate.

Abstract: The present invention provides a power controller, an asymmetric half-bridge power supply, and a control method, which are related to the field of electronic technology. The asymmetric half-bridge includes a charging switch and a resonant switch that constitute a half-bridge. The charging switch and the resonant switch are used to control the resonant circuit, which includes a transformer and a resonant capacitor. The asymmetric half-bridge power supply is used to provide an output voltage and to supply power to a load. The control method includes: providing a compensation signal based on the output voltage; turning on the charging switch for a charging switch turn-on duration; turning on the resonant switch for a resonant switch turn-on duration; and adjusting the resonant switch turn-on duration based on the compensation signal, so that the resonant switch turn-on duration increases as the load decreases.

Abstract: An atomizer for an electronic cigarette includes an atomization compartment housing, an atomizer assembly and an outer cover covering the atomization compartment housing. The outer cover is provided with a suction nozzle opening and a communication hole. The atomization compartment housing includes an atomization cavity, an opening and a through groove. The atomization cavity is disposed inside the atomization compartment housing, and the atomizer assembly is disposed inside the atomization cavity. The opening is disposed at an end of the atomization compartment housing and communicates with the atomization cavity. The opening and the atomization cavity form a smoke passage that communicates with the suction nozzle opening. The through groove is disposed in an outer wall of the atomization compartment housing. The through groove and the outer cover form an intake passage. Two ends of the intake passage communicate with the suction nozzle opening and the communication hole respectively.

Abstract: A ribbon speaker includes a housing, first and second magnet assemblies, a ribbon diaphragm, a coil, and a flexible substrate. The first and second magnet assemblies is arranged in the housing. The same poles of the first magnet assembly and the second magnet assembly are arranged opposite to each other. The diaphragm is positioned between these magnet assemblies. The coil, placed on this diaphragm, includes two first connection portions. The flexible substrate includes a body, two connection portions, and two soldering portions. The body's first part is inside the housing, while the second part arranged outside. The second connections on the body's first part electrically connected to the coil's first connections. The externally positioned soldering portions facilitate easier assembly, significantly reducing soldering complexity. The soldering portions are respectively and electrically connected to the second connection portions.

Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.

Abstract: A photographing module includes a lens barrel, an optical lens assembly, an image sensor, the optical lens assembly includes, in order from the object side to the image side: a first lens with negative refractive power, a second lens with negative refractive power, a third lens with positive refractive power, a stop, a fourth lens with positive refractive power, a fifth lens with negative refractive power, a sixth lens with positive refractive power, a seventh lens with positive refractive power, wherein a distance from an object-side surface of the first lens to the image plane along an optical axis is TL, half of a diagonal length of an effective pixel area of the image sensor is IMH, an angle of a chief ray of a maximum view angle of the optical lens assembly which incident to the image plane is CRA, following condition is satisfied: 0.34°<TL/(IMH*CRA)<0.66°.

Abstract: A method for carrier scheduling includes a first terminal device receiving a first configuration information. The first configuration information is used to indicate the first terminal device to configure at least a first cell and a second cell. The first cell is a primary cell, the second cell is a secondary cell, and at least a portion of data transmission of the first cell is scheduled by a control information transmitted on the second cell.

Abstract: Vias, along with methods for fabricating vias, are disclosed that exhibit reduced capacitance and resistance. An exemplary interconnect structure includes a first source/drain contact and a second source/drain contact disposed in a dielectric layer. The first source/drain contact physically contacts a first source/drain feature and the second source/drain contact physically contacts a second source/drain feature. A first via having a first via layer configuration, a second via having a second via layer configuration, and a third via having a third via layer configuration are disposed in the dielectric layer. The first via and the second via extend into and physically contact the first source/drain contact and the second source/drain contact, respectively. A first thickness of the first via and a second thickness of the second via are the same. The third via physically contacts a gate structure, which is disposed between the first source/drain contact and the second source/drain contact.

Abstract: A device and a method for fabricating a ceramic reinforced composite coating based on plasma remelting and injection. The device includes a plasma cladding assembly, a powder feeding assembly, a metal-based substrate, and a thermal infrared imager. The plasma cladding assembly comprises a plasma gun and a plasma generator. A plasma arc generated is used to heat the substrate and form a molten pool on the substrate. The powder feeding assembly comprises a powder feeder configured to feed ceramic particles to the molten pool through a powder feeding copper tube. The thermal infrared imager is configured to acquire an infrared image of the molten pool and acquire an optimal injection position of the ceramic particles according to the infrared image. The optimal injection position is a midpoint between a trailing edge of the plasma arc emitted on the substrate and a trailing edge of the molten pool.

Abstract: An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a first dielectric layer, a first conductive feature, a second dielectric layer, and a barrier layer. The first conductive feature is disposed on the first dielectric layer, the second dielectric layer is disposed on the first dielectric layer and surrounds the sidewalls of the first conductive feature, the barrier layer is disposed between the first dielectric layer and the second dielectric layer and between the sidewalls of the first conductive feature and the second dielectric layer.

Abstract: One aspect of the present disclosure pertains to a semiconductor device. The semiconductor device includes a semiconductor substrate and a transistor formed over the semiconductor substrate. The transistor includes a first source/drain (S/D) feature, a second S/D feature, a channel region interposed between the first and second S/D features, and a gate stack engaging the channel region. The semiconductor device includes a first S/D contact landing on a top surface of the first S/D feature, a second S/D contact landing on a top surface of the second S/D feature, and a dielectric plug penetrating through the semiconductor substrate and landing on a bottom surface of the first S/D feature. The dielectric plug spans a width equal to or smaller than a width of the first S/D feature.

Abstract: The present disclosure provides antibodies and antigen-binding fragments thereof that bind to human CCR8, a pharmaceutical composition comprising said antibody, and use of the antibody or the composition for treating a disease, such as cancer.