Patents by Inventor Yun Huang

Yun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12224676
    Abstract: A synchronized rectification control method for use in a flyback converter is provided. The flyback converter includes a transformer including a secondary winding, a synchronous rectifier switch and a synchronous rectifier controller. The synchronous rectifier switch is coupled to the secondary winding and the synchronous rectifier controller, and is used to output a voltage difference signal and receive a control voltage. The method includes the synchronous rectifier controller detecting a rapid falling edge of the voltage difference signal to generate a rapid falling edge signal, generating an envelope signal according to the voltage difference signal, generating a time length control signal according to the voltage difference signal and the envelope signal, generating a blanking time signal according to the voltage difference signal and the time length control signal, and performing a logic operation on the blanking time signal and the rapid falling edge signal to generate the control voltage.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: February 11, 2025
    Assignee: ARK MICROELECTRONIC CORP. LTD.
    Inventors: Yi-Lun Shen, Yu-Yun Huang
  • Publication number: 20250047207
    Abstract: A controller and a control method for an asymmetric half-bridge power supply are disclosed. The asymmetric half-bridge power supply includes a first arm switch and a second arm switch forming a half-bridge, and a resonant circuit connected to the half-bridge. The method includes providing a duration parameter reflecting a second turn-on time of the second arm switch in a earlier switching cycle; providing a control signal to turn on the first arm switch for a first turn-on time in a later switching cycle; detecting whether the first arm switch has performed ZVS in response to a signal edge of the control signal to adjust the duration parameter accordingly; determining the second turn-on time of the second arm switch in the later switching cycle based on the duration parameter; and turning on the second arm switch for the second turn-on time after the first turn-on time in the later switching cycle.
    Type: Application
    Filed: August 2, 2024
    Publication date: February 6, 2025
    Applicant: ARK MICROELECTRONIC CORP. LTD.
    Inventors: Yi-Lun Shen, Yu-Yun Huang
  • Publication number: 20250032621
    Abstract: A drug conjugate includes a structure shown by the following formula: Z-(linker-[R]m)n. In the formula, Z is a drug compound, R is a sugar, and m and n are independently an integer from 1 to 6. The drug compound Z is a hepatitis virus targeting drug, a hepatitis B virus (HBV) drug, an inhibitor of apoptosis protein (IAP) antagonist, a multidrug resistance (MDR) inhibitor, or analogues, precursors, prodrugs, derivatives thereof.
    Type: Application
    Filed: May 30, 2024
    Publication date: January 30, 2025
    Applicant: SeeCure Taiwan Co., Ltd.
    Inventors: Wuu-Jyh Lin, Min-Ching Chung, Chi-Shiang Ke, Ya-Chen Tseng, Chin-Yu Liang, Yen-Chun Lee, Hsin-Jou Li, Tai-Yun Huang, Nai-Chen Hsueh, Yan-Feng Jiang
  • Publication number: 20250013009
    Abstract: An optical lens assembly includes a stop, and includes, in order from an object side to an image side: a first lens, a second lens, a third lens, a fourth lens, a fifth lens and a sixth lens, wherein an incident angle where a main light is incident on an image plane at a maximum view angle of the optical lens assembly is CRA, a maximum optical effective radius of the image-side surface of the sixth lens is CA62, and the following conditions are satisfied: 9.27<CRA/CA62<20.02.
    Type: Application
    Filed: September 14, 2023
    Publication date: January 9, 2025
    Inventors: Ching-Yun HUANG, Chun-Sheng LEE
  • Patent number: 12192661
    Abstract: An image sensor chip with depth information is provided. The image sensor chip includes an SPAD array, a time-to-digital converter module, a storage circuit, and a data processing circuit. The SPAD array includes a plurality of image sensor units, and each of the image sensor units includes a plurality of SPAD units and a decision circuit, wherein each of the SPAD units outputs a photon detection result within a scan period, and the decision circuit generates an image-sensing signal based on the photon detection results. The time-to-digital converter module generates a plurality of first time data in response to the image-sensing signals. The storage circuit stores the first time data temporarily. The data processing unit reads the first time data from the storage circuit and generates a plurality of second time data in response to the first time data.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: January 7, 2025
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Chen-Yi Lee, Hsi-Hao Huang, Tzu-Yun Huang
  • Patent number: 12189091
    Abstract: An optical lens assembly includes, in order from the object side to the image side: a first lens with negative refractive power, a second lens with negative refractive power, a third lens with positive refractive power, a stop, a fourth lens with positive refractive power, a fifth lens with negative refractive power, a sixth lens with positive refractive power, and a seventh lens with negative refractive power, wherein a focal length of the first lens is f1, a focal length of the sixth lens is f6, and following condition is satisfied: ?5.74<f1/f6<?1.83, which is favorable to reduce the impact of environmental temperature on the lens assembly and balance the distributing of the refractive power of the optical lens assembly, so as to correct the aberration and reduce the sensitivity.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: January 7, 2025
    Inventors: Shu-Tzu Lai, Ching-Yun Huang
  • Publication number: 20240418932
    Abstract: A package assembly includes a package substrate including a first die that includes a photonic integrated circuit, a second die located on the first die, the second die including an electronic integrated circuit electrically connected to the photonic integrated circuit, and an interposer module on the package substrate, at least a portion of the interposer module being located on the first die and electrically connected to the photonic integrated circuit.
    Type: Application
    Filed: July 29, 2024
    Publication date: December 19, 2024
    Inventors: Kuan-Yu Huang, Tien-Yu Huang, Yu-Yun Huang, Sen-Bor Jan, Sung-Hui Huang, Shang-Yun Hou
  • Patent number: 12168658
    Abstract: Provided are compounds, compositions and methods for inhibiting fascin activity or treating a condition or disorder mediated by fascin activity in a subject in need thereof.
    Type: Grant
    Filed: December 21, 2023
    Date of Patent: December 17, 2024
    Assignees: NOVITA PHARMACEUTICALS, INC., CORNELL UNIVERSITY
    Inventors: Xin-Yun Huang, Christy Young Shue
  • Publication number: 20240402463
    Abstract: An optical lens assembly includes a stop, and includes, in order from the object side to the image side: a first lens, a second lens, a third lens, a fourth lens, and fifth lens, wherein a focal length of the fifth lens is f5, a radius of curvature of an image-side surface of the fifth lens is R10, a distance between the stop to the image plane on the optical axis is SL, satisfying the relation: 1.27<f5*R10/SL<3.68.
    Type: Application
    Filed: August 2, 2023
    Publication date: December 5, 2024
    Inventors: Chun-Sheng LEE, Ching-Yun HUANG
  • Patent number: 12157198
    Abstract: An assembling equipment is for attaching a component to a workpiece. The assembling equipment includes a platform, a conveying mechanism, a first attaching mechanism, a film removing mechanism, and a second attaching mechanism. The conveying mechanism transports a positioning assembly carrying a workpiece to a first station. The first attaching mechanism attaches a first component with a protective film to the workpiece at the first station. The conveying mechanism transports the positioning assembly to a second station, and the film removing mechanism at the second station removes the protective film from the workpiece. The conveying mechanism transports the positioning assembly to a third station. The second attaching mechanism at the third station attaches a second component to the first component on the workpiece to be connected together. The assembling equipment reduces manual labor intensity and labor costs and improves efficiency of production and the product quality.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: December 3, 2024
    Assignee: Fulian Yuzhan Precision Technology Co., Ltd.
    Inventors: Bo Long, Shui-Yun Huang, Zhi Wang, Ge Zhao
  • Publication number: 20240387692
    Abstract: The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Yu KUO, Shang-Yun HUANG, Chin-Yin KUO
  • Patent number: 12142666
    Abstract: The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: November 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu Kuo, Shang-Yun Huang, Chih-Yin Kuo
  • Publication number: 20240350985
    Abstract: A system includes a storage tank, a first gas injection unit, a second gas injection unit, a concentration sensor, a dynamic control unit, and a data processing and analysis module. The storage tank is configured to hold a chemical liquid used in etching processes. The first gas injection unit includes a first gas pipe configured to inject a first gas into the storage tank, and a first adjustable valve mounted on the first gas pipe. The second gas injection unit includes a second gas pipe configured to inject a second gas into the storage tank, and a second adjustable valve mounted on the second gas pipe. The concentration sensor is connected to the storage tank. The dynamic control unit electrically connected to the first and second adjustable valves and the concentration sensor. The data processing and analysis module integrated with the dynamic control unit.
    Type: Application
    Filed: July 3, 2024
    Publication date: October 24, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Yu KUO, Shang-Yun HUANG, Weibo YU, Shang-Yuan YU
  • Patent number: 12124078
    Abstract: A package assembly includes a package substrate including a first die that includes a photonic integrated circuit, a second die located on the first die, the second die including an electronic integrated circuit electrically connected to the photonic integrated circuit, and an interposer module on the package substrate, at least a portion of the interposer module being located on the first die and electrically connected to the photonic integrated circuit.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 22, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Kuan-Yu Huang, Yu-Yun Huang, Tien-Yu Huang, Sung-Hui Huang, Sen-Bor Jan, Shang-Yun Hou
  • Publication number: 20240349499
    Abstract: A memory device and a manufacturing method thereof are provided. The memory device includes: active regions, defined in a semiconductor substrate; word line structures, formed on the semiconductor substrate, and intersected with the active regions, wherein each of the word line structures includes a floating gate and a control gate stacked on the floating gate; first protection layers, respectively covering an upper part of the control gate in one of the word line structures, wherein a bottom end of the control gate in each word line structure is lower than a bottom end of each first protection layer; and a second protection layer, covering the first protection layers, and wrapping the word line structures.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 17, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: Tzu-Yun Huang, Chung-Hsien Liu
  • Publication number: 20240338398
    Abstract: Systems and methods are provided to automate dialogs with community members providing reports of public safety events (e.g., crimes, medical emergencies, natural disasters) and to extract therefrom information to describe the particulars of such events across a wide range of possible event types. This includes using a first model to identify, from the community member's dialog text, a type for the incident being reported. This identification is then used to condition a second model to extract, from the community member's dialog text, one or more pieces of information relevant to the identified incident type (e.g., location of the incident, a description of a perpetrator of a crime, a description of a weapon used by the perpetrator, a description of a victim of the incident). The model can then output a subsequent response and/or a dialog tree or other expert system can select a pre-programmed response.
    Type: Application
    Filed: April 4, 2024
    Publication date: October 10, 2024
    Inventors: Yun Huang, Yiren Liu
  • Publication number: 20240313659
    Abstract: An asymmetrical half-bridge converter has an auxiliary winding, a main switch and a resonant switch. The auxiliary winding generates a feedback voltage. A controller turns on the main switch for a first ON duration, turns off the main switch and the resonant switch for a first OFF duration after the first ON duration, turns on the resonant switch for a second ON duration after the first OFF duration, turns off the main switch and the resonant switch for a second OFF duration after the second ON duration, turns on the resonant switch for a third ON duration after the second OFF duration, and turns off the main switch and the resonant switch for a third OFF duration after the third ON duration. The length of the second ON duration is a fixed ratio of a discharge period, and the fixed ratio is less than 1.
    Type: Application
    Filed: March 7, 2024
    Publication date: September 19, 2024
    Applicant: ARK MICROELECTRONIC CORP. LTD.
    Inventors: Yi-Lun Shen, Yu-Yun Huang
  • Publication number: 20240310604
    Abstract: An optical lens assembly includes, in order from an object side to an image side: a first lens with negative refractive power; a second lens with positive refractive power; a third lens with positive refractive power; a fourth lens with positive refractive power; a fifth lens with negative refractive power; a sixth lens with positive refractive power; wherein a chief ray angle incident on an image plane at a maximum view angle of the optical lens assembly is CRA, a distance from the image-side surface of the sixth lens to the image plane along an optical axis is BFL, a focal length of the optical lens assembly is f, and the following condition is satisfied: 0.54 ° / mm 2 < CRA / * BFL * f ) < 17.33 / mm 2 .
    Type: Application
    Filed: May 28, 2023
    Publication date: September 19, 2024
    Inventors: Ching-Yun HUANG, Chia-Wei LIAO, Chun-Sheng LEE
  • Publication number: 20240313662
    Abstract: A control method is disclosed for an asymmetric half-bridge power supply having a resonant circuit, a first switch, a second switch, and an assisting switch. The resonant circuit includes a transformer and a resonance capacitor. The transformer has a primary winding connected to the resonance capacitor and an auxiliary winding connected to the assisting switch. Within a switching cycle, the first switch is turned on for a first ON time to increase an exciting current of the transformer. After the first ON time, the second switch is turned on for a second ON time to decrease the exciting current. Whether a discharge duration of the transformer ends is detected. The assisting switch is turned ON after the end of the discharge duration, making the exciting current negative, so as to assist the first switch achieving ZVS.
    Type: Application
    Filed: March 12, 2024
    Publication date: September 19, 2024
    Applicant: ARK MICROELECTRONIC CORP. LTD.
    Inventors: Yi-Lun Shen, Yu-Yun Huang
  • Publication number: 20240267049
    Abstract: A delay-enhanced inverter circuit (DE-inverter) includes: a non-delay-enhanced inverter circuit (NE-inverter) having an output at a first node and an input at a second node; and a capacitive device feedback-coupled between the first node and the second node. The capacitive device includes: a first positive-channel metal-oxide (PMOS) field-effect transistor (FET) (PFET) feedback-coupled between the first node and the second node, the first PFET having a capacitor-configuration; and a first negative-channel metal-oxide (NMOS) FET (NFET) feedback-coupled feedback-between the first node and the first reference voltage, the first NFET having a capacitor-configuration.
    Type: Application
    Filed: March 13, 2023
    Publication date: August 8, 2024
    Inventors: Yi Yun Huang, Feng Lin, SiLiang Xie, PingPing Liu, Qingchao Meng