Abstract: Provided is a system for cooling semiconductor components including: a cover body including at least one upper cover and lower cover, which are separated from each other, face each other, and are combined to form a coolant flow path in an inner space thereof; an inlet combined to one side of the cover body and used for a coolant to flow in; an outlet combined to the other side of the cover body and used for the coolant to be discharged; at least one connecting part pin inserted and arranged toward a flowing direction of the coolant in the inner space of the cover body; and insertion grooves formed for the connecting part pins to be inserted in the inner space of the cover body, wherein the upper cover or the lower cover of the cover body is combined to at least one of the upper surfaces or the lower surfaces of semiconductor components by using connecting members so that heat transmitted from the semiconductor components to the connecting part pins is efficiently radiated by enlarging an area contacting the c

Abstract: Provided is a semiconductor package in which a bonding structure is formed using metal grains included in metal powder layers having a coefficient of thermal expansion (CTE) similar with those of a substrate and a conductor so as to minimize generation of cracks and to improve reliability of bonded parts.

Abstract: Provided is a semiconductor package including: at least two pads, a first substrate, at least two semiconductor devices, a second substrate, an electrical connection part, and a package housing, wherein the at least two pads are electrically or structurally separated from each other, the first substrate is formed of leads spaced apart from the pads, the at least two semiconductor devices are bonded on each of the pads, the second substrate is formed on and spaced apart from the upper parts of the semiconductor devices, is placed on and electrically connected to the at least one lead of the first substrate, and includes at least one penetrated opening unit on an area facing the at least one semiconductor device, the electrical connection part electrically connects the at least one semiconductor device with the second substrate, and the package housing covers the semiconductor devices and the electrical connection part. Accordingly, the semiconductor package has a multi die structure and is compact.

Abstract: Provided is a semiconductor package. More particularly, the present invention relates to a clip, a lead frame, and a substrate used in a semiconductor package having engraved patterns formed on surfaces thereof so as to increase an adhesive force and a corrosion resistant performance, thereby improving reliability of the semiconductor package, and the semiconductor package including the same.

Abstract: Provided is a pressurized semiconductor package including a lead frame including a pad board and a first terminal, a semiconductor chip, pressurizing members stacked to pressurize the semiconductor chip, and a package housing. The semiconductor chip is physically pressurized by the pressurizing members and is electrically connected to improve durability of the semiconductor package and to simplify a manufacturing process.

Abstract: A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.

Abstract: A semiconductor package according to an embodiment of the present invention includes: a heat sink board including an insulated board and a first metal layer formed on the insulated board; at least one semiconductor chip placed on the first metal layer; a plurality of lead frames connected to the semiconductor chips used to electrically connect the semiconductor chips to the outside; and a package housing partially covering the heat sink board, wherein both end parts of the insulated board are projected further than both end parts of the first metal layer.

Abstract: A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.

Abstract: Provided is a coupled semiconductor package including at least two substrate pads; at least one semiconductor chip installed on each of the substrate pads; at least one terminal each of which is electrically connected to each substrate pad and each semiconductor chip; and a package housing covering a part of the at least one semiconductor chip and the at least one terminal, wherein lower surfaces of one or more substrate pads are formed to be electrically connected and lower surfaces of another one or more substrate pads are formed to be electrically insulated. Accordingly, partial insulation may be economically realized without applying an insulating material to a heat sink, when the package is joined to the heat sink.

Abstract: A low-cost semiconductor package using a conductive metal structure includes a lead frame including a pad and a lead, a semiconductor chip attached onto the pad of the lead frame, an Aluminum (Al) pad formed on the semiconductor chip, a clip structure having one side adhered to the Al pad and the other side adhered to the lead of the lead frame, and a sealing member formed to surround the semiconductor chip and the clip structure via molding, wherein the semiconductor chip is adhered directly to a junction of the lead frame through a first adhesive layer formed of a solder or epoxy resin-based material and is adhered directly to a junction of the Al pad and the clip structure through a second adhesive layer formed of a solder-based material.

Abstract: Provided is a semiconductor package including: at least one first substrate including at least one first substrate terminal extended therefrom; at least one second substrate joined to the upper surface of the first substrate using ultrasonic welding; at least one semiconductor chip joined to the upper surface of the second substrate; a package housing covering the at least one semiconductor chip and an area of the second substrate, where ultrasonic welding is performed; and terminals separated from the first substrate, electrically connected to the at least one semiconductor chip through electric signals, and at least one of them is exposed to the outside of the package housing, wherein a thickness of the terminals formed inside the package housing is same as or smaller than a thickness of the first substrate and the second substrate includes at least one embossing groove on the upper surface thereof.

Abstract: Provided is a semiconductor package including: a first substrate comprising a specific pattern formed thereon to enable electrical connection; a second substrate, which is spaced apart from and faces the first substrate, comprising a specific pattern formed thereon to enable electrical connection; at least one semiconductor chip attached to the first substrate; at least one metal post formed in a non-vertical structure between the first substrate and the second substrate for dispersing a coefficient of thermal expansion (CTE) stress directly generated from the second substrate, wherein the metal post comprises one end attached on the at least one semiconductor chip, and the other end attached on the pattern of the first substrate or the second substrate; at least one terminal lead electrically connected to the first substrate or the second substrate; and a package housing covering the first and second substrates and exposing the terminal leads to the outside.

Abstract: A heat sink board according to an embodiment of the present invention includes a heat sink layer, an insulated layer formed on the heat sink layer, and a metal layer formed on the insulated layer, wherein both end parts of the heat sink layer and both end parts of the insulated layer are respectively projected further than the both end parts of the metal layer.

Abstract: Provided is a semiconductor package in which a bonding structure is formed using metal grains included in metal powder layers having a coefficient of thermal expansion (CTE) similar with those of a substrate and a conductor so as to minimize generation of cracks and to improve reliability of bonded parts.

Abstract: Provided is a method of manufacturing a semiconductor having a double-sided substrate including preparing a first substrate on which a specific pattern is formed to enable electrical connection, preparing at least one semiconductor chip bonded to a metal post, bonding the at least one semiconductor chip to the first substrate, bonding a second substrate to the metal post, forming a package housing by packaging the first substrate and the second substrate to expose a lead frame, and forming terminal leads toward the outside of the package housing. Accordingly, the semiconductor chip and the metal post are previously joined to each other and are respectively bonded to the first substrate and the second substrate so that damage generated while bonding the semiconductor chip may be minimized and electrical properties and reliability of the semiconductor chip may be improved.

Abstract: Provided is an apparatus for attaching semiconductor parts. The apparatus includes a substrate loading unit, at least one semiconductor part loader, a first vision examination unit, at least one semiconductor part picker, at least one adhesive hardening unit, and a substrate unloading unit, wherein the substrate loading unit supplies a substrate on which semiconductor units are arranged, the at least one semiconductor part loader supplies semiconductor parts, the first vision examination unit examines arrangement states of the semiconductor units, the at least one semiconductor part picker mounts semiconductor parts in the semiconductor units, the at least one adhesive hardening unit hardens and attaches adhesives interposed between the semiconductor units and the semiconductor parts, and the substrate unloading unit releases the substrate on which semiconductor parts are mounted.

Abstract: Provided is a semiconductor package having an exposed heat sink for high thermal conductivity. The semiconductor package includes at least one semiconductor chip 110, the lead frame 120, a signal line 130, the sealing member 140, and at least one heat sink 150, wherein the lead frame 120 has a first surface, to which the semiconductor chips 110 are attached, and a second surface facing the first surface, the signal line 130 electrically connects the semiconductor chips 110 and the semiconductor chip 110 to the lead frame 120 by wire bonding or clip bonding, the sealing member 140 surrounds areas where the semiconductor chips 110 are attached, except for an external connection terminal 121 of the lead frame 120, and exposes the second surface of the lead frame 120, and the at least one heat sink 150 are attached to the second surface of the exposed lead frame 120.

Abstract: Provided is a pressurized semiconductor package including a lead frame including a pad board and a first terminal, a semiconductor chip, pressurizing members stacked to pressurize the semiconductor chip, and a package housing. The semiconductor chip is physically pressurized by the pressurizing members and is electrically connected to improve durability of the semiconductor package and to simplify a manufacturing process.

Abstract: The present invention provides a semiconductor package including: a lead frame comprising at least one terminal pad and at least one first terminal lead structurally connected to the terminal pads; at least one semiconductor chip attached to the upper surfaces of the terminal pads by using a conductive first adhesive; at least one heat radiation board attached to the lower surfaces of the terminal pads by using a second adhesive; at least one second terminal lead electrically connected to the semiconductor chips, spaced apart from the terminal pads at regular intervals, and separated from the heat radiation boards; and a package housing covering parts of the first and second terminal leads, the semiconductor chips, and the terminal pads.

Abstract: Provided is a semiconductor package using a conductive metal structure, and more particularly, to a semiconductor package using a conductive metal structure formed in a clip or a column, through which a semiconductor chip and a lead of a lead frame are electrically connected to each other and an area where the semiconductor chip and the metal structure are adhered may be effectively improved so that productivity may increase and durability and electrical connection properties may be improved. The semiconductor package according to the present invention includes: a semiconductor chip; an aluminum pad formed on an upper part of the semiconductor chip; and a conductive metal structure adhered to the aluminum pad by a solder-based second adhesive layer, wherein the second adhesive layer includes intermetallic compounds (IMC) distributed to a lower fixed part thereof near the aluminum pad.