Patents by Inventor Yun Jing

Yun Jing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240417972
    Abstract: A sound absorbing panel includes a cavity section having a plurality of resonant cavities and a front panel having a plurality of sets of openings. Each set of openings is configured to provide fluid communication between one of the plurality of resonant cavities and the environment. Each of the plurality of resonant cavities has different dimensions from the remaining plurality of resonant cavities such that each of the resonant cavities is tuned for a different frequency range. Each of the sets of openings can differ from the remaining sets of openings in opening size, length, and distance between openings.
    Type: Application
    Filed: October 28, 2022
    Publication date: December 19, 2024
    Inventors: Yun Jing, Jun Ji
  • Publication number: 20240331673
    Abstract: An acoustic transmission enhancer that includes a resonance-based metamaterial. An acoustic transmission enhancement system that includes: a material in a medium; a resonance-based metamaterial on the material; and a transducer that emits acoustic waves to the material and the metamaterial through the medium.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 3, 2024
    Inventors: Mudassir HUSSAIN, Kazuki NAGASHIMA, Hiroyuki NAKANO, Yoshiyuki KUNIFUSA, Masaya NISHIDA, Yun JING, Jun JI, Hyeonu HEO, Mourad OUDICH
  • Patent number: 12067748
    Abstract: A system and method for adaptive color assignments to image labels during annotation of datasets includes preparing a dataset for image labeling by an annotator by: leveraging a global color analyzer to perform a global color distribution of a plurality of images to identify one or more overall colors present in the plurality of images, and a local color analyzer to perform a local color distribution for each image to identify one or more colors present in an area of interest of the image, and selecting a plurality of candidate colors to be used as image labels by the annotator, based on an output of the global color analyzer and an output of the local color analyzer.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: August 20, 2024
    Assignee: International Business Machines Corporation
    Inventors: Kun Yan Yin, Xue Ping Liu, Yun Jing Zhao, Fei Wang, Yu Tao Wu, Guan Chao Li
  • Publication number: 20240233322
    Abstract: Detecting fine-grained similarity in image includes determining a core area of a search image by generating an image salient map from a plurality of layers of the search image and determining a connected area based on the image salient map. Feature descriptors are generated from the core area of the search image. A plurality of capsule vectors are generated from different ones of a plurality of keypoints of the feature descriptors. Capsule vectors of the search image are compared with capsule vectors of each image of the dataset to generate a top-K matrix. Similarity scores for the top-K matrix are calculated. One or more image of the dataset having fine-grained similarity with the search image are selected based a bundled similarity score for each image of the dataset. The bundled similarity score is a summation of the similarity scores of the image.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 11, 2024
    Inventors: Fei Wang, Xue Ping Liu, Dan Zhang, Yun Jing Zhao, Kun Yan Yin, Zhi Xing Peng, Jian Long Sun
  • Patent number: 12008081
    Abstract: A method, a computing system and a computer program product for collecting and labelling images includes capturing a video of an object with a camera. A movement trace of a pointer is recorded that outlines the object while capturing the video of the object. Further included is generating a labeled image based at least on the captured video of the object and the recorded movement trace of the pointer. The labeled image includes the object and a line that surrounds the object.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: June 11, 2024
    Assignee: International Business Machines Corporation
    Inventors: Tian Tian Chai, Hong Bing Zhang, Kun Yan Yin, Miao Guo, Yu Luo, Yun Jing Zhao
  • Publication number: 20240135675
    Abstract: Detecting fine-grained similarity in image includes determining a core area of a search image by generating an image salient map from a plurality of layers of the search image and determining a connected area based on the image salient map. Feature descriptors are generated from the core area of the search image. A plurality of capsule vectors are generated from different ones of a plurality of keypoints of the feature descriptors. Capsule vectors of the search image are compared with capsule vectors of each image of the dataset to generate a top-K matrix. Similarity scores for the top-K matrix are calculated. One or more image of the dataset having fine-grained similarity with the search image are selected based a bundled similarity score for each image of the dataset. The bundled similarity score is a summation of the similarity scores of the image.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventors: Fei Wang, Xue Ping Liu, Dan Zhang, Yun Jing Zhao, Kun Yan Yin, Zhi Xing Peng, Jian Long Sun
  • Patent number: 11959956
    Abstract: A circuit check method and an electronic apparatus applicable to a to-be-tested circuit are provided. The to-be-tested circuit has one or more first nodes related to a gate voltage of one or more transistor devices and a plurality of second nodes. The circuit check method includes: setting endpoint voltages of a plurality of input interface ports of the to-be-tested circuit; obtaining a first node voltage of the first node according to a conduction path of the to-be-tested circuit and the gate voltage of the transistor device; obtaining a second node voltage of each second node according to the conduction path, the endpoint voltages, and the first node voltage; and performing circuit static check on the to-be-tested circuit by applying the first node voltage and the second node voltage.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: April 16, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yun-Jing Lin, Meng-Jung Lee, Yu-Lan Lo, Shu-Yi Kao
  • Publication number: 20240119563
    Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to detecting a closed ring in a three-dimensional (3D) point cloud via cycle basis. A system can comprise a memory configured to store computer executable components; and a processor configured to execute the computer executable components stored in the memory, wherein the computer executable components can comprise a filtering component that can filter a first undirected graph of a three-dimensional (3D) point cloud, by eliminating one or more edges of the first undirected graph that are longer than an adaptive threshold, wherein filtering the first undirected graph can produce a second undirected graph; and a detection component that can detect a minimum cycle basis of the second undirected graph to determine a cycle path that can traverse an irregular annular shape that is represented by the 3D point cloud.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Inventors: Xue Ping Liu, Fei Wang, Dan Zhang, Kun Yan Yin, Yun Jing Zhao, Jian Long Sun, Zhi Xing Peng
  • Patent number: 11955547
    Abstract: An integrated circuit device includes a gate stack disposed over a substrate. A first L-shaped spacer is disposed along a first sidewall of the gate stack and a second L-shaped spacer is disposed along a second sidewall of the gate stack. The first L-shaped spacer and the second L-shaped spacer include silicon and carbon. A first source/drain epitaxy region and a second source/drain epitaxy region are disposed over the substrate. The gate stack is disposed between the first source/drain epitaxy region and the second source/drain epitaxy region. An interlevel dielectric (ILD) layer disposed over the substrate. The ILD layer is disposed between the first source/drain epitaxy region and a portion of the first L-shaped spacer disposed along the first sidewall of the gate stack and between the second source/drain epitaxy region and a portion of the second L-shaped spacer disposed along the second sidewall of the gate stack.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Jen Pan, Yu-Hsien Lin, Hsiang-Ku Shen, Wei-Han Fan, Yun Jing Lin, Yimin Huang, Tzu-Chung Wang
  • Publication number: 20240104830
    Abstract: A computer-implemented method, system and computer program product for improving accuracy of a vision model. Images of an object with a first set of perspectives are received from a dataset used to train the vision model. A three-dimensional model of the object is then generated using the images of the object from the dataset. Using the three-dimensional model of the object, images of the object with a second set of perspectives are obtained. For example, the second set of perspectives may include different perspectives than the perspectives of the object from the images contained in the dataset. The dataset used to train the vision model may then be augmented with such images of the object with a second set of perspectives. In this manner, the dataset used to train the vision model includes a greater number of perspectives of the object thereby improving the accuracy of the vision model.
    Type: Application
    Filed: September 24, 2022
    Publication date: March 28, 2024
    Inventors: Kun Yan Yin, Xue Ping Liu, Yun Jing Zhao, Fei Wang, Yu Tao Wu, Yue Liu
  • Patent number: 11720969
    Abstract: In an approach for detecting vehicle identity and analyzing damage status using a single video, a processor provides an instruction for taking a video of a vehicle for a damage evaluation. A processor receives the video of the vehicle for the damage evaluation. A processor verifies the vehicle in the video being the same vehicle for the damage evaluation. A processor evaluates a damage status of the vehicle. A processor outputs a damage report based on the damage status of the vehicle.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: August 8, 2023
    Assignee: International Business Machines Corporation
    Inventors: Hong Bing Zhang, Jing Wu, Fan Li, Dan Zhang, Yun Jing Zhao, Xue Ping Liu, Xin Fang Hao
  • Publication number: 20230121812
    Abstract: Data augmentation is described to train an artificial intelligence model that includes analyzing a first data set to measure an amount of data in the data set and the variation in the amount of data in the first data set to determine deficiencies for training an artificial intelligence model. Augmenting data is added for the first data set having an amount of data measured that fails to meet a threshold value. Deficiencies in the variation in the amount of data in the first data set are augmented using augmentation methods outside the variation scope of the first data set to provide a second data set of augmented data. An artificial intelligence model is trained with a combined data set of the first data set, and the second data set of augmented data when the first and second data set have an amount of data meeting the threshold value.
    Type: Application
    Filed: October 15, 2021
    Publication date: April 20, 2023
    Inventors: Kun Yan Yin, Xue Ping Liu, Yun Jing Zhao, Fei Wang, Yu Tao Wu, Lu Yu
  • Publication number: 20230098133
    Abstract: A system and method for adaptive color assignments to image labels during annotation of datasets includes preparing a dataset for image labeling by an annotator by: leveraging a global color analyzer to perform a global color distribution of a plurality of images to identify one or more overall colors present in the plurality of images, and a local color analyzer to perform a local color distribution for each image to identify one or more colors present in an area of interest of the image, and selecting a plurality of candidate colors to be used as image labels by the annotator, based on an output of the global color analyzer and an output of the local color analyzer.
    Type: Application
    Filed: September 28, 2021
    Publication date: March 30, 2023
    Inventors: Kun Yan Yin, Xue Ping Liu, Yun Jing Zhao, Fei Wang, Yu Tao Wu, Guan Chao Li
  • Publication number: 20220374652
    Abstract: A method, a computing system and a computer program product for collecting and labelling images includes capturing a video of an object with a camera. A movement trace of a pointer is recorded that outlines the object while capturing the video of the object. Further included is generating a labeled image based at least on the captured video of the object and the recorded movement trace of the pointer. The labeled image includes the object and a line that surrounds the object.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 24, 2022
    Inventors: Tian Tian Chai, Hong Bing Zhang, Kun Yan Yin, Miao Guo, Yu Luo, Yun Jing Zhao
  • Publication number: 20210248681
    Abstract: In an approach for detecting vehicle identity and analyzing damage status using a single video, a processor provides an instruction for taking a video of a vehicle for a damage evaluation. A processor receives the video of the vehicle for the damage evaluation. A processor verifies the vehicle in the video being the same vehicle for the damage evaluation. A processor evaluates a damage status of the vehicle. A processor outputs a damage report based on the damage status of the vehicle.
    Type: Application
    Filed: February 7, 2020
    Publication date: August 12, 2021
    Inventors: Hong Bing Zhang, Jing Wu, Fan Li, Dan Zhang, Yun Jing Zhao, Xue Ping Liu, Xin Fang Hao
  • Publication number: 20210190844
    Abstract: A circuit check method and an electronic apparatus applicable to a to-be-tested circuit are provided. The to-be-tested circuit has one or more first nodes related to a gate voltage of one or more transistor devices and a plurality of second nodes. The circuit check method includes: setting endpoint voltages of a plurality of input interface ports of the to-be-tested circuit; obtaining a first node voltage of the first node according to a conduction path of the to-be-tested circuit and the gate voltage of the transistor device; obtaining a second node voltage of each second node according to the conduction path, the endpoint voltages, and the first node voltage; and performing circuit static check on the to-be-tested circuit by applying the first node voltage and the second node voltage.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 24, 2021
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yun-Jing Lin, Meng-Jung Lee, Yu-Lan Lo, Shu-Yi Kao
  • Patent number: 10830581
    Abstract: A method of determining a smoothness of a surface of an object is provided. The method includes processing an image of the object to obtain opposed first and second boundary lines of a first area of the image where light from a light source is reflected off the surface of the object. The method also includes resizing the image to normalize an average distance between the first and second boundary lines. The method includes processing the resized image to obtain resized first and second boundary lines. The method also includes calculating a variance from linearity for at least one of the resized first and second boundary lines to determine a smoothness value of the surface of the object.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Dan Zhang, Jing Wu, Fan Li, Xue Ping Liu, Yun Jing Zhao, Hong Bing Zhang
  • Patent number: 10783293
    Abstract: A checking method for checking whether a signal in a chip is interference-free, and the checking method includes the following operations: analyzing, by a processor, a netlist file to acquire a first node for outputting the signal in the chip, in which the netlist file is configured to describe a circuit architecture of the chip; searching, by the processor, candidate nodes associated with the signal according to the netlist file and the first node; and determining, by the processor, whether a first candidate node of the candidate nodes is connected to an anti-interference circuit, in order to check whether the signal is interference-free.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: September 22, 2020
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shu-Yi Kao, Yu-Lan Lo, Meng-Jung Lee, Yun-Jing Lin
  • Patent number: 10657303
    Abstract: This invention discloses a circuit encoding method and a circuit structure recognition method. The circuit encoding method is applied to a circuit structure recognition process of a circuit. The circuit is coupled to a voltage source and a reference voltage. The circuit encoding method includes: selecting a target transistor from the circuit; when a terminal of the target transistor is electrically connected to the voltage source or the reference voltage, adding a first value to a terminal value of the terminal; when the terminal of the target transistor is electrically connected to a terminal other than the voltage source and the reference voltage, adding a second value to the terminal value of the terminal; and taking a set of multiple terminal values of the target transistor as a transistor signature of the target transistor.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: May 19, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yun-Jing Lin, Meng-Jung Lee, Yu-Lan Lo, Shu-Yi Kao, Chien-Nan Liu, Yu-Kang Lou, Ching-Ho Lin
  • Publication number: 20190332726
    Abstract: A checking method for checking whether a signal in a chip is interference-free, and the checking method includes the following operations: analyzing, by a processor, a netlist file to acquire a first node for outputting the signal in the chip, in which the netlist file is configured to describe a circuit architecture of the chip; searching, by the processor, candidate nodes associated with the signal according to the netlist file and the first node; and determining, by the processor, whether a first candidate node of the candidate nodes is connected to an anti-interference circuit, in order to check whether the signal is interference-free.
    Type: Application
    Filed: September 17, 2018
    Publication date: October 31, 2019
    Inventors: Shu-Yi KAO, Yu-Lan Lo, Meng-Jung Lee, Yun-Jing Lin