Patents by Inventor Yun-Jung Jee

Yun-Jung Jee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070188185
    Abstract: A method of inspecting a leakage current of a dielectric layer on a substrate including a cell array region having a plurality of cell blocks including a patterned structure, the dielectric layer formed on the patterned structure, and a peripheral circuit region includes depositing a corona ion charge on a cell block selected from the plurality of cell blocks and measuring a variance of a surface voltage caused by a leakage current through the dielectric layer on the selected cell block. The variance of the surface voltage is compared with reference data to determine a leakage current characteristic of the dielectric layer.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 16, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Tae-Min Eom, Chung-Sam Jun, Yu-Sin Yang, Yun-Jung Jee
  • Publication number: 20070190904
    Abstract: The present invention is directed to a wafer holder and a related wafer conveyor system. The wafer holder holds a wafer and moves horizontally within a chamber. A contact area between the wafer and the wafer holder is reduced, and potential contaminants generated by ear between components of the wafer holder are trapped by an airtight cover. Since the wafer holder moves horizontally while being fixed to a guide rail, the wafer conveyor system reduces friction between the guide rail and the wafer holder.
    Type: Application
    Filed: April 10, 2007
    Publication date: August 16, 2007
    Inventors: Tae-Kyoung Kim, Yun-Jung Jee, Kyoung-Su Shin, Chung-Sam Jun
  • Patent number: 7220173
    Abstract: The present invention is directed to a wafer holder and a related wafer conveyor system. The wafer holder holds a wafer and moves horizontally within a chamber. A contact area between the wafer and the wafer holder is reduced, and potential contaminants generated by ear between components of the wafer holder are trapped by an airtight cover. Since the wafer holder moves horizontally while being fixed to a guide rail, the wafer conveyor system reduces friction between the guide rail and the wafer holder.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: May 22, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Kyoung Kim, Yun-Jung Jee, Kyoung-Su Shin, Chung-Sam Jun
  • Patent number: 7186577
    Abstract: A method of monitoring a density profile of impurities, the method including presetting a monitoring position of a thin layer coated on a substrate, the density profile of impurities being monitored from the monitoring position in a direction of thickness of the thin layer, moving an exposer for exposing a local area of the thin layer to the monitoring position, exposing the local area of the thin layer along the direction of thickness of the thin layer, forming a shape profile of the exposed local area of the thin layer, and monitoring the density profile of impurities by determining a density of impurities in accordance with the shape profile, and an apparatus therefor. The impurity density profile may be monitored without destroying a substrate on which a thin layer is coated, and an amount of impurities used for forming the thin layer may be monitored and controlled in real-time.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: March 6, 2007
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Yun-Jung Jee, Sun-Yong Choi, Chung-Sam Jun, Kwan-Woo Ryu
  • Patent number: 7186280
    Abstract: A method of inspecting a leakage current of a dielectric layer on a substrate including a cell array region having a plurality of cell blocks including a patterned structure, the dielectric layer formed on the patterned structure, and a peripheral circuit region includes depositing a corona ion charge on a cell block selected from the plurality of cell blocks and measuring a variance of a surface voltage caused by a leakage current through the dielectric layer on the selected cell block. The variance of the surface voltage is compared with reference data to determine a leakage current characteristic of the dielectric layer.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: March 6, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Min Eom, Chung-Sam Jun, Yu-Sin Yang, Yun-Jung Jee
  • Publication number: 20060022698
    Abstract: A method of inspecting a leakage current of a dielectric layer on a substrate including a cell array region having a plurality of cell blocks including a patterned structure, the dielectric layer formed on the patterned structure, and a peripheral circuit region includes depositing a corona ion charge on a cell block selected from the plurality of cell blocks and measuring a variance of a surface voltage caused by a leakage current through the dielectric layer on the selected cell block. The variance of the surface voltage is compared with reference data to determine a leakage current characteristic of the dielectric layer.
    Type: Application
    Filed: July 7, 2005
    Publication date: February 2, 2006
    Inventors: Tae-Min Eom, Chung-Sam Jun, Yu-Sin Yang, Yun-Jung Jee
  • Publication number: 20060011837
    Abstract: In a method and apparatus for forming a three-dimensional image for an inspection pattern, a reference intensity function of an inspection X-ray is formed in accordance with a continuous scanning depth, and is differentiated with respect to the scanning depth. The differential reference intensity function is decomposed into a start function and a characteristic function. The differential reference intensity function is then repeatedly integrated while a temporary vertical profile function is substituted for the start function until the temporary intensity of a reference X-ray is within an allowable error range. The temporary vertical profile function satisfying the error range is selected as an optimal vertical profile function. A surface shape is combined to the optimal vertical profile function along a depth of the inspection pattern to thereby form the three-dimensional image for the inspection pattern.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 19, 2006
    Inventors: Yun-Jung Jee, Chung-Sam Jun, Yu-Sin Yang, Tae-Kyoung Kim
  • Publication number: 20050221740
    Abstract: The present invention is directed to a wafer holder and a related wafer conveyor system. The wafer holder holds a wafer and moves horizontally within a chamber. A contact area between the wafer and the wafer holder is reduced, and potential contaminants generated by ear between components of the wafer holder are trapped by an airtight cover. Since the wafer holder moves horizontally while being fixed to a guide rail, the wafer conveyor system reduces friction between the guide rail and the wafer holder.
    Type: Application
    Filed: December 20, 2004
    Publication date: October 6, 2005
    Inventors: Tae-Kyoung Kim, Yun-Jung Jee, Kyoung-Su Shin, Chung-Sam Jun
  • Publication number: 20040263836
    Abstract: In a method and an apparatus for inspecting a wafer surface, a wafer is loaded into a chamber. An incident light including a first light for sensing a vertical position of the wafer and a second light for inspecting the wafer surface is irradiated onto the wafer. The first light is reflected on an inspection region or a next inspection region of the wafer and is detected to control a wafer position. The second light is scattered on the inspection region and is detected to inspect the wafer surface of the inspection region. Position information of a wafer is examined and a position of the wafer is adjusted before inspecting a surface of inspection region of a wafer so as to enable accurate inspection of the wafer surface.
    Type: Application
    Filed: June 25, 2004
    Publication date: December 30, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Tae-Min Eom, Yu-Sin Yang, Chung-Sam Jun, Yun-Jung Jee, Joung-Soo Kim, Moon-Kyung Kim, Sang-Mun Chon, Sun-Yong Choi
  • Publication number: 20040253750
    Abstract: A method of monitoring a density profile of impurities, the method including presetting a monitoring position of a thin layer coated on a substrate, the density profile of impurities being monitored from the monitoring position in a direction of thickness of the thin layer, moving an exposer for exposing a local area of the thin layer to the monitoring position, exposing the local area of the thin layer along the direction of thickness of the thin layer, forming a shape profile of the exposed local area of the thin layer, and monitoring the density profile of impurities by determining a density of impurities in accordance with the shape profile, and an apparatus therefor. The impurity density profile may be monitored without destroying a substrate on which a thin layer is coated, and an amount of impurities used for forming the thin layer may be monitored and controlled in real-time.
    Type: Application
    Filed: February 27, 2004
    Publication date: December 16, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yun-Jung Jee, Sun-Yong Choi, Chung-Sam Jun, Kwan-Woo Ryu