Patents by Inventor Yunsang Kim
Yunsang Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11977252Abstract: A display device includes a display panel configured to display an image, a first backlight unit that is disposed under the display panel and outputs first light, and a second backlight unit that is positioned between the display panel and the first backlight unit and outputs second light, wherein the first backlight unit includes a first light guide plate having first patterns protruding or recessed from a rear surface of the first light guide plate, the second backlight unit includes a second light guide plate having second patterns protruding from a rear surface of the second light guide plate, and the second patterns have an asymmetric pyramid shape.Type: GrantFiled: March 24, 2023Date of Patent: May 7, 2024Assignee: LG Display Co., Ltd.Inventors: Yunsang Kim, Yongkun Kim
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Publication number: 20240072142Abstract: Provided is a method of manufacturing a semiconductor device, the method including steps of providing a semiconductor substrate having one or more trenches, forming a gate insulating layer on the semiconductor substrate inside the trenches, and forming a buried gate electrode layer on the gate insulating layer to at least partially fill the trenches, wherein the step of forming the buried gate electrode layer includes a step of repeating a unit cycle a plurality of times, the unit cycle including an atomic layer deposition (ALD) process for forming a conductive layer on the gate insulating layer to serve as the buried gate electrode layer, and an atomic layer etching (ALE) process for preferentially etching portions of the conductive layer formed near the trenches and portions of the conductive layer formed on upper ends of the trenches over other portions of the conductive layer inside the trenches.Type: ApplicationFiled: July 6, 2023Publication date: February 29, 2024Inventors: Thomas Jongwan KWON, Hae-won CHOI, Yunsang KIM
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Publication number: 20240064967Abstract: A semiconductor device includes bit lines each extending in a first direction on a substrate and spaced apart from each other in a second direction, semiconductor patterns disposed on each of the bit lines and including a first semiconductor pattern disposed on a first bit line, and a second semiconductor pattern arranged to be offset in the second direction from the first semiconductor pattern on the first bit line, word lines each extending in the second direction and surrounding a sidewall of each of the semiconductor patterns, the word lines including a first word line extending in the second direction and surrounding the first semiconductor pattern, and a second word line spaced apart in the first direction from the first word line and extending in the second direction while surrounding the second semiconductor pattern, and storage nodes respectively disposed on the semiconductor patterns.Type: ApplicationFiled: June 6, 2023Publication date: February 22, 2024Applicant: SEMES CO., LTD.Inventors: Chengyeh Hsu, Thomas Jongwan Kwon, Yunsang Kim, Haewon Choi
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Publication number: 20240006167Abstract: Provided is a substrate processing module including a plurality of substrate processing apparatuses each including a process chamber having a processing space therein, a support unit for supporting a substrate in the processing space, a gas supply unit for supplying a process gas into the processing space, a plasma source for forming plasma from the process gas supplied into the processing space, and a laser unit for heating the substrate by irradiating a laser beam onto the substrate, wherein the substrate processing module further includes a laser beam generator for generating a laser beam, and a laser beam distribution unit for receiving the laser beam from the laser beam generator and distributing the laser beam to the laser units of the plurality of substrate processing apparatuses at time intervals.Type: ApplicationFiled: June 25, 2023Publication date: January 4, 2024Applicant: SEMES CO., LTD.Inventors: Kwang Ryul KIM, Yunsang KIM
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Publication number: 20240006160Abstract: Provided is a substrate processing apparatus including a chamber including a processing space; a support table provided within the processing space of the chamber and configured to support a substrate; a dielectric plate covering an opening in an upper wall of the chamber; a transparent electrode provided on the dielectric plate; a laser supply head configured to supply a laser beam toward the substrate supported on the support table via the transparent electrode and the dielectric plate; and a cooling device configured to cool the transparent electrode by injecting a cooling gas toward the transparent electrode.Type: ApplicationFiled: May 2, 2023Publication date: January 4, 2024Inventors: Kwangryul KIM, Yunsang KIM
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Publication number: 20230377894Abstract: Disclosed is a method of forming a semiconductor device, the method including: forming at least one metal catalyst layer on a rear surface of a semiconductor substrate, on which at least one buried power rail for power transfer is formed, to be at least partially aligned with the buried power rail; and forming at least one rear surface via hole by supplying an etchant to the semiconductor substrate so that the semiconductor substrate between the metal catalyst layer and the buried power rail is anisotropically etched while the metal catalyst layer descends to an inside of the semiconductor substrate using metal-assisted chemical etching (MACE).Type: ApplicationFiled: April 21, 2023Publication date: November 23, 2023Applicant: SEMES CO., LTD.Inventors: Minyoung Kim, Hanglim Lee, Yunsang Kim
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Publication number: 20230369029Abstract: A substrate processing device is provided. The substrate processing device includes: a substrate supporter configured to support a substrate; a heating ring horizontally surrounding the substrate supporter; and an edge ring horizontally surrounding the heating ring and configured to cover a top surface of the heating ring.Type: ApplicationFiled: April 11, 2023Publication date: November 16, 2023Applicant: SEMES CO., LTD.Inventors: Hyoungkyu SON, Jaewoong Sim, Donguk Kim, Yunsang Kim, Inhoe Kim
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Publication number: 20230228935Abstract: A display device includes a display panel configured to display an image, a first backlight unit that is disposed under the display panel and outputs first light, and a second backlight unit that is positioned between the display panel and the first backlight unit and outputs second light, wherein the first backlight unit includes a first light guide plate having first patterns protruding or recessed from a rear surface of the first light guide plate, the second backlight unit includes a second light guide plate having second patterns protruding from a rear surface of the second light guide plate, and the second patterns have an asymmetric pyramid shape.Type: ApplicationFiled: March 24, 2023Publication date: July 20, 2023Inventors: Yunsang Kim, Yongkun Kim
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Patent number: 11640025Abstract: A display device includes a display panel configured to display an image, a first backlight unit that is disposed under the display panel and outputs first light, and a second backlight unit that is positioned between the display panel and the first backlight unit and outputs second light, wherein the first backlight unit includes a first light guide plate having first patterns protruding or recessed from a rear surface of the first light guide plate, the second backlight unit includes a second light guide plate having second patterns protruding from a rear surface of the second light guide plate, and the second patterns have an asymmetric pyramid shape.Type: GrantFiled: December 20, 2021Date of Patent: May 2, 2023Assignee: LG Display Co., Ltd.Inventors: Yunsang Kim, Yongkun Kim
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Publication number: 20230101373Abstract: A display device includes a display panel configured to display an image, a first backlight unit that is disposed under the display panel and outputs first light, and a second backlight unit that is positioned between the display panel and the first backlight unit and outputs second light, wherein the first backlight unit includes a first light guide plate having first patterns protruding or recessed from a rear surface of the first light guide plate, the second backlight unit includes a second light guide plate having second patterns protruding from a rear surface of the second light guide plate, and the second patterns have an asymmetric pyramid shape.Type: ApplicationFiled: December 20, 2021Publication date: March 30, 2023Inventors: Yunsang Kim, Yongkun Kim
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Publication number: 20220084838Abstract: An ALE system for performing a metal ALE process to etch a surface of a substrate includes a processing chamber, a substrate support, a heat source, a delivery system, and a controller. The substrate support is disposed in the processing chamber and supports the substrate. The delivery system supplies a ligand or organic species to the processing chamber. The controller controls the delivery system and the heat source to perform an isotropic metal ALE process that includes: during an iteration of the isotropic metal ALE process, performing atomistic adsorption and pulsed thermal annealing; during the atomistic adsorption, exposing the surface to the ligand or organic species, where the ligand or organic species is void of a metal precursor and is selectively adsorbed to form a metal complex in the surface; and during the pulsed thermal annealing, pulsing the heat source multiple times to remove the metal complex from the substrate.Type: ApplicationFiled: January 7, 2020Publication date: March 17, 2022Inventors: He ZHANG, Yunsang KIM, Dong Woo PAENG
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Publication number: 20220005740Abstract: A substrate processing system includes a processing chamber, a substrate support, a heat source, a gas delivery system and a controller. The substrate support is disposed in the processing chamber and supports a substrate. The heat source heats the substrate. The gas delivery system supplies a process gas to the processing chamber. The controller controls the gas delivery system and the heat source to iteratively perform an isotropic atomic layer etch process including: during an iteration of the isotropic atomic layer etch process, performing pretreatment, atomistic adsorption, and pulsed thermal annealing; during the atomistic adsorption, exposing a surface of the substrate to the process gas including a halogen species that is selectively adsorbed onto an exposed material of the substrate to form a modified material; and during the pulsed thermal annealing, pulsing the heat source multiple times within a predetermined period to expose and remove the modified material.Type: ApplicationFiled: November 7, 2019Publication date: January 6, 2022Inventors: Dong Woo PAENG, Yunsang KIM, He ZHANG
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Patent number: 10832923Abstract: A lower plasma-exclusion-zone ring for a bevel etcher is provided that is configured to etch a bevel edge of a substrate. The lower plasma-exclusion-zone ring includes a ring-shaped body and a radially-outer stepped surface. The ring-shaped body of the lower plasma-exclusion-zone ring defines an upper surface, a lower surface, a radially inner surface, and a radially outer surface. The radially-outer stepped surface of the lower plasma-exclusion-zone ring extending inwardly into the ring-shaped body between the radially outer surface of the ring-shaped body and the upper surface of the ring-shaped body. The ring-shaped body is made of a material selected from a group consisting of aluminum oxide, aluminum nitride, silicon, silicon carbide, silicon nitride, and yttria.Type: GrantFiled: June 29, 2017Date of Patent: November 10, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Tong Fang, Yunsang Kim, Keechan Kim, George Stojakovic
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Patent number: 10811282Abstract: An upper plasma-exclusion-zone ring for a bevel etcher is provided that is configured to etch a bevel edge of a substrate. The upper plasma-exclusion-zone ring includes a ring-shaped body and a radially-inner stepped surface. The ring-shaped body of the upper plasma-exclusion-zone ring defines an upper surface, a lower surface, a radially inner surface, and a radially outer surface. The radially-inner stepped surface of the upper plasma-exclusion-zone ring extends inwardly into the ring-shaped body between the radially inner surface of the ring-shaped body and the lower surface of the ring-shaped body. The ring-shaped body is made of a material selected from a group consisting of aluminum oxide, aluminum nitride, silicon, silicon carbide, silicon nitride, and yttria.Type: GrantFiled: June 29, 2017Date of Patent: October 20, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Tong Fang, Yunsang Kim, Keechan Kim, George Stojakovic
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Patent number: 10748747Abstract: A system for controlling a size of an edge exclusion region is described. The system includes an upper electrode, an upper plasma exclusion zone (PEZ) ring located beside the upper electrode, an upper electrode extension located beside the upper PEZ ring, and a system controller configured to generate signals regarding a first position and a second position of the upper PEZ ring. The system further includes an actuator and a position controller coupled to the system controller and the actuator. The position controller is configured to receive the signals from the system controller, and to control the actuator based on the signals to achieve the first position and the second position The first and second positions are achieved independent of any movement of the upper electrode.Type: GrantFiled: October 3, 2017Date of Patent: August 18, 2020Assignee: Lam Research CorporationInventors: Keechan Kim, Yunsang Kim
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Patent number: 10714345Abstract: A method for forming a junction in a germanium (Ge) layer of a substrate includes arranging the substrate in a processing chamber. The method includes performing a plasma pretreatment on the substrate in the processing chamber for a predetermined pretreatment period using a pretreatment plasma gas mixture including hydrogen gas species. The method includes supplying a doping plasma gas mixture to the processing chamber including a phosphorous (P) gas species and an antimony (Sb) gas species. The method includes striking plasma in the processing chamber for a predetermined doping period. The method includes annealing the substrate during a predetermined annealing period to form the junction in the germanium (Ge) layer.Type: GrantFiled: September 23, 2019Date of Patent: July 14, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Yunsang Kim, Hyuk-Jun Kwon
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Patent number: 10629458Abstract: A method of cleaning a bevel edge of a semiconductor substrate is provided. A semiconductor substrate is placed on a substrate support in a reaction chamber of a plasma processing apparatus. The substrate has a dielectric layer overlying a top surface and a bevel edge of the substrate, the layer extending above and below an apex of the bevel edge. A process gas is introduced into the reaction chamber and energized into a plasma. The bevel edge is cleaned with the plasma so as to remove the layer below the apex without removing all of the layer above the apex.Type: GrantFiled: March 11, 2013Date of Patent: April 21, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Tong Fang, Yunsang Kim, Keechan Kim, George Stojakovic
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Publication number: 20200020537Abstract: A method for forming a junction in a germanium (Ge) layer of a substrate includes arranging the substrate in a processing chamber. The method includes performing a plasma pretreatment on the substrate in the processing chamber for a predetermined pretreatment period using a pretreatment plasma gas mixture including hydrogen gas species. The method includes supplying a doping plasma gas mixture to the processing chamber including a phosphorous (P) gas species and an antimony (Sb) gas species. The method includes striking plasma in the processing chamber for a predetermined doping period. The method includes annealing the substrate during a predetermined annealing period to form the junction in the germanium (Ge) layer.Type: ApplicationFiled: September 23, 2019Publication date: January 16, 2020Inventors: Yunsang KIM, Hyuk-Jun Kwon
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Patent number: 10431462Abstract: A method for forming a junction in a germanium (Ge) layer of a substrate includes arranging the substrate in a processing chamber. The method includes performing a plasma pretreatment on the substrate in the processing chamber for a predetermined pretreatment period using a pretreatment plasma gas mixture including hydrogen gas species. The method includes supplying a doping plasma gas mixture to the processing chamber including a phosphorous (P) gas species and an antimony (Sb) gas species. The method includes striking plasma in the processing chamber for a predetermined doping period. The method includes annealing the substrate during a predetermined annealing period to form the junction in the germanium (Ge) layer.Type: GrantFiled: February 6, 2018Date of Patent: October 1, 2019Assignee: Lam Research CorporationInventors: Yunsang Kim, Hyuk-Jun Kwon
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Patent number: 10224212Abstract: A method for isotropically etching film on a substrate with atomic layer control includes a) providing a substrate including a material selected from a group consisting of silicon (Si), germanium (Ge) and silicon germanium (SiGe). The method includes b) depositing a sacrificial layer on the material in a processing chamber by: cooling a lower portion of the substrate; one of creating or supplying an oxidant-containing plasma in the processing chamber; and increasing a surface temperature of the substrate for a predetermined period using rapid thermal heating while creating or supplying the oxidant-containing plasma in the processing chamber. The method includes c) purging the processing chamber. The method includes d) etching the sacrificial layer and the material by supplying an etch gas mixture and striking plasma in the processing chamber.Type: GrantFiled: January 22, 2018Date of Patent: March 5, 2019Assignee: LAM RESEARCH CORPORATIONInventors: Yunsang Kim, Hyuk-Jun Kwon, Dong Woo Paeng, He Zhang