Abstract: The present invention provides an eye drop formulation in the form of a solution, comprising (2R,3R,4S)-6-amino-4-[N-(4-chlorophenyl)-N-(1H-imidazol-2-ylmethyl)amino]-3-hydroxy-2-methyl-2-dimethoxymethyl-3,4-dihydro-2H-1-benzopyran or a pharmaceutically acceptable salt thereof; propylene glycol as a stabilizing agent; and a pH controlling agent in an aqueous medium, wherein the eye drop formulation has a pH ranging from 4.0 to 5.0. The eye drop formulation of the present invention can contain (2R,3R,4S)-6-amino-4-[N-(4-chlorophenyl)-N-(1H-imidazol-2-ylmethyl)amino]-3-hydroxy-2-methyl-2-dimethoxymethyl-3,4-dihydro-2H-1-benzopyran or a pharmaceutically acceptable salt thereof in a high concentration; and has an excellent stability. In addition, the pharmaceutical product for preventing or treating macular degeneration according to the present invention can be stored for extended periods.

Abstract: The present invention provides an eye drop formulation in the form of a solution, comprising (2R,3R,4S)-6-amino-4-[N-(4-chlorophenyl)-N-(1H-imidazol-2-ylmethyl)amino]-3-hydroxy-2-methyl-2-dimethoxymethyl-3,4-dihydro-2H-1-benzopyran or a pharmaceutically acceptable salt thereof; propylene glycol as a stabilizing agent; and a pH controlling agent in an aqueous medium, wherein the eye drop formulation has a pH ranging from 4.0 to 5.0. The eye drop formulation of the present invention can contain (2R,3R,4S)-6-amino-4-[N-(4-chlorophenyl)-N-(1H-imidazol-2-ylmethyl)amino]-3-hydroxy-2-methyl-2-dimethoxymethyl-3,4-dihydro-2H-1-benzopyran or a pharmaceutically acceptable salt thereof in a high concentration; and has an excellent stability. In addition, the pharmaceutical product for preventing or treating macular degeneration according to the present invention can be stored for extended periods.

Abstract: The present invention provides a pharmaceutical composition for preventing or treating macular degeneration, which comprises benzopyran derivatives substituted with secondary amines including imidazole or pharmaceutically acceptable salts thereof as an active ingredient. The pharmaceutical composition of the present invention may be used in the form of eye drops.

Abstract: The present invention provides a pharmaceutical composition for preventing or treating macular degeneration, which comprises benzopyran derivatives substituted with secondary amines including imidazole or pharmaceutically acceptable salts thereof as an active ingredient. The pharmaceutical composition of the present invention may be used in the form of eye drops.

Abstract: The present invention provides a pharmaceutical composition for preventing or treating macular degeneration, which comprises benzopyran derivatives substituted with secondary amines including imidazole or pharmaceutically acceptable salts thereof as an active ingredient. The pharmaceutical composition of the present invention may be used in the form of eye drops.

Abstract: In a method of fabricating a semiconductor device on a substrate which includes a plurality of pillar patterns, an impurity region between adjacent pillar patterns, a gate electrode on each pillar pattern, a first capping layer covering the gate electrode, and a separation layer covering the first capping layer between the gate electrodes of adjacent pillar patterns, the first capping layer is removed except for a portion contacting the separation layer, a sacrificial layer is formed to cover the gate electrode, a second capping layer is formed on sidewalls of each pillar pattern, the sacrificial layer is removed and a word line connecting the gate electrodes of the adjacent pillar patterns is formed. In the manufactured device, the first capping layer isolates the impurity region from the word line and the second capping region prevents the sidewalls of the respective pillar pattern from being exposed.

Abstract: A semiconductor device includes a substrate having trenches, buried bit lines formed in the substrate, and including a metal silicide layer and a metallic layer, wherein the metal silicide layer contacts sidewalls of the trenches and the metallic layer is formed over the sidewalls of the trenches and contacts the metal silicide layer.

Abstract: In a method of fabricating a semiconductor device on a substrate having a pillar pattern, a gate electrode is formed on the pillar pattern without etching the latter. A conductive pattern is filled between adjacent pillar patterns, a spacer is formed above the conductive pattern and surrounding sidewalls of each pillar pattern, and the gate electrode is formed by etching the conductive pattern using the spacer as an etch barrier.

Abstract: In a method of fabricating a semiconductor device on a substrate which includes a plurality of pillar patterns, an impurity region between adjacent pillar patterns, a gate electrode on each pillar pattern, a first capping layer covering the gate electrode, and a separation layer covering the first capping layer between the gate electrodes of adjacent pillar patterns, the first capping layer is removed except for a portion contacting the separation layer, a sacrificial layer is formed to cover the gate electrode, a second capping layer is formed on sidewalls of each pillar pattern, the sacrificial layer is removed and a word line connecting the gate electrodes of the adjacent pillar patterns is formed. In the manufactured device, the first capping layer isolates the impurity region from the word line and the second capping region prevents the sidewalls of the respective pillar pattern from being exposed.

Abstract: In a method of fabricating a semiconductor device on a substrate which includes a plurality of pillar patterns, an impurity region between adjacent pillar patterns, a gate electrode on each pillar pattern, a first capping layer covering the gate electrode, and a separation layer covering the first capping layer between the gate electrodes of adjacent pillar patterns, the first capping layer is removed except for a portion contacting the separation layer, a sacrificial layer is formed to cover the gate electrode, a second capping layer is formed on sidewalls of each pillar pattern, the sacrificial layer is removed and a word line connecting the gate electrodes of the adjacent pillar patterns is formed. In the manufactured device, the first capping layer isolates the impurity region from the word line and the second capping region prevents the sidewalls of the respective pillar pattern from being exposed.

Abstract: A semiconductor device includes a substrate having trenches, buried bit lines formed in the substrate, and including a metal silicide layer and a metallic layer, wherein the metal silicide layer contacts sidewalls of the trenches and the metallic layer is formed over the sidewalls of the trenches and contacts the metal silicide layer.

Abstract: A method for fabricating a semiconductor device includes forming a conductive material layer for forming a gate over a substrate including a cell region and a peripheral region, forming hard mask patterns over the conductive material layer, forming a mask pattern over the resultant structure in the cell region, exposing the peripheral region, trimming the hard mask patterns in the peripheral region, removing the mask pattern, and etching the conductive material layer to form gate patterns using the hard mask patterns.

Abstract: In a method of fabricating a semiconductor device having vertical channels and a method of patterning a gate electrode of such semiconductor device, an initial conductive layer is removed by multiple etching processes.

Abstract: A method of fabricating a vertical channel transistor for a semiconductor device includes forming, on a substrate, a plurality of active pillars each having a gate electrode formed on and surrounding a lower portion thereof; forming a first insulation layer over the active pillars to fill a gap region between the active pillars; partially removing the first insulation layer to exposes a circumferential surface of the gate electrode in all directions, without exposing the substrate in the gap region between the active pillars; forming a conductive layer on the remaining first insulation layer to fill the gap region between the active pillars; and patterning the conductive layer to form a word line that surrounds and contacts the circumferential surface of the gate electrode in all directions.

Abstract: A method for forming a vertical channel transistor in a semiconductor device includes providing a substrate, forming pillar patterns extending perpendicular from the upper surface of the substrate, forming a spin on carbon (SOC) layer in a gap region between the pillar patterns, forming photoresist patterns above a resultant structure where the SOC layer is filled to expose a region for an isolation trench, etching the SOC layer between the photoresist pattern barriers to expose the region for the isolation trench, and etching the exposed structure to a certain depth forming the isolation trench.

Abstract: A method of fabricating a vertical channel transistor for a semiconductor device includes forming, on a substrate, a plurality of active pillars each having a gate electrode formed on and surrounding a lower portion thereof; forming a first insulation layer over the active pillars to fill a gap region between the active pillars; partially removing the first insulation layer to exposes a circumferential surface of the gate electrode in all directions, without exposing the substrate in the gap region between the active pillars; forming a conductive layer on the remaining first insulation layer to fill the gap region between the active pillars; and patterning the conductive layer to form a word line that surrounds and contacts the circumferential surface of the gate electrode in all directions.

Abstract: A method of fabricating a semiconductor device includes forming a plurality of pillar patterns on a substrate, filling a gap between the pillar patterns with a first conductive layer, forming a first hard mask layer pattern over the pillar patterns adjacent in one direction, etching the first conductive layer using the first hard mask layer pattern as an etch barrier, forming a second hard mask pattern over the pillar pattern adjacent in the other direction that crosses the one direction, and forming a gate electrode surrounding the pillar patterns by etching the first conductive layer etched using the second hard mask layer pattern as an etch barrier.

Abstract: A method of fabricating a vertical channel transistor for a semiconductor device includes forming, on a substrate, a plurality of active pillars each having a gate electrode formed on and surrounding a lower portion thereof; forming a first insulation layer over the active pillars to fill a gap region between the active pillars; partially removing the first insulation layer to exposes a circumferential surface of the gate electrode in all directions, without exposing the substrate in the gap region between the active pillars; forming a conductive layer on the remaining first insulation layer to fill the gap region between the active pillars; and patterning the conductive layer to form a word line that surrounds and contacts the circumferential surface of the gate electrode in all directions.

Abstract: A method for forming a vertical channel transistor in a semiconductor device includes providing a substrate, forming pillar patterns extending perpendicular from the upper surface of the substrate, forming a spin on carbon (SOC) layer in a gap region between the pillar patterns, forming photoresist patterns above a resultant structure where the SOC layer is filled to expose a region for an isolation trench, etching the SOC layer between the photoresist pattern barriers to expose the region for the isolation trench, and etching the exposed structure to a certain depth forming the isolation trench.

Abstract: In a method of fabricating a semiconductor device having vertical channels and a method of patterning a gate electrode of such semiconductor device, an initial conductive layer is removed by multiple etching processes.