Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.

Abstract: A method of making a semiconductor structure includes forming a pixel array region on a substrate. The method further includes forming a first seal ring region on the substrate, wherein the first seal ring region surrounds the pixel array region, and the first seal ring region includes a first seal ring. The method further includes forming a first isolation feature in the first seal ring region, wherein forming the first isolation feature includes filling a first opening with a dielectric material, wherein the first isolation feature is a continuous structure surrounding the pixel array region. The method further includes forming a second isolation feature between the first isolation feature and the pixel array region, wherein forming the second isolation feature includes filling a second opening with the dielectric material.

Abstract: Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

Abstract: Some implementations described herein include an optoelectronic device for a low-lighting application and techniques to form the optoelectronic device. The optoelectronic device includes near infrared light vertical-cavity surface emitting laser devices, near infrared light pixel sensors, and visible light pixel sensors. The near infrared light vertical-cavity surface emitting laser devices and the near infrared light pixel sensor include selectively grown epitaxial materials (e.g., silicon germanium, gallium arsenide, or another type III/V material) that improves a performance of the near infrared light vertical-cavity surface emitting laser devices, near infrared light pixel sensors.

Abstract: A method of manufacturing a transistor structure includes forming a plurality of trenches in a substrate, lining the plurality of trenches with a dielectric material, forming first and second substrate regions at opposite sides of the plurality of trenches, and filling the plurality of trenches with a conductive material. The plurality of trenches includes first and second trenches aligned between the first and second substrate regions, and filling the plurality of trenches with the conductive material includes the conductive material extending continuously between the first and second trenches.

Abstract: An image sensor includes an array of image pixels and black level correction (BLC) pixels. Each BLC pixel includes a BLC pixel photodetector, a BLC pixel sensing circuit, and a BLC pixel optics assembly configured to block light that impinges onto the BLC pixel photodetector. Each BLC pixel optics assembly may include a first portion of a layer stack including a vertically alternating sequence of first material layers having a first refractive index and second material layers having a second refractive index. Additionally or alternatively, each BLC pixel optics assembly may include a first portion of a layer stack including at least two metal layers, each having a respective wavelength sub-range having a greater reflectivity than another metal layer. Alternatively or additionally, each BLC pixel optics assembly may include an infrared blocking material layer that provides a higher absorption coefficient than color filter materials within image pixel optics assemblies.

Abstract: A semiconductor device includes a pixel array comprising a first pixel and a second pixel. The semiconductor device includes a metal structure overlying a portion of a substrate between the first pixel and the second pixel. The semiconductor device includes a first barrier layer adjacent a sidewall of the metal structure. The semiconductor device includes a passivation layer adjacent a sidewall of the first barrier layer. The first barrier layer is between the passivation layer and the metal structure.

Abstract: A near infrared sensing device includes a near infrared light sensor configured to detect infrared light at least at a design-basis infrared wavelength, and a surface plasmon polariton structure including at least an embedded grating that is embedded in a light-receiving surface of the near infrared light sensor. The surface plasmon polariton structure is configured to couple with light at the design-basis infrared wavelength to form a surface plasmon polariton at the light-receiving surface of the near infrared light sensor. The surface plasmon polariton structure may further include a metal grating disposed on the light-receiving surface of the near infrared light sensor and aligned with the embedded grating. The embedded grating may comprise an embedded metal grating that is embedded in the light-receiving surface of the near infrared light sensor, or trenches formed in the light-receiving surface of the near infrared light sensor and at least partially filled with air.

Abstract: A method of detecting electromagnetic radiation includes illuminating a photodiode of a pixel sensor with electromagnetic radiation, using vertical gate structures of a transfer transistor to couple a cathode of the photodiode to an internal node of the pixel sensor, thereby generating an internal node voltage level, and generating an output voltage level of the pixel sensor based on the internal node voltage level.

Abstract: An image sensor device and methods of forming the same are described. In some embodiments, the device includes a substrate, a contact pad structure extending from a contact pad region to a black level correction region, a dielectric layer disposed over the substrate in the black level correction region, and a light blocking structure disposed on and through the dielectric layer in the black level correction region. A first portion of the contact pad structure disposed in the black level correction region is in contact with the light blocking structure, and the light blocking structure is in contact with the substrate.

Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.

Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.

Abstract: A pixel array may include a group of time-of-flight (ToF) sensors. The pixel array may include an image sensor comprising a group of pixel sensors. The image sensor may be arranged among the group of ToF sensors such that the image sensor is adjacent to each ToF sensor in the group of ToF sensors.

Abstract: An optical blocking region formed with patterned metal reduces light reflection toward pixel sensors in a pixel sensor array. The optical blocking region may be formed of a metal nanoscale grid in order to reflect more light away from the pixel sensors. The optical blocking region may include a dielectric layer, supporting the patterned metal, with high absorption structures or shallow deep trench isolation structures in order to increase absorption and thus reduce light reflection toward the pixel sensors.

Abstract: In-pixel separation structures may divide photodiodes of a pixel array into multiple regions. As a result, a lens of an image sensor device may be focused by using combining signals associated with different portions of the photodiodes. As a result, the lens may be focused faster and with fewer pixels of the pixel array, which conserves power, processing resources, and raw materials.

Abstract: A semiconductor structure comprises: a semiconductor substrate; one or more first implant layers disposed in the semiconductor substrate and forming a circuit portion and a first test portion, the circuit portion forming an at least partially formed semiconductor circuit; and one or more second implant layers disposed in the semiconductor substrate and further forming the circuit portion and a second test portion, wherein the first and second test portions are spaced apart. A first implantation profile of the one or more first implant layers of the first test portion is obtained during a testing procedure, and the first implantation profile is a representation of a second implantation profile of the one or more first implant layers of the circuit portion.

Abstract: Some implementations described herein include a complementary metal oxide semiconductor image sensor device for an image detection system that is used in a low-light environment. The complementary metal-oxide semiconductor image sensor device includes a photodiode for detecting near infrared and/or short-wave infrared light waves. The photodiode includes a layer of a quantum dot material and a transparent electrode over the layer of the quantum dot material. In addition to the photodiode having an improved quantum efficiency relative to a silicon-based photodiode, the photodiode is integrated within a color filter array structure to obviate the need for separate a separate visible light complementary metal-oxide semiconductor image sensor device in the image detection system.

Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.

Abstract: An image sensor device may include a pixel sensor array that includes a plurality of pixel sensors. A plurality of transistors may be electrically connected with a back end of line (BEOL) region of the image sensor device. The image sensor device may further include a bonding pad region in which a bonding pad is included. A dielectric plug may surround a portion of the bonding pad and may fully extend through a semiconductor device region to provide electrical, thermal, and/or optical isolation for the pixel sensors of the pixel sensor array. Additionally and/or alternatively, one or more capacitors in the BEOL region of the image sensor device. The one or more capacitors may enable a photocurrent generated by one or more of the pixel sensors to be directly transferred from the one or more source follower transistors to the one or more capacitors for storage.

Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.