Patents by Inventor Yun Yang

Yun Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250118814
    Abstract: A vehicle includes a battery management chip and a battery management system. The battery management chip comprises a battery cell data sampling module, a data processing module, a first communication module and a first power module. The battery cell data sampling module is used for acquiring battery cell data of a battery cell; the data processing module is connected to the battery cell data sampling module and used for processing the battery cell data; the first communication module is connected to the data processing module and used for sending the processed battery cell data to a control module; and the first power module is connected to the battery cell and the data processing module and used for receiving an initial voltage outputted by the battery cell, and performing boost processing on the initial voltage, so as to provide an operating voltage for the data processing module.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Xike XIE, Jie LI, Qifeng LI, Yun YANG
  • Publication number: 20250120122
    Abstract: One aspect of the present disclosure pertains to a semiconductor device. The semiconductor device includes a semiconductor substrate and a transistor formed over the semiconductor substrate. The transistor includes a first source/drain (S/D) feature, a second S/D feature, a channel region interposed between the first and second S/D features, and a gate stack engaging the channel region. The semiconductor device includes a first S/D contact landing on a top surface of the first S/D feature, a second S/D contact landing on a top surface of the second S/D feature, and a dielectric plug penetrating through the semiconductor substrate and landing on a bottom surface of the first S/D feature. The dielectric plug spans a width equal to or smaller than a width of the first S/D feature.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 10, 2025
    Inventors: Chen-Ming Lee, Shih-Chieh Wu, Po-Yu Huang, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20250116437
    Abstract: A refrigerator for drinks is provided. The refrigerator may have an open hole that is open upward, so a drink container may be inserted in an erect state in a cabinet through the open hole. An insertion guide connected to the open hole may be disposed in the cabinet and the width of the insertion guide may change in a height direction. Accordingly, a drink container may be guided by the insertion guide when being inserted into or taken out of the refrigerator for drinks.
    Type: Application
    Filed: December 18, 2024
    Publication date: April 10, 2025
    Applicant: LG ELECTRONICS INC.
    Inventors: Dae Woong KIM, Hee Su YANG, Min Kyu OH, Su Young LEE, Ja Yoen KIM, Hwa Yun CHOI
  • Publication number: 20250118598
    Abstract: An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a first dielectric layer, a first conductive feature, a second dielectric layer, and a barrier layer. The first conductive feature is disposed on the first dielectric layer, the second dielectric layer is disposed on the first dielectric layer and surrounds the sidewalls of the first conductive feature, the barrier layer is disposed between the first dielectric layer and the second dielectric layer and between the sidewalls of the first conductive feature and the second dielectric layer.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Shao-Kuan LEE, Kuang-Wei YANG, Gary HSU WEI LIU, Yen-Ju WU, Jing-Ting SU, Hsin-Yen HUANG, Hsiao-Kang CHANG, Wei-Chen CHU, Shu-Yun KU, Chia-Tien WU, Ming-Han LEE, Hsin-Ping CHEN
  • Publication number: 20250117186
    Abstract: The present disclosure relates to a multiplier, a multiply-accumulate circuit, an operational circuit, a processor, and a calculation apparatus. The operational circuit includes an input processing circuit and the multiply-accumulate circuit. The input processing circuit receives a first number and outputs the first number as a first multiplicator for feeding into the multiply accumulate circuit by negating a sign bit of the first number in a case in which the first number is a signed number, and directly outputs the first number as the first multiplicator for feeding into the multiply-accumulate circuit in a case in which the first number is an unsigned number. The input processing circuit further receives a previously known second number and directly outputs the second number as a second multiplicator for feeding into the multiply-accumulate circuit. The multiply-accumulate circuit includes a multiplication subcircuit and an accumulation subcircuit.
    Type: Application
    Filed: June 19, 2024
    Publication date: April 10, 2025
    Applicant: SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Danyang WANG, Tianzhi XUE, Yun ZHAI, Zhijun FAN, Zuoxing YANG
  • Patent number: 12272679
    Abstract: A display panel and a manufacturing method thereof are provided. The display panel includes a circuit substrate and a plurality of micro light-emitting diode structures. The micro light-emitting diode structures each include a micro light-emitting chip and a molding structure. The micro light-emitting chip is electrically bonded to the circuit substrate, and includes a first surface, a second surface, and a peripheral surface. The first surface is located on a side of the micro light-emitting chip facing the circuit substrate. The second surface is disposed opposite to the first surface. The peripheral surface connects the first surface and the second surface. The molding structure surrounds the peripheral surface and encloses the second surface of the micro light-emitting chip. The molding structure extends in a direction away from the circuit substrate and forms an inner side wall. The inner side wall and the second surface constitute an accommodating portion.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: April 8, 2025
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Shiang-Ning Yang, Sheng-Yuan Sun, Loganathan Murugan, Yu-Yun Lo, Bo-Wei Wu
  • Publication number: 20250110697
    Abstract: The present disclosure relates to a multiplier, a multiply-accumulate circuit, and a convolution operation unit. The multiplier includes: one or more selection circuits, each of the one or more selection circuits respectively configured to select a target preset multiple of a first operand from a preset multiple of a first operand as a fourth operand according to a corresponding third operand, wherein the target preset multiple is equal to a value of the third operand; and a partial product summing circuit, each of one or more input terminals of the partial product summing circuit respectively connected to an output terminal of corresponding one of at least one or more selection circuits, wherein the partial product summing circuit is configured to calculate a partial product sum of one or more fourth operands from the one or more selection circuits.
    Type: Application
    Filed: June 19, 2024
    Publication date: April 3, 2025
    Applicant: SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Danyang WANG, Shuangyan CHEN, Yun ZHAI, Zhijun FAN, Zuoxing YANG
  • Publication number: 20250109623
    Abstract: The present disclosure relates to a drive device, a vehicle, and a method of controlling a drive device. A drive device includes an articulated structure, a transmission structure, and a drive structure. The articulated structure includes a fixed end and a movable end articulately connected to the fixed end. The transmission structure is provided at the movable end and includes a connection rod and a rocker arm. One end of the connection rod is rotatably connected to the rocker arm, and the other end of the connection rod is rotatably connected to the fixed end. The drive structure is provided at the movable end and includes an actuator and a drive shaft. The drive shaft is fixedly connected to an end of the rocker arm away from the connection rod. The actuator drives the drive shaft to rotate the rocker arm about an axis of the drive shaft.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 3, 2025
    Applicants: Zhejiang ZEEKR Intelligent Technology Co., Ltd., Zhejiang Geely Holding Group Co., Ltd.
    Inventors: Jie YANG, Huosen CAO, Xiang HU, Zhiyong LIU, Guolin LI, Yun XU
  • Publication number: 20250111650
    Abstract: A deep learning method of an artificial intelligence model for medical image recognition is provided. The method includes the following steps: obtaining a first image set, where the first image set includes at least two images captured with different parameters; performing image pre-processing on each image of the first image set to obtain a second image set; performing image augmentation on the second image set to obtain a third image set; adding the third image set to a training image data set; and training the artificial intelligence model using the training image data set.
    Type: Application
    Filed: February 15, 2024
    Publication date: April 3, 2025
    Inventors: Chia-Yuan CHANG, Chen-Hwa SUNG, Gigin LIN, Tzu-Hsiang YANG, Tzu-Yun WANG, Chien-Yu HUANG
  • Publication number: 20250112088
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first low dielectric constant (low-k) layer, a first metal layer, a metal cap layer, a dielectric on dielectric (DoD) layer, an etch stop layer (ESL), a second low-k layer, a metal via and a second metal layer. The dielectric constant of the first low-k layer is less than 4. The first metal layer is embodied in the first low-k layer. The first low-k layer exposes the first metal layer. The metal cap layer is disposed on the first metal layer. The DoD layer is disposed on the first low-k layer. The etch stop layer is disposed on the metal cap layer and the DoD layer. The second low-k layer is disposed above the etch stop layer. The metal via is embodied in the second low-k layer and connected to the first metal layer.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 3, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chin LEE, Yen Ju WU, Shao-Kuan LEE, Kuang-Wei YANG, Hsin-Yen HUANG, Jing Ting SU, Kai-Fang CHENG, Hsiao-Kang CHANG, Wei-Chen CHU, Shu-Yun KU, Chia-Tien WU, Ming-Han LEE, Hsin-Ping CHEN
  • Patent number: 12266703
    Abstract: An interconnect fabrication method is disclosed herein that utilizes a disposable etch stop hard mask over a gate structure during source/drain contact formation and replaces the disposable etch stop hard mask with a dielectric feature (in some embodiments, dielectric layers having a lower dielectric constant than a dielectric constant of dielectric layers of the disposable etch stop hard mask) before gate contact formation. An exemplary device includes a contact etch stop layer (CESL) having a first sidewall CESL portion and a second sidewall CESL portion separated by a spacing and a dielectric feature disposed over a gate structure, where the dielectric feature and the gate structure fill the spacing between the first sidewall CESL portion and the second sidewall CESL portion. The dielectric feature includes a bulk dielectric over a dielectric liner. The dielectric liner separates the bulk dielectric from the gate structure and the CESL.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Che Lin, Po-Yu Huang, I-Wen Wu, Chen-Ming Lee, Chia-Hsien Yao, Chao-Hsun Wang, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 12266606
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a dielectric layer formed over a power rail; a bottom semiconductor layer formed over the dielectric layer; a backside spacer formed along a sidewall of the bottom semiconductor layer; a conductive feature contacting a sidewall of the dielectric layer and a sidewall of the backside spacer; channel semiconductor layers over the bottom semiconductor layer, wherein the channel semiconductor layers are stacked up and separated from each other; a metal gate structure wrapping each of the channel semiconductor layers; and an epitaxial source/drain (S/D) feature contacting a sidewall of each of the channel semiconductor layers, wherein the epitaxial S/D feature contacts the conductive feature, and the conductive feature contacts the power rail.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: April 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Yu Huang, Chia-Hsien Yao, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 12264106
    Abstract: A cerium-zirconium-aluminum-based composite material, a cGPF catalyst and a preparation method thereof are provided. The cerium-zirconium-aluminum-based composite material adopts a stepwise precipitation method, firstly preparing an aluminum-based pre-treated material, then coprecipitating the aluminum-based pre-treated material with zirconium and cerium sol, and finally roasting at high temperature to obtain the cerium-zirconium-aluminum-based composite material. The cerium-zirconium-aluminum-based composite material has better compactness and higher density, and when it is used in cGPF catalyst, it occupies a smaller volume of pores on the catalyst carrier, such that cGPF catalyst has lower back pressure and better ash accumulation resistance, which is beneficial to large-scale application of cGPF catalyst.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: April 1, 2025
    Assignee: SINOTECH COMPANY LIMITED
    Inventors: Dacheng Li, Jinfeng Wang, Li Lan, Hui Ye, Lan Yang, Feng Zhang, Yi Yang, Yongxiang Cheng, Tiantian Luo, Yinhua Dong, Yun Wang, Yun Li, Qizhang Chen
  • Publication number: 20250107196
    Abstract: A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature.
    Type: Application
    Filed: December 9, 2024
    Publication date: March 27, 2025
    Inventors: Ting Fang, Chia-Hsien Yao, Jui-Ping Lin, Chen-Ming Lee, Chung-Hao Cai, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 12261227
    Abstract: The present disclosure provides a thin film transistor, a display substrate and a display device, and belongs to the field of display technology. The thin film transistor of the present disclosure includes: a base, and a gate, an active layer, a source and a drain located on the base, where the gate includes a first gate and a second gate which are sequentially provided on the base and are electrically connected to each other; the active layer is located between the first gate and the second gate, and orthographic projections of the first gate and the second gate on the base are partially overlapped with an orthographic projection of the active layer on the base, and the orthographic projections of the first gate and the second gate on the base are partially overlapped with each other.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: March 25, 2025
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chenglong Wang, Yezhou Fang, Feng Li, Lei Yao, Lei Yan, Kai Li, Lin Hou, Xiaogang Zhu, Yun Gao, Yanzhao Peng, Teng Ye, Hua Yang
  • Publication number: 20250095238
    Abstract: The disclosure relates to the field of medical image analysis, in particular to an image reconstruction and analysis method, system and device for saline contrast electrical impedance pulmonary perfusion and cardiac imaging. A saline contrast lung perfusion image reconstruction method, a pulsatile perfusion image reconstruction method, lung perfusion and regional V/Q noninvasive imaging method are included. The disclosure has very good application value in accurate reconstruction of medical images.
    Type: Application
    Filed: November 27, 2024
    Publication date: March 20, 2025
    Applicant: PEKING UNION MEDICAL COLLEGE HOSPITAL
    Inventors: HUAIWU HE, LIANGYU MI, SIYI YUAN, MENGRU XU, YUN LONG, QIANLIN WANG, YINGYING YANG, ZHANQI ZHAO
  • Publication number: 20250094901
    Abstract: The present invention provides an electric power material distribution and allocation method based on an optimized branch and bound method, including: sorting the distribution of each batch of electric power materials to obtain a material set R; screening available vehicle data to obtain a vehicle deadweight set W and a vehicle unique identification set C; determining whether available vehicles meet requirements; and using an optimized queued branch and bound method to obtain an optimal distribution and allocation scheme. According to the present invention, scientific scheme support is provided for the distribution and allocation of the electric power materials, the scientificity of the distribution of power grid materials is improved, the influence of human factors is reduced, the utilization rate of distribution vehicles is increased, the distribution cost of the materials is reduced, and the economic benefit is improved.
    Type: Application
    Filed: November 25, 2024
    Publication date: March 20, 2025
    Inventors: Xiao ZHAO, Baokang WANG, Jiayong YANG, Yun ZHANG, Yunjiang YU, Can SUN, Cong ZHU, Honghao DAI, Tianji XU, Zixiang YAN
  • Publication number: 20250087491
    Abstract: A method includes forming a gate stack, growing a source/drain region on a side of the gate stack through epitaxy, depositing a contact etch stop layer (CESL) over the source/drain region, depositing an inter-layer dielectric over the CESL, etching the inter-layer dielectric and the CESL to form a contact opening, and etching the source/drain region so that the contact opening extends into the source/drain region. The method further includes depositing a metal layer extending into the contact opening. Horizontal portions, vertical portions, and corner portions of the metal layer have a substantially uniform thickness. An annealing process is performed to react the metal layer with the source/drain region to form a source/drain silicide region. The contact opening is filled to form a source/drain contact plug.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Jui-Ping Lin, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20250083722
    Abstract: The present invention relates to a subway vehicle electronic record system based on blockchain technology, which mainly includes business view module, record information maintenance module, statistical analysis module, record information management module, system management module, and blockchain foundation platform. The invention comprehensively makes use of blockchain, database and other technologies to normalize heterogeneous data of subway vehicle record.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Inventors: Ming Li, Jiao Zhang, Yun Wei, Hongtao Zhu, Tingrui Cui, Minghui Ding, Fan Yang, Yu Zhang, Liyuan Zhao, Hao Guo
  • Publication number: 20250073659
    Abstract: A mixer includes: a mixing container having an internal space and a flow path through which a coolant flows; a heating member installed in the mixing container; and a sensor for sensing a temperature of at least one of a slurry contained in the mixing container and the coolant flowing along the flow path, wherein the heating member may heat at least one of the slurry and the coolant.
    Type: Application
    Filed: August 29, 2024
    Publication date: March 6, 2025
    Inventor: Ji Yun YANG