Abstract: An apparatus for preparing lithium sulfide includes a reaction chamber that has a reaction space for generating lithium sulfide and is provided to move a supplied lithium raw material in a predetermined direction; a lithium raw material supply unit provided to continuously supply the lithium raw material to an upstream side of the reaction chamber in the predetermined direction; a hydrogen sulfide supply unit provided to supply hydrogen sulfide to the reaction chamber; a heating unit; a lithium sulfide recovery unit provided on a downstream side of the reaction chamber in the predetermined direction and provided to recover lithium sulfide that is generated by a reaction between the hydrogen sulfide and the lithium raw material in the reaction chamber; an inert gas supply unit provided to supply an inert gas to the upstream side of the reaction chamber in the predetermined direction; and a moisture removal unit.

Abstract: A method for image alignment is provided. The method for image alignment includes the following stages. A first image with a first property from a first sensor is received. A second image with a second property from a second sensor is received. The first property is similar to the second property. The first feature correspondence between the first image and the second image is calculated. A third image with a third property from the first sensor and a fourth image with a fourth property from the second image sensor are received. The third property is different from the fourth property. Image alignment is performed on the third image and the fourth image based on the first feature correspondence between the first image and the second image.

Abstract: In an embodiment, a device includes: a semiconductor substrate; a first fin extending from the semiconductor substrate; a second fin extending from the semiconductor substrate; an epitaxial source/drain region including: a main layer in the first fin and the second fin, the main layer including a first semiconductor material, the main layer having an upper faceted surface and a lower faceted surface, the upper faceted surface and the lower faceted surface each being raised from respective surfaces of the first fin and the second fin; and a semiconductor contact etch stop layer (CESL) contacting the upper faceted surface and the lower faceted surface of the main layer, the semiconductor CESL including a second semiconductor material, the second semiconductor material being different from the first semiconductor material.

Abstract: A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature.

Abstract: The present invention relates to a core-shell typed composite filler including: a core including a thermosetting polymer resin; and a shell including a plurality of first nano/micro materials positioned on a surface of the core, and to a polymer composite material with the same applied. Further, the present invention also relates to a method of manufacturing a polymer composite material, the method includes: forming the core-shell typed composite filler; and dispersing the core-shell typed composite filler and the second nano/micro material into a polymer matrix.

Abstract: The present disclosure provides service processing methods and apparatuses. The method includes: in response to receiving a to-be-processed service request, creating a shared memory region, and determining a startup parameter, where the startup parameter includes information of the shared memory region; conveying the startup parameter to a second process such that the second process is started up based on the startup parameter; where the second process indicates a functional module used to implement the to-be-processed service request; based on the to-be-processed service request, generating a first processing command; writing the first processing command into the shared memory region such that the second process reads the first processing command from the shared memory region based on the information of the shared memory region, and performs a processing operation based on the first processing command.

Abstract: A display panel, a displaying device and a wearable device. The display panel includes a displaying region and a peripheral region surrounding the displaying region, a region of the peripheral region other than the bonding sub-region includes a first testing-unit group and a second testing-unit group, and each of the first testing-unit group and the second testing-unit group includes one or more circuit testing units; the displaying region includes a first lateral side and a second lateral side that extend in a first direction and face each other, the first direction refers to a direction from the bonding sub-region pointing to the displaying region; and a maximum distance from the first testing-unit group to the first lateral side in a direction perpendicular to the first direction is equal to a maximum distance from the second testing-unit group to the second lateral side in the direction perpendicular to the first direction.

Abstract: A method for tuning a plurality of image signal processor (ISP) parameters of a camera includes performing a first iteration. The first iteration includes extracting image features from an initial image, arranging a tuning order of the plurality of ISP parameters of the camera according to at least the plurality of ISP parameters and the image features, tuning a first set of the ISP parameters according to the tuning order to generate a first tuned set of the ISP parameters, and replacing the first set of the ISP parameters with the first tuned set of the ISP parameters in the plurality of ISP parameters to generate a plurality of updated ISP parameters.

Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. Three elliptic curve cryptographic instructions are proposed in the instruction set architecture for key exchange between an initiator and a responder. The initiator device executes the first elliptic curve cryptographic instruction to generate a key pair (rA, RA). In addition to considering the first temporary public key RA, the responder device further takes the second temporary public key RB into consideration when executing the second elliptic curve cryptographic instruction to generate the responder-generated shared key KB. Based on the temporary private key rA, and the temporary public keys RA and RB, the initiator device executes the third elliptic curve cryptographic instruction to generate the initiator-generated shared key KA.

Abstract: Deferred neural lighting in augmented image generation includes performing operations. The operations include generating a source light representation of a real-world scene from a panoramic image of the real-world scene, augmenting the real-world scene in an object representation of the real-world scene to generate an augmented scene, and processing the augmented scene to generate augmented image buffers. The operations further include selecting a target lighting representation identifying a target light source, processing, by a neural deferred rendering model, the augmented image buffers, the source lighting representation, and a target lighting representation to generate an augmented image having a lighting appearance according to the target light source and outputting the augmented image.

Abstract: A video encoding apparatus includes a content activity analyzer circuit and a video encoder circuit. The content activity analyzer circuit applies a content activity analysis process to a plurality of frames, and generate a plurality of content activity analysis results, wherein the plurality of frames are derived from a plurality of input frames of the video encoding apparatus. The video encoder circuit performs a video encoding process to generate a bitstream output of the video encoding apparatus. At least one frame is not encoded into the bitstream output according to the plurality of content activity analysis results.

Abstract: A semiconductor device structure includes nanostructures formed over a substrate. The structure also includes a gate structure formed over and around the nanostructures. The structure also includes a spacer layer formed over a sidewall of the gate structure over the nanostructures. The structure also includes a source/drain epitaxial structure formed adjacent to the spacer layer. The structure also includes a contact structure formed over the source/drain epitaxial structure with an air spacer formed between the spacer layer and the contact structure.

Abstract: A semiconductor device includes a layer having a semiconductive material. The layer includes an outwardly-protruding fin structure. An isolation structure is disposed over the layer but not over the fin structure. A first spacer and a second spacer are each disposed over the isolation structure and on sidewalls of the fin structure. The first spacer is disposed on a first sidewall of the fin structure. The second spacer is disposed on a second sidewall of the fin structure opposite the first sidewall. The second spacer is substantially taller than the first spacer. An epi-layer is grown on the fin structure. The epi-layer protrudes laterally. A lateral protrusion of the epi-layer is asymmetrical with respect to the first side and the second side.

Abstract: An interconnect fabrication method is disclosed herein that utilizes a disposable etch stop hard mask over a gate structure during source/drain contact formation and replaces the disposable etch stop hard mask with a dielectric feature (in some embodiments, dielectric layers having a lower dielectric constant than a dielectric constant of dielectric layers of the disposable etch stop hard mask) before gate contact formation. An exemplary device includes a contact etch stop layer (CESL) having a first sidewall CESL portion and a second sidewall CESL portion separated by a spacing and a dielectric feature disposed over a gate structure, where the dielectric feature and the gate structure fill the spacing between the first sidewall CESL portion and the second sidewall CESL portion. The dielectric feature includes a bulk dielectric over a dielectric liner. The dielectric liner separates the bulk dielectric from the gate structure and the CESL.

Abstract: A performance match method of memory, a memory storage device and a memory control circuit unit are disclosed. The method includes: receiving a performance match command from a host system; in response to the performance match command, adjusting an operation setting of a memory storage device to match a performance of the memory storage device with a performance requirement of the host system; and interacting with the host system based on the adjusted operation setting.

Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has a first register, storing a private key pointer pointing to a private key. In response to a single elliptic curve cryptographic instruction of an instruction set architecture, the processor reads a ciphertext input from a first storage space within a system memory, performing a decryption procedure using the elliptic curve cryptographic algorithm on the ciphertext input based on the private key obtained by referring to the first register to decrypt the ciphertext input and generate a plaintext output, and programming the plaintext output into a second storage space within the system memory.

Abstract: The present invention discloses Fuke Qianjin Capsules and a quality control method therefor. The capsules are made of Radix et caulis flemingiae, Caulis mahoniae, Herba andrographis, Zanthoxylum dissitum Hemsl., Caulis spatholobi, Radix angelicae sinensis, Radix codonopsis, and Radix rosa laevigata as raw materials. Each of the Fuke Qianjin Capsules contains not less than 2.0 mg of Z-ligustilide, and a total amount of andrographolide and dehydroandrographolide is not less than 1.9 mg. A new standard for controlling quality of the Fuke Qianjin Capsules has been established through an analysis of chemical ingredients in the Fuke Qianjin Capsules. This standard adds a variety of core ingredient content to the existing pharmacopoeia standards. According to the Fuke Qianjin Capsules made in this range, the consistency of effects between different batches is more stable. Moreover, the more the types of core ingredients are limited, the more stable the consistency of the drug effect.

Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has a first register storing a Hash value pointer, a second register storing a public key pointer, a third register storing a signature pointer, and a fourth register for storage of a verified result. In response to a first elliptic curve cryptographic instruction of an instruction set architecture, the processor reads the Hash value of the data by referring to the first register, obtains the public key by referring to the second register, obtains the digital signature to be verified by referring to the third register, performs a signature verification procedure using the elliptic curve cryptographic algorithm on the Hash value based on the public key and the digital signature to be verified to generate the verified result, and programs the verified result into the fourth register.

Abstract: A semiconductor device includes a source/drain component of a transistor. A source/drain contact is disposed over the source/drain component. A source/drain via is disposed over the source/drain contact. The source/drain via contains copper. A first liner at least partially surrounds the source/drain via. A second liner at least partially surrounds the first liner. The first liner and the second liner are disposed between the source/drain contact and the source/drain via. The first liner and the second liner have different material compositions.

Abstract: A plasma flood gun includes a filament to emit first electrons based on a first filament current induced in the filament to heat the filament to a first temperature at a first time. The first electrons interact with an inert gas in an arc plasma chamber to generate a first plasma. A filament resistance meter measures a first filament resistance of the filament, in-situ, during generation of the first plasma. A filament current source adjusts, based on the first filament resistance, the first filament current induced in the filament at the first time to a second filament current induced in the filament at a second time to generate a second plasma in the arc plasma chamber at the second time.