Patents by Inventor Yun Zhang

Yun Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7774032
    Abstract: A video baby monitor system has a child unit with a back-up battery, a video camera, a microphone, and a transmitter configured to transmit video signals representing video images sent from the camera and audio signals representing sounds sent from the microphone. A parent unit having a receiver for receiving the video signals and the audio signals, a video screen for displaying the video images, and a speaker for emitting the sounds. The child unit is configured to operate on primary power from an external power source and to operate on back-up power from the back-up battery source. The monitor system is configured to switch from the primary power to the back-up power and to deactivate at least one video function upon detecting a loss of the primary power.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: August 10, 2010
    Assignee: Graco Children's Products Inc.
    Inventors: Jeffrey Swan, Craig Desrosiers, Fa-Yun Zhang
  • Patent number: 7768104
    Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: August 3, 2010
    Assignee: Vishay General Semiconductor, Inc.
    Inventors: Ta-Te Chou, Hui-Ying Ding, Yun Zhang, Hong-Yun He, Li-Zhu Hao
  • Patent number: 7724124
    Abstract: A low-capacitance multilayer chip varistor has capacitance lower than 0.5 pF at 1 MHz and has a characteristic of resisting more than thousands of times of 8 KV electrostatic shock, which comprises a ceramic main body, outer electrodes disposed at two ends of the ceramic main body and inner electrodes disposed therein; the ceramic main body comprises inorganic glass of 3˜50 wt % and semi-conductive or conductive particles of 50˜97 wt % with particle size of more than 0.1 ?m, and a layer of inorganic glass film covers the surface of semi-conductive or conductive particles, wherein the inorganic glass film contains semi-conductive or conductive particles of submicron or nanometer which is smaller than 1 micron, and the quantity contained of semi-conductive or conductive particles is less than 20 wt % of that of inorganic glass.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: May 25, 2010
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang, Xing-Guang Huang, Wei-Cheng Lien
  • Patent number: 7713859
    Abstract: A process for forming a solder bump on an under bump metal structure in the manufacture of a microelectronic device comprising exposing the under bump metal structure to an electrolytic bath comprising a source of Sn2+ ions, a source of Ag+ ions, a thiourea compound and/or a quaternary ammonium surfactant; and supplying an external source of electrons to the electrolytic bath to deposit a Sn—Ag alloy onto the under bump metal structure.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: May 11, 2010
    Assignee: Enthone Inc.
    Inventors: Thomas B. Richardson, Marlies Kleinfeld, Christian Rietmann, Igor Zavarine, Ortrud Steinius, Yun Zhang, Joseph A. Abys
  • Patent number: 7696888
    Abstract: A video baby monitor system has a child unit and a receiver unit. The receiver unit has a housing assembly with a first section having a viewing surface and a second section. The first and second sections are movable relative to one another between an open position exposing the viewing surface and a closed position where the second section covers the viewing surface. A video screen is provided on the viewing surface of the first section. The first section can be moved from the closed position to the open position such that the video screen faces upward for viewing.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: April 13, 2010
    Assignee: Graco Children's Products Inc.
    Inventors: Jeffrey Swan, Craig Desrosiers, Fa-Yun Zhang
  • Publication number: 20100072518
    Abstract: Methods of fabricating semiconductor devices using electrode-less wet-etching techniques to reduce defect densities on etched group III-nitride semiconductor surfaces are described herein. The methods generally involve contacting an etched surface of a component of a semiconductor device with a solution comprising a metal hydroxide and an oxidizing agent effective to reduce a roughness of the etched surface, wherein the etched surface is formed from a composition comprising a nitride of a group III element. Improved semiconductor devices are also disclosed.
    Type: Application
    Filed: September 14, 2009
    Publication date: March 25, 2010
    Applicant: Georgia Tech Research Corporation
    Inventors: Shyh-Chiang Shen, Russell Dean Dupuis, Yun Zhang
  • Patent number: 7670950
    Abstract: A method for metallizing a through silicon via feature in a semiconductor integrated circuit device substrate comprising immersing the semiconductor integrated circuit device substrate into an electrolytic copper deposition composition comprising a source of copper ions, an organic sulfonic acid or inorganic acid, or one or more organic compounds selected from among polarizers and/or depolarizers, and chloride ions.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: March 2, 2010
    Assignee: Enthone Inc.
    Inventors: Thomas B. Richardson, Yun Zhang, Chen Wang, Vincent Paneccasio, Jr., Cai Wang, Xuan Lin, Richard Hurtubise, Joseph A. Abys
  • Patent number: 7673318
    Abstract: A channel merging method for a VOD system, said method comprises the steps of: in response to requests from a plurality of clients for a video program, establishing a root channel (S1) and at least one sub-channel (S11), said root channel (S1) being established according to a request from a client that makes the earliest request, each of said sub-channels (S11) being established in response to a request from a client that makes a later request; and monitoring variation of the number of the clients that are using each of said established channels, and maintaining the channel if the number of the clients using the monitored channel is not zero, and closing the channel if the number of the clients using the monitored channel becomes zero.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: March 2, 2010
    Assignee: International Business Machines Corporation
    Inventors: Yun Zhang Pei, Ling Shao, Dong Xie
  • Publication number: 20090321691
    Abstract: A kind of manufacturing method for dual functions with varistor material and device has one of the characteristics among capacitance, inductance, voltage suppressor and thermistor in addition to surge absorbing characteristic, which microstructural compositions include a glass substrate with high resistance and three kinds of low-resistance conductive or semiconductive particles in micron, submicron and nanometer size uniformly distributed in the glass substrate to provide with good surge absorbing characteristic.
    Type: Application
    Filed: September 3, 2009
    Publication date: December 31, 2009
    Applicant: LEADER WELL TECHNOLOGY CO., LTD.
    Inventors: Yu-Wen Tan, Jie-An Zhu, Li-Yun Zhang
  • Publication number: 20090291493
    Abstract: The present invention provides an antibody to human immunodeficiency virus (HIV) envelope glycoprotein that can recognize one or more strains of HIV, wherein the epitope of HIV recognized by the antibody is inducible, and wherein the antibody binding to the epitope is enhanced by the presence of CD4 and the HIV co-receptor, and related fusion proteins, conjugates, nucleic acids, vectors, host cells, compositions and methods of use to inhibit an infection of a human at risk of becoming infected with HIV, to reduce the severity of an infection of a human infected with HIV, and to treat an infection of a human with HIV.
    Type: Application
    Filed: July 24, 2009
    Publication date: November 26, 2009
    Applicant: The U.S.A, as represented by the Secretary, Department of Health and Human Services
    Inventors: Dimiter S. Dimtrov, Mei-Yun Zhang
  • Publication number: 20090241080
    Abstract: A method of characterizing a device under test (DUT) includes determining a goal function associated with a setup and hold time for the DUT. A minimum value for the goal function is determined by iteratively adjusting setup and hold times for input data to the DUT, and determining whether the DUT performs according to specifications. The minimum goal function value will reflect minimum setup and hold time values based on weights associated with the goal function. This allows the minimum setup and hold times for the DUT to be characterized with a small number of binary searches, improving the speed of the characterization process.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Yifeng Yang, Yun Zhang, Yibin Xia, David J. Chapman
  • Publication number: 20090236705
    Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions.
    Type: Application
    Filed: March 18, 2008
    Publication date: September 24, 2009
    Applicant: VISHAY GENERAL SEMICONDUCTOR, INC.
    Inventors: TA-TE CHOU, HUI-YING DING, YUN ZHANG, HONG-YUN HE, LI-ZHU HAO
  • Patent number: 7566451
    Abstract: The present invention provides an antibody to human immunodeficiency virus (HIV) envelope glycoprotein that can recognize one or more strains of HIV, wherein the epitope of HIV recognized by the antibody is inducible, and wherein the antibody binding to the epitope is enhanced by the presence of CD4 and the HIV co-receptor, and related fusion proteins, conjugates, nucleic acids, vectors, host cells, compositions and methods of use to inhibit an infection of a human at risk of becoming infected with HIV, to reduce the severity of an infection of a human infected with HIV, and to treat an infection of a human with HIV.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: July 28, 2009
    Assignee: The United States of America as represented by the Department of Health and Human Services
    Inventors: Dimiter S. Dimitrov, Mei-Yun Zhang
  • Patent number: 7541910
    Abstract: A multilayer zinc oxide varistor without bismuth oxide system ingredients, and having variable breakdown voltages by controlling the thickness of the ceramic material; the varistor is bismuth-free and composed of zinc oxide as the primary constituent with alkaline earth element (Ba) as first additive, at least one of transition elements of Mn, Co, Cr, or Ni as second additives, at least one of rare earth elements of Pr, La, Ce, Nd or Tb as third additives and at least one of B, Si, Se, Al, Ti, W, Sn, Sb, Na, or K as rest additives, and the bismuth-free and zinc oxide based varistor exhibits an excellent ESD (Electro-Static Discharge) withstanding characteristic.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: June 2, 2009
    Assignee: SFI Electronics Technology Inc.
    Inventors: Wei-Cheng Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang
  • Publication number: 20090067043
    Abstract: An optical system for viewing an object has a plurality of lenses and a main optical axis coincident with the centers of the lenses. The optical system further comprises a low magnification optical subsystem that is operative to view the object at a first magnification and a high magnification optical subsystem that is operative to view the object at a second magnification that is higher than the first magnification. The high magnification optical subsystem has a high magnification optical axis along which light rays that are received from the main optical axis are transmitted. A movable element is locatable on the high magnification optical axis and is movable in directions transverse to the axis for receiving and transmitting light rays.
    Type: Application
    Filed: September 11, 2007
    Publication date: March 12, 2009
    Inventors: Siu Wing LAU, Zhuan Yun ZHANG, Yiu Ming CHEUNG, Chi Ping HUNG
  • Publication number: 20090059950
    Abstract: The invention provides an information polling method, apparatus and system thereof, wherein a message gateway receives an information polling request from an application in an application client, and according to the received information polling request, the message gateway acquires at least one message requested by the application and calculates a reference polling cycle of the application, and sends the acquired message requested by the application and the reference polling cycle to the application. The application determines a polling cycle of a next poll according to a load condition of the application client and the received reference polling cycle. According to the invention, efficiency and quality of the information polling is improved, while the system is ensured to run normally, reducing the cases of message blocking and system breakdown which may occur in the existing situations.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 5, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zhi Guo Gao, Yun Zhang Pei, Chen Wang, Bo Yang
  • Publication number: 20090035940
    Abstract: A method for metallizing a through silicon via feature in a semiconductor integrated circuit device substrate comprising immersing the semiconductor integrated circuit device substrate into an electrolytic copper deposition composition comprising a source of copper ions, an organic sulfonic acid or inorganic acid, or one or more organic compounds selected from among polarizers and/or depolarizers, and chloride ions.
    Type: Application
    Filed: August 4, 2008
    Publication date: February 5, 2009
    Applicant: ENTHONE INC.
    Inventors: Thomas B. Richardson, Yun Zhang, Chen Wang, Vincent Paneccasio, JR., Cai Wang, Xuan Lin, Richard Hurtubise, Joseph A. Abys
  • Publication number: 20080286898
    Abstract: A material composition having a core-shell microstructure suitable for manufacturing a varistor having outstanding electrical properties, the core-shell microstructure of the material composition at least comprising a cored-structure made of a conductive or semi-conductive material and a shelled-structure made from a glass material to wrap the cored-structure, and electrical properties of the varistors during low temperature of sintering process can be decided and designated by precisely controlling the size of the grain of the cored-structure and the thickness and insulation resistance of the insulating layer of the shelled-structure of material composition.
    Type: Application
    Filed: May 17, 2007
    Publication date: November 20, 2008
    Applicant: BEE FUND BIOTECHNOLOGY INC.
    Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun Nan Lin, Jie-An Zhu, Li-Yun Zhang, Wei-Cheng Lien
  • Publication number: 20080286582
    Abstract: A surge absorbing material with dual functions has one of the characteristics among capacitance, inductance, voltage suppressor and thermistor in addition to surge absorbing characteristic, which microstructural compositions include a glass substrate with high resistance and three kinds of low-resistance conductive or semiconductive particles in micron, submicron and nanometer size uniformly distributed in the glass substrate to provide with good surge absorbing characteristic.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 20, 2008
    Applicant: LEADER WELL TECHNOLOGY CO., LTD.
    Inventors: Yu-Wen Tan, Jie-An Zhu, Li-Yun Zhang
  • Patent number: 7449969
    Abstract: A printed circuit board (PCB) includes a signal layer and a power layer. The signal layer includes a crystal oscillator pad, a clock generator pad, and two capacitor pads. The crystal oscillator pad is connected to the clock generator pad and the capacitor pads via two signal lines. The power layer is divided into two areas by a cut-off line, the two areas respectively having different voltages. The cut-off line is located at one side of the crystal oscillator pad and the clock generator pad.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: November 11, 2008
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Hai-Yun Zhang