Abstract: A rotation device includes a base seat, an axle unit and a lock unit. The axle unit extends into the base seat. The lock unit includes a lock plate that is sleeved on the axle unit, and a lock member that is disposed on the base seat. The lock plate is formed with a first lock groove. The lock member has a lock portion that is operable to move into the first lock groove. The lock plate is locked by the lock portion of the lock member when the lock portion moves into the first lock groove, so that the axle unit and the lock plate are not rotatable relative to the base seat.

Abstract: A method, comprising: detecting an outage of at least one functionality in a live streaming; performing an first operation toward a second user terminal; storing data of the first operation in a database of the first user terminal; and displaying an effect corresponding to the first operation during the outage. The present disclosure may store the data of operation performed by the user terminal during outage and process the operation after the outage is recovered. Therefore, the streamers and viewers may feel interested and satisfied, instead of feeling anxious, and the user experience may be enhanced.

Abstract: The disclosure relates to a non-dispersive infrared (NDIR) gas sensor which detects the concentration of gas with a simple structure and method by manufacturing an optical waveguide with a gas-permeable polymer material instead of a conventional cavity or chamber type. An optical signal travels through the optical waveguide of gas-permeable polymer by total internal reflection, and the gas naturally penetrates the optical waveguide without the use of separate inlet and outlet openings, so that the optical signal and gas particles come into contact with each other within the optical waveguide. Since the optical signal detected by a photodetector at the other end of the optical waveguide after traveling while contacting the gas particles has properties changed according to the concentration of the gas which they have contacted in the optical waveguide, it is possible to measure the concentration of a specific gas from the detected optical signal.

Abstract: A video encoding method according to an embodiment of the present invention includes generating header information that includes information about resolutions of motion vectors of respective blocks, determined based on motion prediction for a unit image. Here, the header information includes flag information indicating whether resolutions of all motion vectors included in the unit image are integer-pixel resolutions. Further, a video decoding method according to another embodiment of the present invention includes extracting information about resolutions of motion vectors of each unit image from header information included in a target bitstream to be decoded; and a decoding unit for decoding the unit image based on the resolution information. Here, the header information includes flag information indicating whether resolutions of all motion vectors included in the unit image are integer-pixel resolutions.

Abstract: A heat dissipation module used for an electronic device is provided. The electronic device has a heat source. The heat dissipation module includes an evaporator, a plurality of heat conducting components, a pipe connected to the evaporator to form a loop, and a working fluid filled in the loop. An exterior of the evaporator has a heat conducting zone thermally contacted with the heat source to absorb heat generated from the heat source. The heat conducting components are disposed in the evaporator, located at an interior of the evaporator corresponding to the heat conducting zone. The heat conducting components are in pillar shape or rib shape respectively. The working fluid in liquid passes through the evaporator, absorbs heat, and is transformed into vapor to flow out of the evaporator. Each of the heat conducting components in rib shape is oriented in a flow direction of the working fluid.

Abstract: A method of forming the semiconductor device is provided. The method includes following steps. A memory structure is formed over a first conductive line over a substrate and is electrically connected to the first conductive line. A sacrificial layer is formed on the memory structure. A spacer layer is formed to cover the memory structure and the sacrificial layer. A first dielectric layer is formed to cover the spacer layer. A planarization process is performed to remove a portion of the first dielectric layer. A second dielectric layer is formed on the spacer layer and the first dielectric layer. A patterning process is performed to form an opening exposing a portion of the top surface of the sacrificial layer. The sacrificial layer is removed to form a recess. A second conductive line is formed in the opening and the recess to be electrically coupled to the memory structure.

Abstract: The present invention discloses a method for constructing a tile structure, wherein a current picture includes at least two or more tiles, the at least two or more tiles are split by a column splitting and a row splitting, at least one or more of the column splitting and the row splitting are performed by using a splitting length which is shorter than a width length or a height length of the current picture.

Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.

Abstract: An aircraft includes at least one passenger room (3). The room has a passenger chair (5) and a bed (7). These are separate units and can be used at the same time without one unit interfering with or restricting the full range of operations of the other unit and vice versa.

Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a patterned photoresist layer over a substrate and removing the patterned photoresist layer using a photoresist stripping composition that is free of dimethyl sulfoxide. The photoresist stripping composition includes an organic alkaline compound including at least one of a primary amine, secondary amine, a tertiary amine or a quaternary ammonium hydroxide or a salt thereof, an organic solvent selected from the group consisting of a glycol ether, a glycol acetate, a glycol, a pyrrolidone and mixtures thereof, and a polymer solubilizer.

Abstract: Provided is a method of manufacturing a racket grip 3D-tape, which entails coating a substrate with polyurethane of at least two different densities. Heavier polyurethane sinks, but lighter polyurethane rises, thereby resulting in unevenness of the surface of the racket grip 3D-tape.

Abstract: A semiconductor structure includes an active region of a substrate, a gate electrode layer disposed over the active region, an isolation structure surrounding the active region and the gate electrode layer, and a gate dielectric layer. The gate dielectric layer includes a first portion interposed between the bottom surface of the gate electrode layer and the top surface of the active region. The gate dielectric layer also includes a second portion interposed between the isolation structure and the sidewall of the active region.

Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.

Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.

Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.

Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.

Abstract: The disclosure provides an electronic lock without an active power source, an electronic lock system, and a method of operating the electronic lock. According to an exemplary embodiment, the electronic lock includes a WPR which receives wireless electrical power to provide power for the electronic lock; a circuit board electrically connected to the WPR and including a wireless transceiver which receives a lock command or an unlock command; and a controller configured to generate a lock control signal or an unlock control signal in response to receiving the lock command or an unlock command; and an actuator electrically connected to the circuit board and receives the lock control signal to lock a mechanical lock component or the unlock control signal to unlock the mechanical lock component.