Patents by Inventor Yung HAN

Yung HAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230041510
    Abstract: A remote diagnosis and treatment system and a remote diagnosis and treatment method are provided. The remote diagnosis and treatment method includes: establishing an online clinic room and adding a first terminal device and a second terminal device to the online clinic room by a server; in response to receiving a first end signal from the first terminal device, removing the first terminal device from the online clinic room, adding a patient corresponding to the second terminal device to a service-waiting queue, and transmitting the service-waiting queue to a third terminal device by the server; transmitting a first join signal corresponding to the second terminal device to the server according to the service-waiting queue by the third terminal device; and adding the third terminal device to the online clinic room according to the first join signal by the server.
    Type: Application
    Filed: March 18, 2022
    Publication date: February 9, 2023
    Applicants: Acer Incorporated, Acer Medical Inc.
    Inventors: Chun-Lin Han, Yin-Hsong Hsu, Shu-Jun Liao, Yung-Han Chang, Ming-Chun Yu
  • Publication number: 20220406846
    Abstract: A method of forming the semiconductor device is provided. The method includes following steps. A memory structure is formed over a first conductive line over a substrate and is electrically connected to the first conductive line. A sacrificial layer is formed on the memory structure. A spacer layer is formed to cover the memory structure and the sacrificial layer. A first dielectric layer is formed to cover the spacer layer. A planarization process is performed to remove a portion of the first dielectric layer. A second dielectric layer is formed on the spacer layer and the first dielectric layer. A patterning process is performed to form an opening exposing a portion of the top surface of the sacrificial layer. The sacrificial layer is removed to form a recess. A second conductive line is formed in the opening and the recess to be electrically coupled to the memory structure.
    Type: Application
    Filed: August 29, 2022
    Publication date: December 22, 2022
    Applicant: Winbond Electronics Corp.
    Inventors: Yung-Han Chiu, Shu-Ming Li, Po-Yen Hsu
  • Publication number: 20220358786
    Abstract: A computing device obtains an image of a user and detects a facial region of the user within the image. The computing device detects facial landmark points within the facial region and extracts facial features based on the detected facial landmark points. The computing device calculates traits of the user based on the extracted facial features and calculates one or more personality types of the user based on the traits of the user.
    Type: Application
    Filed: April 26, 2022
    Publication date: November 10, 2022
    Inventor: Yung-Han HUANG
  • Publication number: 20220336275
    Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Inventors: Ming-Da Cheng, Wen-Hsiung Lu, Chin Wei Kang, Yung-Han Chuang, Lung-Kai Mao, Yung-Sheng Lin
  • Patent number: 11476305
    Abstract: A semiconductor device and method of forming the same are provided. The semiconductor device includes a first conductive line over a substrate and a memory structure over the first conductive line. The memory structure is electrically coupled to the first conductive line through a conductive via. A spacer layer is laterally aside the memory structure and covers sidewalls of the memory structure. A first dielectric layer is on the spacer layer and laterally aside the memory structure. A second dielectric layer is on the memory structure, the spacer layer and the first dielectric layer. A second conductive line penetrates through the second dielectric layer, the first dielectric layer and the spacer layer to electrically couple to the memory structure. The second conductive line includes a body part at least partially embedded in the second dielectric layer and an extension part underlying the body part and laterally protruding from a sidewall of the body part.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: October 18, 2022
    Assignee: Winbond Electronics Corp.
    Inventors: Yung-Han Chiu, Shu-Ming Li, Po-Yen Hsu
  • Publication number: 20220246680
    Abstract: A semiconductor device and method of forming the same are provided. The semiconductor device includes a first conductive line over a substrate and a memory structure over the first conductive line. The memory structure is electrically coupled to the first conductive line through a conductive via. A spacer layer is laterally aside the memory structure and covers sidewalls of the memory structure. A first dielectric layer is on the spacer layer and laterally aside the memory structure. A second dielectric layer is on the memory structure, the spacer layer and the first dielectric layer. A second conductive line penetrates through the second dielectric layer, the first dielectric layer and the spacer layer to electrically couple to the memory structure. The second conductive line includes a body part at least partially embedded in the second dielectric layer and an extension part underlying the body part and laterally protruding from a sidewall of the body part.
    Type: Application
    Filed: February 3, 2021
    Publication date: August 4, 2022
    Applicant: Winbond Electronics Corp.
    Inventors: Yung-Han Chiu, Shu-Ming Li, Po-Yen Hsu
  • Publication number: 20220223548
    Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.
    Type: Application
    Filed: June 9, 2021
    Publication date: July 14, 2022
    Inventors: Ting-Li Yang, Po-Hao Tsai, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang
  • Patent number: 11387143
    Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: July 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Da Cheng, Wen-Hsiung Lu, Chin Wei Kang, Yung-Han Chuang, Lung-Kai Mao, Yung-Sheng Lin
  • Patent number: 11357919
    Abstract: A medicament delivery device for injections or inhalations comprises a supplementary device affixed to it. The supplemental device is provided with an optical system for monitoring a dosage of medicament. The optical system is able to receive reflected and refracted optical images of the dosage value as the optical signals from the medicament delivery device and thus keep a dosage window on the medicament delivery device free for direct monitoring by a user due to changing the transferring of the optical signal direction. The supplemental device is able to analyze, record and display the dosage and the other relevant data on a display and inform the user. The supplemental device is also able to transmit the medicament delivery data to an external device. A method for collecting the medicament delivery data including the medicament dosage information from a dosage setting mechanism and controlling the dosage, recording and displaying the dosage data by the supplemental device on its display is disclosed.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: June 14, 2022
    Assignee: SHL MEDICAL AG
    Inventors: Yung-Han Wang, Chih-Shuen Lin
  • Publication number: 20220165877
    Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 26, 2022
    Inventors: Yu-Chu LIN, Chi-Chung JEN, Wen-Chih CHIANG, Ming-Hong SU, Yung-Han CHEN, Mei-Chen SU, Chia-Ming PAN
  • Publication number: 20220161110
    Abstract: Provided is a method of manufacturing a racket grip 3D-tape, which entails coating a substrate with polyurethane of at least two different densities. Heavier polyurethane sinks, but lighter polyurethane rises, thereby resulting in unevenness of the surface of the racket grip 3D-tape.
    Type: Application
    Filed: January 4, 2021
    Publication date: May 26, 2022
    Inventor: Yung-Han WANG
  • Publication number: 20220102269
    Abstract: Methods for forming dummy under-bump metallurgy structures and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a second passivation layer over the first passivation layer; a first under-bump metallurgy (UBM) structure over the first redistribution line, the first UBM structure extending through the first passivation layer and the second passivation layer and being electrically coupled to the first redistribution line; and a second UBM structure over the second redistribution line, the second UBM structure extending through the second passivation layer, the second UBM structure being electrically isolated from the second redistribution line by the first passivation layer.
    Type: Application
    Filed: March 26, 2021
    Publication date: March 31, 2022
    Inventors: Ting-Li Yang, Po-Hao Tsai, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang
  • Patent number: 11257963
    Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: February 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chu Lin, Chi-Chung Jen, Wen-Chih Chiang, Ming-Hong Su, Yung-Han Chen, Mei-Chen Su, Chia-Ming Pan
  • Publication number: 20210375674
    Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.
    Type: Application
    Filed: October 30, 2020
    Publication date: December 2, 2021
    Inventors: Ming-Da Cheng, Wen-Hsiung Lu, Chin Wei Kang, Yung-Han Chuang, Lung-Kai Mao, Yung-Sheng Lin
  • Patent number: 11166017
    Abstract: A reinforcement learning method for frame-level bit allocation is disclosed. The reinforcement learning method includes steps of: (a) at a testing time, computing a state according to a plurality of features; (b) determining an action according to a policy; (c) determining a number of bits allocated to an i-th frame in a group of pictures (GOP) according to the action, a GOP-level bit budget and the state, wherein i is a positive integer; (d) encoding the i-th frame according to the number of bits allocated to the i-th frame in the GOP; and (e) repeating the steps (a)˜(d) until an end of the GOP.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: November 2, 2021
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Wen-Hsiao Peng, Yung-Han Ho, Guo-Lun Jin, Yun Liang
  • Publication number: 20210308384
    Abstract: The present application pertains to a system for monitoring administration of medicaments from a medicament delivery device, where the system has a case for said medicament delivery device, the case having a holder for holding a medicament delivery device; an image capturing device positioned in relation to said holder so as to capture at least one image of a medicament container in said medicament delivery device; said system also having an electronic circuit to which said image capturing device is connected, said electronic circuit comprising handling elements for handling said captured image.
    Type: Application
    Filed: September 26, 2019
    Publication date: October 7, 2021
    Inventors: Yung-Han Wang, Chih-Shuen Lin
  • Publication number: 20210202782
    Abstract: The present invention adopts an aluminum nitride substrate with great heat dissipation, great thermal conductivity, high electrical insulation, long service life, corrosion resistance, high temperature resistance, and stable physical characteristics. A high-quality zinc oxide film with a wide energy gap is fabricated on the aluminum nitride substrate by magnetron radio frequency (RF) sputtering. Compared with general vapor deposition, chemical vapor deposition and hydrothermal, the magnetron RF sputtering grows the high-quality zinc oxide film with few defects. The zinc oxide film with few defects concentration is an important key technology for short-wavelength optoelectronic devices, which decrease leakage currents of the optoelectronic devices, reduces flicker noise, and further improves its UV-visible rejection ratio.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 1, 2021
    Inventors: Yung-Han Huang, Chung-Yen Lu, Jian-Long Ruan
  • Patent number: 11049993
    Abstract: The present invention adopts an aluminum nitride substrate with great heat dissipation, great thermal conductivity, high electrical insulation, long service life, corrosion resistance, high temperature resistance, and stable physical characteristics. A high-quality zinc oxide film with a wide energy gap is fabricated on the aluminum nitride substrate by magnetron radio frequency (RF) sputtering. Compared with general vapor deposition, chemical vapor deposition and hydrothermal, the magnetron RF sputtering grows the high-quality zinc oxide film with few defects. The zinc oxide film with few defects concentration is an important key technology for short-wavelength optoelectronic devices, which decrease leakage currents of the optoelectronic devices, reduces flicker noise, and further improves its UV-visible rejection ratio.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: June 29, 2021
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Yung-Han Huang, Chung-Yen Lu, Jian-Long Ruan
  • Patent number: 11020446
    Abstract: A method for preparing a tea leaf extract is used for preparing the tea leaf extract with improved anti-oxidation activity. The method includes smoldering a rice husk sample at 200-400° C. in a low oxygen environment for 2-4 hours, followed by burning at 400-600° C. in an atmospheric environment for 2-4 hours to obtain a rice husk silica. An oxygen concentration in the low oxygen environment is below 5%. The rice husk silica is dissolved in an alkaline solution to obtain a rice husk silica solution. A tea leaf sample is then extracted by the rice husk silica solution.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: June 1, 2021
    Assignee: GREENEPIC BIOTECH CORPORATION
    Inventors: Yung-Han Hung, Pin-Wen Chen, Yu-Tsai Chen
  • Patent number: 11008105
    Abstract: A seat is disclosed. The seat comprises a moveable seat carriage having a seat pan and a seat back supported thereon. The seat also comprises a seat base supporting the moveable seat carriage thereupon and a support member moveable between a retracted configuration and an extended configuration, wherein a first end of the support member is coupled to the moveable seat carriage and a second end of the support member is coupled to the seat base. The seat also comprises an actuator to move the moveable seat carriage relative to the seat base to thereby transition the seat between an upright and a reclined position, with the movement of the seat carriage driving the support member between the retracted configuration and the extended configuration, wherein the support member stiffens the seat as the seat transitions away from the upright to the reclined position and while in the reclined position.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: May 18, 2021
    Assignee: SINGAPORE AIRLINES LIMITED
    Inventor: Yung Han Ng