Patents by Inventor Yung Ho Ryu

Yung Ho Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7442565
    Abstract: A method for manufacturing a vertical light emitting diode of the invention allows an easier process of individually separating chips. A light emitting structure is formed on a growth substrate having a plurality of device areas and at least one device isolation area. The light emitting structure has an n-type clad layer, an active layer and a p-type clad layer sequentially formed therein. Corresponding p-type electrodes are formed on the light emitting structure on the device areas. A glass substrate having through holes perforated therein is provided on the p-electrodes so that the through holes are disposed corresponding to the p-electrodes. Also, the through holes are plated with a metal material to form patterns of a plating layer on the p-electrodes. Then, the growth substrate is removed to form n-electrodes on the n-type clad layer. The glass substrate is removed via etching.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: October 28, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yung Ho Ryu, Hae Youn Hwang
  • Publication number: 20070215983
    Abstract: A nitride semiconductor single crystal substrate, a manufacturing method thereof and a method for manufacturing a vertical nitride semiconductor device using the same. According to an aspect of the invention, in the nitride semiconductor single crystal substrate, upper and lower regions are divided along a thickness direction, the nitride single crystal substrate having a thickness of at least 100 ?m. Here, the upper region has a doping concentration that is five times or greater than that of the lower region. Preferably, a top surface of the substrate in the upper region has Ga polarity. Also, according to a specific embodiment of the invention, the lower region is intentionally un-doped and the upper region is n-doped. Preferably, each of the upper and lower regions has a doping concentration substantially identical in a thickness direction.
    Type: Application
    Filed: March 16, 2007
    Publication date: September 20, 2007
    Inventors: Cheol Kyu Kim, Yung Ho Ryu, Soo Min Lee, Jong In Yang, Tae Hyung Kim
  • Patent number: 7078256
    Abstract: A nitride semiconductor LED improved in lighting efficiency and a fabrication method thereof, in which an n-doped semiconductor layer is formed on a substrate. An active layer is formed on the n-doped semiconductor layer to expose at least a partial area of the n-doped semiconductor layer. A p-doped semiconductor layer is formed on the active layer. A p+-doped semiconductor layer is formed on the p-doped semiconductor layer. An n+-doped semiconductor layer is formed in at least a partial upper region of the p+-doped semiconductor layer via n-dopant ion implantation. The n+-doped semiconductor layer cooperates with an underlying partial region of the p+-doped semiconductor layer to realize a reverse bias tunneling junction. Also, an upper n-doped semiconductor layer is formed on the n+-doped semiconductor layer to realize lateral current spreading. The invention can improve lighting efficiency by using the reverse bias tunneling junction and/or the lateral current spreading.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: July 18, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yung Ho Ryu, Kee Jeong Yang, Bang Won Oh, Jin Sub Park, Young Hoon Kim
  • Patent number: 6533892
    Abstract: A device for etching the backside of a wafer is disclosed. The etching device directly feeds an etchant to a target wafer without using any medium, such as a conventional absorption fabric, thus uniformly etching the backside of the wafer, and prevents the wafer from coming into contact with the etchant during the removal of the wafer from the device, thus almost completely protecting the wafer from any damage. This etching device consists of a cylindrical housing having a conical bottom wall and an annular etching dam seated in the housing while forming an etchant collecting chamber and an etching bat An etchant supply unit is provided on the conical bottom wall of the housing. At least one first etchant discharging part communicates the etching bath with the collecting chamber, while at least one second etchant discharging part communicates the etchant collecting chamber with the outside.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: March 18, 2003
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yung-Ho Ryu, Hyung-Hee Nam, Ho-Phil Jung
  • Publication number: 20020166633
    Abstract: A device for etching the backside of a wafer is disclosed. The etching device directly feeds an etchant to a target wafer without using any medium, such as a conventional absorption fabric, thus uniformly etching the backside of the wafer, and prevents the wafer from coming into contact with the etchant during the removal of the wafer from the device, thus almost completely protecting the wafer from any damage. This etching device consists of a cylindrical housing having a conical bottom wall, and an annular etching dam seated in the housing while forming an etchant collecting chamber and an etching bath. An etchant supply unit is provided on the conical bottom wall of the housing. At least one first etchant discharging part communicates the etching bath with the collecting chamber, while at least one second etchant discharging part communicates the etchant collecting chamber with the outside.
    Type: Application
    Filed: August 2, 2001
    Publication date: November 14, 2002
    Applicant: Samsung Electo-Mechanics Co., Ltd.
    Inventors: Yung-Ho Ryu, Hyung-Hee Nam, Ho-Phil Jung