Patents by Inventor Yung Lin

Yung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965259
    Abstract: An integrated hydrogen gas generator with hydrogen water module comprises a water tank, an electrolytic module, an integrated flow channel device, a humidifying module, and a hydrogen water module. The electrolytic module is configured to electrolyze the water in the water tank to generate a gas comprising hydrogen. The water tank, the humidifying module, and the hydrogen water module are respectively coupled to the integrated passageway module so that the water and the gas comprising hydrogen flow in a special sequence between them. The humidifying module is configured to humidify the gas comprising hydrogen. The hydrogen water module is configured for accommodating liquid and receiving the gas comprising hydrogen into the liquid to form a liquid comprising hydrogen. The configuration of pipeline is replaced by the integrated passageway module in the integrated hydrogen gas generator of the present invention.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: April 23, 2024
    Assignee: Shanghai Asclepius Meditec Co., Ltd.
    Inventor: Hsin-Yung Lin
  • Patent number: 11967532
    Abstract: A method of forming a semiconductor structure includes forming a semiconductor fin over a substrate, forming a dummy gate stack over the semiconductor fin, depositing a dielectric layer over the dummy gate stack, and selectively etching the dielectric layer, such that a top portion and a bottom portion of the dielectric layer form a step profile. The method further includes removing portions of the dielectric layer to form a gate spacer and subsequently forming a source/drain feature in the semiconductor fin adjacent to the gate spacer.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ta-Chun Lin, Kuo-Hua Pan, Chih-Yung Lin, Jhon Jhy Liaw
  • Publication number: 20240128876
    Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.
    Type: Application
    Filed: June 15, 2023
    Publication date: April 18, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Fu-Ciao Syu, Chia-Hsien Yang, Hsin-Yi Wu
  • Publication number: 20240126327
    Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chao Wei LIU, Wei-Hao CHANG, Yung-I YEH, Jen-Chieh KAO, Tun-Ching PI, Ming-Hung CHEN, Hui-Ping JIAN, Shang-Lin WU
  • Patent number: 11961884
    Abstract: The present disclosure describes a semiconductor device with a fill structure. The semiconductor structure includes first and second fin structures on a substrate, an isolation region on the substrate and between the first and second fin structures, a first gate structure disposed on the first fin structure and the isolation region, a second gate structure disposed on the second fin structure and the isolation region, and the fill structure on the isolation region and between the first and second gate structures. The fill structure includes a dielectric structure between the first and second gate structures and an air gap enclosed by the dielectric structure. The air gap is below top surfaces of the first and second fin structures.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiu-Yung Lin, Yen Chuang, Min-Hao Hong
  • Publication number: 20240120844
    Abstract: A resonant flyback power converter includes: a first and a second transistors which form a half-bridge circuit for switching a transformer and a resonant capacitor to generate an output voltage; a current-sense device for sensing a switching current of the half-bridge circuit to generate a current-sense signal; and a switching control circuit generating a first and a second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal controls the half-bridge circuit to generate a positive current to magnetize the transformer and charge the resonant capacitor. The turn-on of the second driving signal controls the half-bridge circuit to generate a negative current to discharge the resonant capacitor. The switching control circuit turns off the first transistor when the positive current exceeds a positive-over-current threshold, and/or, turns off the second transistor when the negative current exceeds a negative-over-current threshold.
    Type: Application
    Filed: April 10, 2023
    Publication date: April 11, 2024
    Inventors: Kun-Yu LIN, Ta-Yung YANG, Yu-Chang CHEN, Hsin-Yi WU, Fu-Ciao SYU, Chia-Hsien YANG
  • Publication number: 20240120900
    Abstract: A suspended resonator including a vibration structure, a first electrode, and a second electrode is provided. The vibration structure includes a vibration region, a frame portion, and a connecting portion. The vibration region includes a plate portion and a thickening portion. The plate portion has a first surface and a second surface opposite to each other. The thickening portion surrounds a central part of the plate portion, and an edge part of the plate portion is sandwiched in the thickening portion. A thickness of the thickening portion is greater than a thickness of the plate portion. The frame portion surrounds the vibration region and maintains a gap with the vibration region. The connecting portion connects the thickening portion with the frame portion. The first electrode is disposed on the first surface. The second electrode is disposed on the second surface.
    Type: Application
    Filed: February 2, 2023
    Publication date: April 11, 2024
    Applicant: TXC Corporation
    Inventors: Shih-Yung Pao, Tzu-Hsiu Peng, Zong-De Lin
  • Publication number: 20240120845
    Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. The second driving signal includes a resonant pulse having a resonant pulse width and a ZVS pulse during the DCM operation. The resonant pulse is configured to demagnetize the transformer. The resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load. The first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.
    Type: Application
    Filed: April 14, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
  • Publication number: 20240120846
    Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. During a DCM (discontinuous conduction mode) operation, the second driving signal includes a resonant pulse for demagnetizing the transformer and a ZVS (zero voltage switching) pulse for achieving ZVS of the first transistor. The resonant pulse is skipped when the output voltage is lower than a low-voltage threshold.
    Type: Application
    Filed: April 14, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
  • Publication number: 20240111936
    Abstract: The present invention discloses a routing method for a circuit board, which is suitable for planning a plurality of traces to connect a plurality of first contacts of a first trace layer and a plurality of second contacts of a second trace layer, and at least includes the following steps: providing a plurality of virtual paths between the first contacts and the second contacts, and providing a plurality of virtual grid points on the virtual paths; setting a plurality of first serial numbers of the first contacts and a plurality of second serial numbers of the second contacts; dividing the traces into a first group, a second group and a third group according to a plurality of contact serial number differences between the second serial numbers and the first serial numbers; and providing a via hole of each trace on the virtual grid point.
    Type: Application
    Filed: August 21, 2023
    Publication date: April 4, 2024
    Inventor: YUNG-LIN HSIEH
  • Publication number: 20240105521
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate having a base, a first fin, and a second fin over the base. The method includes forming a first trench in the base and between the first fin and the second fin. The method includes forming an isolation layer over the base and in the first trench. The first fin and the second fin are partially in the isolation layer. The method includes forming a first gate stack over the first fin and the isolation layer. The method includes forming a second gate stack over the second fin and the isolation layer. The method includes removing a bottom portion of the base. The isolation layer passes through the base after the bottom portion of the base is removed.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Da-Zhi ZHANG, Chung-Pin HUANG, Po-Nien CHEN, Hsiao-Han LIU, Jhon-Jhy LIAW, Chih-Yung LIN
  • Publication number: 20240106548
    Abstract: The present disclosure provides intelligent radio frequency interference mitigation in a computing platform. The computing platform includes a processor, a memory, a system clock and a wireless network interface. The system clock can be controlled so that the processor and/or the memory may operate at a slow frequency or a fast frequency. The wireless network may operate on a radio channel that experiences radio frequency interference at the fast frequency. The system clock may be intelligently controlled to select the slow frequency to reduce radio frequency interference to prioritize execution of a network application, or to select the fast frequency to increase processor speed and prioritize execution of a local application.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Ruei-Ting LIN, Cheng-Fang LIN, Huai-yung YEN, Ren-Hao CHEN, Lo-Chun TUNG
  • Publication number: 20240105849
    Abstract: A method for forming a semiconductor structure is provided. The method for forming the semiconductor structure includes forming a fin structure over a substrate in a first direction, forming a first gate stack, a second gate stack and a third gate stack across the fin structure, removing the first gate stack to form a trench, depositing a cutting structure in the trench, and forming a first contact plug between the cutting structure and the second gate stack and a second contact plug between the second gate stack and the third gate stack. The fin structure is cut into two segments by the trench. A first dimension of the first contact plug in the first direction is greater than a second dimension of the second contact plug in the first direction.
    Type: Application
    Filed: February 10, 2023
    Publication date: March 28, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Da-Zhi ZHANG, Chun-An LU, Chung-Yu CHIANG, Po-Nien CHEN, Hsiao-Han LIU, Jhon-Jhy LIAW, Chih-Yung LIN
  • Publication number: 20240105775
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first source/drain structure and a second source/drain structure over and in a substrate. The method includes forming a first gate stack, a second gate stack, a third gate stack, and a fourth gate stack over the substrate. Each of the first gate stack or the second gate stack is wider than each of the third gate stack or the fourth gate stack. The method includes forming a first contact structure and a second contact structure over the first source/drain structure and the second source/drain structure respectively. A first average width of the first contact structure is substantially equal to a second average width of the second contact structure.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Yu CHIANG, Hsiao-Han LIU, Yuan-Hung TSENG, Chih-Yung LIN
  • Patent number: 11942375
    Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a first semiconductor fin and a second semiconductor fin over a semiconductor substrate. The second semiconductor fin is wider than the first semiconductor fin. The method also includes forming a gate stack over the semiconductor substrate, and the gate stack extends across the first semiconductor fin and the second semiconductor fin. The method further includes forming a first source/drain structure on the first semiconductor fin, and the first source/drain structure is p-type doped. In addition, the method includes forming a second source/drain structure on the second semiconductor fin, and the second source/drain structure is n-type doped.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsing-Hui Hsu, Po-Nien Chen, Yi-Hsuan Chung, Bo-Shiuan Shie, Chih-Yung Lin
  • Publication number: 20240094527
    Abstract: A defog lens for vehicles includes a lens barrel, a lens, and a hydrophilic layer. The lens barrel has an opening toward an object side. The lens is disposed in the lens barrel and is located at the opening. The hydrophilic layer covers a surface of the lens and includes silicone compounds. Water droplets condensed on the lens could form a sheet film sticking to the surface of the lens and hard to form spherical water droplets, thereby improving the problem that the field of view of the conventional lens is blocked by spherical water droplets, effectively improving the clarity of the image captured by the defog lens, and therefore the defog lens could be applied to various environments.
    Type: Application
    Filed: February 1, 2023
    Publication date: March 21, 2024
    Applicant: Calin Technology Co., Ltd.
    Inventors: CHIH-YUNG HSIAO, MENG-CHIEN TSAI, CYUAN-CONG LI, HONG-YEN LIN
  • Publication number: 20240095930
    Abstract: A machine learning method includes: distinguishing foregrounds and backgrounds of a first image to generate a first mask image; cropping the first image to generate second and third images; cropping the first mask image to generate second and third mask images, wherein a position of the second mask image and a position of the third mask image correspond to a position of the second image and a position of the third image, respectively; generating a first feature vector group of the second image and a second feature vector group of the third image by a model; generating a first matrix according to the first and second feature vector groups; generating a second matrix according to the second and third mask images; generating a function according to the first and second matrices; and adjusting the model according to the function.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 21, 2024
    Inventors: Shen-Hsuan LIU, Van Nhiem TRAN, Kai-Lin YANG, Chi-En HUANG, Muhammad Saqlain ASLAM, Yung-Hui LI
  • Publication number: 20240096498
    Abstract: A method for evaluating a risk of a subject getting a specific disease includes steps of: storing a reference database that contains original parameter sets; selecting target alleles from an SNP profile derived from genome sequencing data of a subject; selecting target parameter sets from among the original parameter sets; calculating, for each of the target parameter sets, a race factor based on a global risk allele frequency and a group-specific risk allele frequency included in the target parameter set; calculating a genetic factor based on statistics, global reference allele frequencies, the race factors for the target parameter sets, and numbers of chromosomes in homologous chromosome pairs included in the target parameter sets; calculating a citation factor based on numbers of citation times included in the target parameter sets; and calculating a risk score based on the genetic factor and the citation factor.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 21, 2024
    Inventors: Yi-Ting CHEN, Sing-Han HUANG, Ching-Yung LIN, Xiang-Yu LIN, Cheng-Tang WANG, Raksha NANDANAHOSUR RAMESH, Pei-Hsin CHEN
  • Patent number: D1021800
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: April 9, 2024
    Inventor: Hsin-Yung Lin
  • Patent number: D1022903
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: April 16, 2024
    Inventor: Hsin-Yung Lin