Patents by Inventor Yung Lin
Yung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230347094Abstract: A mixed gas generating system with oxygen generator or breathing tube includes a hydrogen generator and an oxygen generator or a breathing tube. The hydrogen generator is configured to generate a hydrogen gas by electrolyzing water. The oxygen generator is configured to generate a first oxygen gas. The breathing tube is configured to receive a first oxygen gas from an oxygen supplying device. The hydrogen gas generated by the hydrogen generator is mixed with the first oxygen gas generated by the oxygen generator or provided by the breathing tube through a gas mixing tube or outputting the first oxygen gas to the hydrogen generator, so as to form a mixing gas for the user to inhale.Type: ApplicationFiled: July 19, 2021Publication date: November 2, 2023Inventor: Hsin-Yung LIN
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Patent number: 11798760Abstract: Aspects of the invention relate to a keyboard key structure, a light guide for the keyboard key structure, and a computer key mechanism. The keyboard key structure can include a substrate; a key switch where the bottom of the key switch is configured to be coupled to the substrate; a keycap including a transparent region; a light guide coupled to the side of the key switch, the light guide comprising: a bottom surface and a top surface that is wider than and parallel to the bottom surface; a light emitting element coupled to the substrate and configured under the bottom surface of the light guide such that the light emitting element, the light guide, and the transparent region of the key cap are in a collinear arrangement.Type: GrantFiled: September 29, 2022Date of Patent: October 24, 2023Assignee: Logitech Europe S.A.Inventors: Fu-Kai Hsu, Yung-Lin Chen, Feng-Hao Lin
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Publication number: 20230336177Abstract: A circuit includes an input circuit, a level shifter circuit, an output circuit, and a first and a second feedback circuit. The input circuit is coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second input signal. The level shifter circuit is coupled to a second voltage supply, and configured to generate at least a first and second signal responsive to at least the enable signal or the first input signal. The output circuit is coupled to at least the level shifter circuit and the second voltage supply, and configured to generate at least an output signal, a first and second feedback signal responsive to the first signal. The first and second feedback circuit are configured to receive the enable signal, and the inverted enable signal, and the corresponding first and second feedback signal.Type: ApplicationFiled: June 12, 2023Publication date: October 19, 2023Inventors: Yu-Lun OU, Ji-Yung LIN, Yung-Chen CHIEN, Ruei-Wun SUN, Wei-Hsiang MA, Jerry Chang Jui KAO, Shang-Chih HSIEH, Lee-Chung LU
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Patent number: 11791217Abstract: A structure includes a fin on a substrate; first and second gate stacks over the fin and including first and second gate dielectric layers and first and second gate electrodes respectively; and a dielectric gate over the fin and between the first and second gate stacks. The dielectric gate includes a dielectric material layer on a third gate dielectric layer. In a cross-sectional view cut along a direction parallel to a lengthwise direction of the fin and offset from the fin, the first gate dielectric layer forms a first U shape, the third gate dielectric layer forms a second U shape, a portion of the first gate electrode is disposed within the first U shape, a portion of the dielectric material layer is disposed within the second U shape, and a portion of an interlayer dielectric layer is disposed laterally between the first and the second U shapes.Type: GrantFiled: May 3, 2021Date of Patent: October 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ta-Chun Lin, Buo-Chin Hsu, Kuo-Hua Pan, Jhon Jhy Liaw, Chih-Yung Lin
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Publication number: 20230306178Abstract: A routing method of a printed circuit board and an electronic device are disclosed. The routing method includes: obtaining design information which includes a plurality of element pins of at least one circuit element and a plurality of electrical pins on the printed circuit board; arranging a plurality of bus paths according to the design information, wherein each of the bus paths is adapted for arranging a plurality of wirings to connect the element pins and corresponding electrical pins; calculating a plurality of bus spacings, wherein each of the bus spacings is between one of the bus paths and adjacent one of the bus paths; adjusting the bus paths according to the bus spacings and a preset distance; and arranging the wirings in each of the adjusted bus paths according to the design information.Type: ApplicationFiled: February 6, 2023Publication date: September 28, 2023Applicant: PEGATRON CORPORATIONInventors: Yung-Lin Hsieh, Chih-Hung Wang, Yi-Fang Kao
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Publication number: 20230284436Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.Type: ApplicationFiled: April 21, 2022Publication date: September 7, 2023Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Yukihiro Nagai, Lu-Yung Lin, Chia-Wei Wu, Tsun-Min Cheng, Yu Chun Lin, Zheng Guo Zhang, Sun-Hung Chen, Wu Xiang Li, Hsiao-Han Lin
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Publication number: 20230272544Abstract: A hydrogen generator with hydrogen leakage self-aware function comprises an electrolytic module, an integrated passageway device, a condensate filter, a humidification cup, a housing, an internal hydrogen sensing component, and a monitoring device. The electrolytic module is configured to electrolyze an electrolyzed water to generate a gas comprising hydrogen. The integrated passageway device comprises gas inlet passageway and a gas outlet passageway. The condensate filter is configured for filtering the gas comprising hydrogen. The humidification cup is configured for humidifying the gas comprising hydrogen. The gas comprising hydrogen flows through the condensate filter and the humidification cup by the way of the integrated passageway device. The internal hydrogen sensing component is configured in the housing for sensing the hydrogen concentration in the housing to generate an internal sensing result. The monitoring device is coupled to the internal hydrogen sensing component.Type: ApplicationFiled: June 9, 2021Publication date: August 31, 2023Inventor: Hsin-Yung LIN
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Patent number: 11728373Abstract: A first and a second gate structure each extend in a first direction. A first and a second conductive contact extend in the first direction and are separated from the first and second gate structures in a second direction. A first isolation structure extends in the second direction and separates the first gate structure from the second gate structure. A second isolation structure extends in the second direction and separates the first conductive contact from the second conductive contact. The first gate structure is electrically coupled to a first electrical node. The second gate structure is electrically coupled to a second electrical node different from the first electrical node. The first conductive contact is electrically coupled to the second electrical node. The second conductive contact is electrically coupled to the first electrical node.Type: GrantFiled: September 28, 2020Date of Patent: August 15, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jiefeng Lin, Hsiao-Lan Yang, Chih-Yung Lin
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Publication number: 20230230839Abstract: The present disclosure describes a system and a method for an ion implantation (IMP) process. The system includes an ion implanter configured to scan an ion beam over a target for a range of angles, a tilting mechanism configured to support and tilt the target, an ion-collecting device configured to collect a distribution and a number of ejected ions from the ion beam scan over the target, and a control unit configured to adjust a tilt angle based on a correction angle determined based on the distribution and number of ejected ions.Type: ApplicationFiled: March 27, 2023Publication date: July 20, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chun-Jung HUANG, Li-Hsin CHU, Po-Feng TSAI, Henry PENG, Kuang Huan HSU, Tsung Wei CHEN, Yung-Lin HSU
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Publication number: 20230212766Abstract: A hydrogen generator comprises an electrolytic module, a hydrogen water cup, an integrated passageway device and an automatic diversion device. The electrolytic module is configured to electrolyze water and generate gas comprising hydrogen. The hydrogen water cup is configured for containing liquid, and injecting the gas comprising hydrogen into the liquid to form hydrogen liquid. The integrated passageway device is stacked above the electrolytic module, and includes an inlet gas passageway, an outlet gas passageway and a gas communication passageway. The automatic diversion device is configured for selectively communicating the inlet gas passageway, the hydrogen water cup and the outlet gas passageway or selectively communicating the inlet gas passageway, the gas communication passageway and the outlet gas passageway.Type: ApplicationFiled: April 13, 2021Publication date: July 6, 2023Inventors: Hsin-Yung LIN, Jie ZHANG
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Patent number: 11695410Abstract: Herein disclosed is a voltage isolation circuit coupled to power supplies. The voltage isolation circuit comprises a series switch group controlled by a first control signal, a parallel switch group controlled by a second control signal, and a first high impedance element. The series switch group comprises a transistor arranged in a first current loop and having two channels connected to one of the power supplies respectively. The first high impedance element, coupled to the transistor in parallel, has a measurement terminal and two ends, connected to one of the power supplies respectively. When the series switch group is conducted, the power supplies are coupled in series in the first current loop. When the parallel switch group is conducted, the power supplies are coupled in parallel in a second current loop. Impedance values measured from the measurement terminal to each end of the first high impedance element are identical.Type: GrantFiled: September 19, 2021Date of Patent: July 4, 2023Assignee: Chroma ATE Inc.Inventors: Yung-Lin Chen, Szu-Chieh Su, Lien-Sheng Hung, Chun-Tai Cheng, Hsi-Ping Tsai, Szu-Hsin Yeh
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Publication number: 20230207320Abstract: Examples of an integrated circuit with a capacitor structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a substrate and a trench isolation material disposed on the substrate. An isolation structure is disposed on the trench isolation material. A first electrode disposed on the isolation structure, and a second electrode disposed on the isolation structure. A capacitor dielectric is disposed on the isolation structure between the first electrode and the second electrode. In some such examples, the isolation structure includes a first hard mask disposed on the trench isolation material, a dielectric disposed on the first hard mask, and a second hard mask disposed on the dielectric.Type: ApplicationFiled: February 20, 2023Publication date: June 29, 2023Inventors: Hsiao-Han Liu, Hoppy Lee, Chung-Yu Chiang, Po-Nien Chen, Chih-Yung Lin
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Patent number: 11689108Abstract: A controller includes a first sensing pin receiving a first sensing signal indicating a level of an input voltage of a resonant converter, a second sensing pin receiving a second sensing signal indicating a level of an input current of the resonant converter, a feedback pin receiving a feedback signal indicating a level of an output voltage of the resonant converter, and a first driving pin and a second driving pin controlling a high side switch and a low side switch of the resonant converter, respectively. The controller generates a compensated signal based on the first sensing signal, compares the compensated signal with a peak value of the second sensing signal to generate a first comparison result, compares the feedback signal with a threshold to generate a second comparison result, and controls the high side low side switches based on the first and the second comparison results.Type: GrantFiled: November 3, 2021Date of Patent: June 27, 2023Assignee: O2Micro Inc.Inventors: Ching-Chuan Kuo, Sin-Yan Wu, Sheng-Tai Lee, Yung-Lin Lin
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Patent number: 11677400Abstract: A circuit includes an input circuit, a level shifter circuit, an output circuit, and a first and a second feedback circuit. The input circuit is coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second input signal. The level shifter circuit is coupled to a second voltage supply, and configured to generate at least a first and second signal responsive to at least the enable signal or the first input signal. The output circuit is coupled to at least the level shifter circuit and the second voltage supply, and configured to generate at least an output signal, a first and second feedback signal responsive to the first signal. The first and second feedback circuit are configured to receive the enable signal, and the inverted enable signal, and the corresponding first and second feedback signal.Type: GrantFiled: June 8, 2022Date of Patent: June 13, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Lun Ou, Ji-Yung Lin, Yung-Chen Chien, Ruei-Wun Sun, Wei-Hsiang Ma, Jerry Chang Jui Kao, Shang-Chih Hsieh, Lee-Chung Lu
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Publication number: 20230178401Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.Type: ApplicationFiled: February 1, 2023Publication date: June 8, 2023Inventors: Chun-Jung HUANG, Yung-Lin HSU, Kuang Huan HSU, Jeff CHEN, Steven HUANG, Yueh-Lun YANG
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Publication number: 20230136279Abstract: A controller includes a first sensing pin receiving a first sensing signal indicating a level of an input voltage of a resonant converter, a second sensing pin receiving a second sensing signal indicating a level of an input current of the resonant converter, a feedback pin receiving a feedback signal indicating a level of an output voltage of the resonant converter, and a first driving pin and a second driving pin controlling a high side switch and a low side switch of the resonant converter, respectively. The controller generates a compensated signal based on the first sensing signal, compares the compensated signal with a peak value of the second sensing signal to generate a first comparison result, compares the feedback signal with a threshold to generate a second comparison result, and controls the high side low side switches based on the first and the second comparison results.Type: ApplicationFiled: November 3, 2021Publication date: May 4, 2023Inventors: Ching-Chuan KUO, Sin-Yan WU, Sheng-Tai LEE, Yung-Lin LIN
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Publication number: 20230128793Abstract: A switched-capacitor power stage includes a first sub-power stage. The first sub-power stage includes a first inductor, a first high switch, a first low switch, and a first set of switched-capacitor networks. The first inductor is coupled to an input terminal. The first high switch is coupled between the first inductor and an output terminal. The first low switch is coupled between the first inductor and a first transition node. The first set of switched-capacitor networks is coupled between the first transition node and the output terminal.Type: ApplicationFiled: October 25, 2021Publication date: April 27, 2023Inventors: Ke Horng CHEN, Kai-Syun CHANG, Chin Hsiang LIANG, Shu-Yung LIN
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Publication number: 20230113585Abstract: A method includes steps of: based on protein structure data, selecting a residue pair that includes a specific residue and a paired residue respectively of two wild-type protein chains of a protein complex; determining a mutant residue to substitute for the specific residue; for a target interface between the mutant residue and the paired residue, calculating an atomic distance and an atomic interaction force based on the protein structure data and amino acid structure data; and estimating binding free energy of the target interface by feeding the atomic distance, the atomic interaction force, and physicochemical information related to the specific residue and the mutant residue into a deep neural network.Type: ApplicationFiled: July 14, 2022Publication date: April 13, 2023Inventors: Yi-Ting CHEN, Sing-Han HUANG, Ching-Yung LIN, Xiang-Yu LIN, Cheng-Tang WANG
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Patent number: 11626315Abstract: A planarization method includes forming a dielectric layer over a polish stop layer. The dielectric layer is polished until reaching the polish stop layer, and the polished dielectric layer has a concave top surface. A compensation layer is formed over the concave top surface. The compensation layer is polished.Type: GrantFiled: February 22, 2017Date of Patent: April 11, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-Jung Huang, Hsu-Shui Liu, Han-Wen Liao, Yu-Yao Huang, Hsiao-Wei Chen, Yung-Lin Hsu, Kuang-Huan Hsu
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Publication number: 20230099381Abstract: A method includes: determining a mutation frequency for each residue in a wild-type spike protein of a specific virus; for each residue in the protein, counting a total number of contact residues related to said each residue and P antibodies based on P entries of protein structure data; for each residue in the protein, for a condition that said each residue mutates into one common amino acid residue, determining a normalized binding free energy value using a pre-established model based on the protein structure data, and determining a mutation effect score based on the mutation frequency, the total number of contact residues and the normalized binding free energy value; generating a mutation effect epitope map related to the mutation effect scores determined for all residues in the protein and all common amino acid residues; and determining, based on the map, a region in the protein as a target epitope.Type: ApplicationFiled: September 23, 2022Publication date: March 30, 2023Inventors: Yi-Ting CHEN, Sing-Han HUANG, Ching-Yung LIN, Xiang-Yu LIN, Cheng-Tang WANG