Abstract: A pipelined analog to digital converter that includes a first stage and a second stage. The first stage is configured to (i) receive a first phase component and a second phase component and (ii) generate a first integrated component and a second integrated component. The second stage is configured to sample and integrate the first integrated component and the second integrated component. The first stage is configured to: sample the first phase component to generate a first sampled component; sample the second phase component to generate a second sampled component; during a first portion of a first clock phase, (i) sample the first phase component and (ii) integrate the second sampled component to generate the second integrated component; and during a second portion of the first clock phase, (i) sample the second phase component and (ii) integrate the first sampled component to generate the first integrated component.

Abstract: A network device includes a first demodulation path to recover a header portion of a data packet. A second demodulation path recovers a payload portion of the data packet. The second demodulation path includes a down sampler to down sample a payload portion of the data packet. An equalizer equalizes an output of the down sampler. A correlator receives an output of the equalizer. A demodulation controller selects the output of the equalizer or an output of the correlator based on the header portion.

Abstract: A communications system and method for managing transmitting power of communications devices equipped with multiple antennas. A first communications device enables a first antenna configuration in accordance with a first pre-determined rule. A second communications device activates a second antenna configuration in accordance with a second predetermined rule. First and second messages are exchanged between the first and second communications devices. The first message includes the power management profile of the first communications device and the second message includes information pertinent to a power management profile of the second communications device, and signal integrity information determined by the second communications device from the received first message.

Abstract: Techniques for and apparatus capable of implementing packet detection and signal recognition in wireless communications systems are disclosed. In particular, the disclosed techniques and apparatus incorporate at least one of relative energy detection operable on assessment of a relative energy threshold for an inbound signal borne across an RF channel, carrier sense operable upon on assessment of at least one of a peak-to-sidelobe ratio and peak-to-peak distance defined by the inbound signal, and comparison operable upon demodulated data corresponding to the inbound signal as compared to predetermined preamble data. Clear channel assessment is performed based on determinations undertaken by one or more of the aforementioned relative energy detection, carrier sense and comparison operations.

Abstract: A system comprises a circuit that stores a first value and M parallel signal lines that communicate with the circuit, where M is an integer greater than three. A difference controller that receives the first value via the M parallel signal lines, that compares the first value to a first reference value, and that generates control signals based on a difference between the first value and the first reference value. An accumulator circuit that communicates with N signal lines, that stores a second reference value and that performs one of increment and decrement function to adjust the second reference value based on the control signals, where N is less than or equal to three.

Abstract: A device comprises a first circuit that generates a first phase component and a second phase component. A pipelined analog to digital converter comprises N stages, wherein N is an integer greater than one. At least one of the N stages includes a sample and integrate circuit that selectively samples the first phase component and integrates a sampled second phase component to generate an integrated second phase component during one portion of a first clock phase of the sample and integrate circuit, and that selectively integrates the sampled first phase component to generate an integrated first phase component and samples the second phase component to generate the sampled second phase component during another portion of the first clock phase of the sample and integrate circuit.

Abstract: A wireless network device includes a correlation module, an automatic gain control module, and a control module. The correlation module correlates a predetermined portion of a radio frequency (RF) signal and generates a correlation signal based thereon. The automatic gain control (AGC) module generates a gain control signal based on said RF signal. The control module selectively determines whether said RF signal is a radar signal based on said correlation signal and said gain control signal.

Abstract: A feedback equalizer includes a summing unit having an output and first input for receiving a modulated signal, which includes a symbol defined by a first number of chips. A subsymbol processor is coupled to the output of the summing unit. The symbol processor is capable of generating a subsymbol waveform upon receipt of a second number of chips of the symbol. The second number is less than the first number. A feedback filter is coupled to a second input of the summing unit and the symbol processing unit to selectively filter the subsymbol waveform from the modulated signal.

Abstract: A communications system is provided that includes a detector that has I/Q mismatch, a calibration circuit that estimating a phase and/or an amplitude mismatch of the detector, and a compensation circuit that uses the estimated phase and/or amplitude mismatch to mitigate the effects of the amplitude and/or phase mismatch. An IQ-modulated signal produced by the I/Q-modulator can be communicated over a loop back connection to the detector of the communication system. The calibration circuit can estimate the I/Q mismatch for the IQ-modulator and can provide the estimated values to a pre-compensation circuit. In one aspect, I/Q mismatch in the IQ-modulator of a communication system can be determined using a spectrum analyzer. Power measurements can be used to compute the amplitude mismatch and the phase mismatch of an IQ-modulator.

Abstract: A method comprises determining maximum and next-maximum correlation candidates for a symbol of a modulated signal, calculating a scalar relationship between the maximum and next-maximum correlation candidates, deriving signal quality associated with the modulated signal based on the scalar relationship, and altering a characteristic based on the derived signal quality.

Abstract: A wireless network device includes a correlation module, an automatic gain control module, and a control module. The correlation module correlates a predetermined portion of a radio frequency (RF) signal and generates a correlation signal based thereon. The automatic gain control (AGC) module generates a gain control signal based on said RF signal. The control module selectively determines whether said RF signal is a radar signal based on said correlation signal and said gain control signal.

Abstract: Systems and techniques relating to processing a signal received over a wireless channel. A technique includes adaptively determining a data rate of packetized information transmission based on both a signal quality measure of a received signal and a channel quality measure derived from the received signal, the channel quality measure being indicative of frequency selectivity in the wireless channel. An apparatus includes a channel estimator configured to be responsive to a received OFDM signal corresponding to multiple frequency tones of the channel, and configured to evaluate channel response characteristics of the frequency tones; and a channel state indicator configured to generate a channel quality measure usable along with a signal quality measure in adaptively determining a data rate of packetized information transmission, wherein the channel quality measure is generated from the channel response characteristics of the frequency tones and is indicative of frequency selectivity in the wireless channel.

Abstract: A decoder comprises an equalizer that receives a modulated signal comprising a plurality of symbols including a first symbol defined by a first number of chips. A subsymbol processor that generates a subsymbol waveform after receiving a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol. The second number is less than the first number, and wherein the equalizer equalizes the modulated signal using the subsymbol waveform.

Abstract: A correlator comprises a plurality of phase rotators, a plurality of combining modules, a plurality of computation modules, and a selection module. The plurality of phase rotators selectively modifies phase for each chip of a first subset of chips by one of M phase offsets, where an incoming symbol comprises the first subset and a second subset of chips, and where M is an integer greater than one. The plurality of combining modules each combine a chip of the first subset with a respective chip of the second subset to generate an output. The plurality of computation modules includes inputs that communicate with the outputs of the plurality of combining modules and produces a plurality of correlator output signals. The selection module chooses one of the plurality of correlator output signals based upon a metric.

Abstract: A receiver includes a demodulator that receives data packets each having a preamble and that generates spreading codewords by correlating a spreading code with the preambles of the data packets. A signal quality device determines signal quality values at a plurality of antennas for each of the data packets after correlation with corresponding ones of the spreading codes and selects one of the plurality of antennas based on the signal quality values. Each of the signal quality values includes a peak-to-average ratio value.

Abstract: A network device comprises a PSK modulator that PSK modulates a header portion of a data packet at a first effective throughput and that PSK modulates outbound data at a second effective throughput to form a PSK modulated payload. A symbol modulator symbol modulates the outbound data at a third effective throughput to form a symbol modulated payload. A modulation selection unit forms a payload portion of the data packet based on at least one of the PSK modulated payload and the symbol modulated payload.

Abstract: A communication system for communicating data packets includes a receiver subsystem. The receiver subsystem comprises a first antenna, and a second antenna. A direct sequence spread-spectrum demodulator communicates with the first and second antennas. The demodulator is configured to correlate a spreading code with a preamble of each data packet to produce a spreading codeword. The spreading code includes a predetermined number of chips. A signal quality measurement device is responsive to the direct sequence spread-spectrum demodulator. The device is configured to measure signal quality values corresponding to each of the first and second antennas for each data packet after correlation with the spreading code and to select one of said first and second antennas on the basis of the measured signal quality values.

Abstract: Techniques for and apparatus capable of implementing packet detection and signal recognition in wireless communications systems are disclosed. In particular, the disclosed techniques and apparatus incorporate at least one of relative energy detection operable on assessment of a relative energy threshold for an inbound signal borne across an RF channel, carrier sense operable upon on assessment of at least one of a peak-to-sidelobe ratio and peak-to-peak distance defined by the inbound signal, and comparison operable upon demodulated data corresponding to the inbound signal as compared to predetermined preamble data. Clear channel assessment is performed based on determinations undertaken by one or more of the aforementioned relative energy detection, carrier sense and comparison operations.

Abstract: A simplified architecture is disclosed for ADC conversion of received in-phase I and quadrature Q signals. Circuit area is substantially reduced by sharing a single ADC to convert both signals, switching the ADC input alternately between the i and q signals. In an embodiment, the ADC is clocked at an increased sample rate, and the digital output signals are aligned to compensate for the phase difference resulting from the implementation of a single ADC. Aligning includes delaying one of the digital signals, and interpolating the other one of the digital signals in a low pass filter so as to compensate for the phase difference introduced by the sampling during the first and second time intervals. The first and second time intervals are equal to a predetermined ADC sample period corresponding to a sample clock cycle. Delaying the first digital signal includes a delay of 1/2 clock cycle.

Abstract: A communication apparatus comprises accumulator logic managing reference data. First, second, and third inputs are communicatively coupled to the accumulator logic and capable of receiving first, second, and third signals respectively. The first and second signals express one of a true and a false state. The accumulator logic increments the reference data when the accumulator logic receives the third signal while the first signal expresses the true state. The accumulator logic decrements the reference data when the accumulator logic receives the third signal while the second signal expresses the true state.