Patents by Inventor Yunhui Chu
Yunhui Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088069Abstract: Disclosed herein are integrated circuit (IC) supports with microstrips, and related embodiments. For example, an IC support may include a plurality of microstrips and a plurality of conductive segments. Individual ones of the conductive segments may be at least partially over at least two microstrips, a dielectric material may be between the plurality of microstrips and the plurality of conductive segments, and the conductive segments are included in a tape.Type: ApplicationFiled: February 26, 2021Publication date: March 14, 2024Applicant: Intel CorporationInventors: Wenzhi Wang, Xiaoning Ye, Yunhui Chu, Chunfei Ye, James A. McCall
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Publication number: 20230214669Abstract: Decision feedback equalization (DFE) training time in a memory device is reduced through the use of a hybrid search to select values of tap coefficients for taps in the DFE. The hybrid search includes two searches. A first search is performed to identify initial values of tap coefficients, a second search uses the initial values of tap coefficients to find the final values of tap coefficients.Type: ApplicationFiled: March 13, 2023Publication date: July 6, 2023Inventors: Wenzhi WANG, Yunhui CHU, James A. McCALL, Chunfei YE, Tonia M. ROSE, Caroline GRIMES
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Publication number: 20210399764Abstract: An apparatus comprises a crosstalk cancelation circuit comprising a plurality of taps to output signals based on a signal transmitted via a first data line; and a summation circuit to combine a signal received by a second data line with the signals output by the plurality of taps to reduce near-end crosstalk present in the signal received by the second data line.Type: ApplicationFiled: September 1, 2021Publication date: December 23, 2021Applicant: Intel CorporationInventors: Jingbo Li, Beom-Taek Lee, Jong-Ru Guo, Yunhui Chu, Chunfei Ye, Kai Xiao
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Patent number: 11116072Abstract: An apparatus is described. The apparatus includes a semiconductor chip having cross-talk noise cancellation circuitry disposed between a disturber trace and a trace to be protected from cross-talk noise emanating from the disturber trace. The trace is to be coupled to a receiver disposed on a different semiconductor chip.Type: GrantFiled: November 17, 2017Date of Patent: September 7, 2021Assignee: Intel CorporationInventors: Jun Liao, Zhen Zhou, James A. McCall, Jong-Ru Guo, Xiang Li, Yunhui Chu, Zuoguo Wu
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Patent number: 10965047Abstract: Embodiments may relate to a connector. The connector may include a plurality of connector pins that are to communicatively couple an element of a printed circuit board (PCB) with an element of an electronic device when the element of the PCB and the element of the electronic device are coupled with the connector. The connector may also include an active circuit that is communicatively coupled with a pin of the plurality of pins. The active circuit may be configured to match an impedance of the element of the PCB with an impedance of the element of the electronic device. Other embodiments may be described or claimed.Type: GrantFiled: June 4, 2019Date of Patent: March 30, 2021Assignee: Intel CorporationInventors: Jong-Ru Guo, Yunhui Chu, Jun Liao, Kai Xiao, Jingbo Li, Yuanhong Zhao, Mo Liu, Beomtaek Lee, James A. McCall, Jaejin Lee, Xiaoning Ye, Zuoguo Wu, Xiang Li
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Publication number: 20200313722Abstract: An apparatus comprises a first data line coupled to a first driver; a second data line coupled to a second driver; and a crosstalk cancelation circuit comprising a third driver coupled between the first data line and the second data line, the crosstalk cancelation circuit to compensate for far end crosstalk introduced from the first data line to the second data line.Type: ApplicationFiled: June 16, 2020Publication date: October 1, 2020Applicant: Intel CorporationInventors: James Alexander McCall, Yunhui Chu, Christopher Philip Mozak, Derek M. Conrow, Christian Karl
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Patent number: 10729002Abstract: Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.Type: GrantFiled: July 18, 2019Date of Patent: July 28, 2020Assignee: Intel CorporationInventors: Jun Liao, Xiang Li, Yunhui Chu, Jong-Ru Guo, James McCall
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Publication number: 20190342990Abstract: Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.Type: ApplicationFiled: July 18, 2019Publication date: November 7, 2019Inventors: Jun Liao, Xiang Li, Yunhui Chu, Jong-Ru Guo, James McCall
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Patent number: 10467160Abstract: A method is described. The method includes receiving DDR memory channel signals from a motherboard through a larger DIMM motherboard connector. The method includes routing the signals to one of first and second smaller form factor connectors. The method includes sending the DDR memory channel signals to a DIMM that is connected to the one of the first and second smaller form factor connectors.Type: GrantFiled: September 29, 2017Date of Patent: November 5, 2019Assignee: Intel CorporationInventors: Xiang Li, Yunhui Chu, Jun Liao, George Vergis, James A. McCall, Charles C. Phares, Konika Ganguly, Qin Li
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Patent number: 10426381Abstract: Switchable grounded terminal loads are built into, or otherwise coupled to, connectors on motherboards and control devices. The terminal loads are coupled to the bus termination at the connector when the connector is “stuffed” (connected to a mating connector). The switchable grounded terminal loads replace dummy connectors in preventing empty “unstuffed” connectors from increasing error risks on active channels.Type: GrantFiled: May 26, 2017Date of Patent: October 1, 2019Assignee: INTEL CORPORATIONInventors: Yunhui Chu, Charles C. Phares, John M. Lynch
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Publication number: 20190288421Abstract: Embodiments may relate to a connector. The connector may include a plurality of connector pins that are to communicatively couple an element of a printed circuit board (PCB) with an element of an electronic device when the element of the PCB and the element of the electronic device are coupled with the connector. The connector may also include an active circuit that is communicatively coupled with a pin of the plurality of pins. The active circuit may be configured to match an impedance of the element of the PCB with an impedance of the element of the electronic device. Other embodiments may be described or claimed.Type: ApplicationFiled: June 4, 2019Publication date: September 19, 2019Applicant: Intel CorporationInventors: Jong-Ru Guo, Yunhui Chu, Jun Liao, Kai Xiao, Jingbo Li, Yuanhong Zhao, Mo Liu, Beomtaek Lee, James A. McCall, Jaejin Lee, Xiaoning Ye, Zuoguo Wu, Xiang Li
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Patent number: 10262599Abstract: In some examples, a display includes a plurality of display backlight groups, and one or more controller to determine one or more one-dimensional backlight group brightness level adjustments, to determine one or more two-dimensional backlight group brightness level adjustments, and to adjust a brightness of one or more of the backlight groups in response to content of a display image.Type: GrantFiled: March 24, 2017Date of Patent: April 16, 2019Assignee: Intel CorporationInventors: John Lang, Yunhui Chu, Yanli Zhang, Zhiming J. Zhuang
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Publication number: 20190102331Abstract: A method is described. The method includes receiving DDR memory channel signals from a motherboard through a larger DIMM motherboard connector. The method includes routing the signals to one of first and second smaller form factor connectors. The method includes sending the DDR memory channel signals to a DIMM that is connected to the one of the first and second smaller form factor connectors.Type: ApplicationFiled: September 29, 2017Publication date: April 4, 2019Inventors: Xiang LI, Yunhui CHU, Jun LIAO, George VERGIS, James A. McCALL, Charles C. PHARES, Konika GANGULY, Qin LI
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Publication number: 20190045622Abstract: An apparatus is described. The apparatus includes a semiconductor chip having cross-talk noise cancellation circuitry disposed between a disturber trace and a trace to be protected from cross-talk noise emanating from the disturber trace. The trace is to be coupled to a receiver disposed on a different semiconductor chip.Type: ApplicationFiled: November 17, 2017Publication date: February 7, 2019Inventors: Jun LIAO, Zhen ZHOU, James A. McCALL, Jong-Ru GUO, Xiang LI, Yunhui CHU, Zuoguo WU
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Publication number: 20190045632Abstract: Various aspects are related to a connector, e.g., for connecting two boards with one another. The connector may include a housing and a plurality of pins. The housing may include a first housing surface and a second housing surface opposite the first housing surface. Each pin of the plurality of pins may include a first portion protruding arcuately from the first housing surface and a second portion protruding arcuately from the second housing surface.Type: ApplicationFiled: August 1, 2018Publication date: February 7, 2019Inventors: Xiang Li, Jun Liao, Yunhui CHU, George Vergis, Chong Zhao
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Publication number: 20190044289Abstract: A shielded SODIMM system for reducing RF emissions of a SODIMM connector is disclosed herein. SODIMM connector RFI presently interferes with connectivity and is also an obstacle for higher speed memory applications. The shielded SODIMM system includes a SODIMM connector that is at least partially housed by a SODIMM connector shield, to partially and/or substantially reduce or block RF emissions from the SODIMM connector. The SODIMM connector shield is at least partially conductive and is coupled to landing pads on a surface of a motherboard printed circuit board (“PCB”). The landing pads of the motherboard PCB that are coupled to the SODIMM connector shield are coupled to ground, which grounds the SODIMM connector shield. Grounding the SODIMM connector shield that at least partially houses the SODIMM connector reduces RF emissions from the SODIMM connector during information transfer operations.Type: ApplicationFiled: February 20, 2018Publication date: February 7, 2019Applicant: Intel CorporationInventors: XIANG LI, JAEJIN LEE, JUN LIAO, HAO-HAN HSU, GEORGE VERGIS, YUN LING, DONG-HO HAN, YUNHUI CHU
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Publication number: 20180277046Abstract: In some examples, a display includes a plurality of display backlight groups, and one or more controller to determine one or more one-dimensional backlight group brightness level adjustments, to determine one or more two-dimensional backlight group brightness level adjustments, and to adjust a brightness of one or more of the backlight groups in response to content of a display image.Type: ApplicationFiled: March 24, 2017Publication date: September 27, 2018Inventors: John Lang, Yunhui Chu, Yanli Zhang, Zhiming J. Zhuang
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Patent number: 10084620Abstract: Aspects of the embodiments are directed to a data transmission receiver that includes a neural network circuit for resolving a received bit value. The data transmission receiver can be coupled to a data transmitter by a high speed data link. The neural network circuit can sample a bit value at multiple locations across the bit's unit interval. The neural network circuit can also sample bit values for neighboring bits to the interested bit at multiple sampling locations across unit intervals for the neighboring bits. The neural network circuit can determine the value of the interested bit from the samples of the waveform.Type: GrantFiled: March 1, 2017Date of Patent: September 25, 2018Assignee: Intel CorporationInventors: Yunhui Chu, Fan Chen, John Lang, Charles Phares
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Publication number: 20180254928Abstract: Aspects of the embodiments are directed to a data transmission receiver that includes a neural network circuit for resolving a received bit value. The data transmission receiver can be coupled to a data transmitter by a high speed data link. The neural network circuit can sample a bit value at multiple locations across the bit's unit interval. The neural network circuit can also sample bit values for neighboring bits to the interested bit at multiple sampling locations across unit intervals for the neighboring bits. The neural network circuit can determine the value of the interested bit from the samples of the waveform.Type: ApplicationFiled: March 1, 2017Publication date: September 6, 2018Applicant: Intel CorporationInventors: Yunhui Chu, Fan Chen, John Lang, Charles Phares
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Patent number: 9941643Abstract: Switchable grounded terminal loads are built into, or otherwise coupled to, connectors on motherboards and control devices. The terminal loads are coupled to the bus termination at the connector when the connector is “stuffed” (connected to a mating connector). The switchable grounded terminal loads replace dummy connectors in preventing empty “unstuffed” connectors from increasing error risks on active channels.Type: GrantFiled: December 26, 2015Date of Patent: April 10, 2018Assignee: Intel CorporationInventors: Yunhui Chu, Charles C. Phares, John M. Lynch