Abstract: An apparatus for polishing a butt weld includes a machine frame; a polishing mechanism, including a rotating arm, a supporting column rotatably mounted on the rotating arm, and a polishing roll rotatably mounted on the supporting column in a circumferential direction of the polishing roll; an angle limiting assembly, movably mounted on the rotating arm, the angle limiting assembly limiting an angle at which an outer side end of the supporting column swings upward; a roll driving part, mounted on the rotating arm. The roll driving part is in transmission connection with the polishing roll and drives the polishing roll to rotate on the supporting column in the circumferential direction of the polishing roll. An arm driving part is mounted on a fixed frame, the rotating arm being mounted on the arm driving part, and the arm driving part drives the rotating arm to rotate in a circumferential direction.

Abstract: The present disclosure belongs to the technical field of heat exchangers, and provides a heat exchanger based on a Gyroid/Diamond (GD-type) hybrid minimal surface-based disturbance structure. The heat exchanger includes a core, headers, and flanges. The core includes a cold fluid channel and a hot fluid channel, the cold fluid channel and the hot fluid channel are separated by a parting sheet. An inlet and an outlet of the cold fluid channel are separated from an inlet and an outlet of the hot fluid channel by sealing bars. A GD-type hybrid minimal surface-based disturbance structure is inserted into the hot fluid channel. A cold fluid and a hot fluid are distributed in a cross-flow manner.

Abstract: A display substrate includes a substrate and a light-emitting device layer which includes a first electrode layer, a light-emitting functional layer, and a second electrode layer that are sequentially stacked in a direction away from the substrate. The first electrode layer includes a reflective layer, an insulating layer, and a transparent conductive layer that are sequentially stacked in the direction away from the substrate. In a red sub-pixel region, a thickness of a first portion of the insulating layer is within a range of about 1000 ? to about 2500 ?. In a green sub-pixel region, a thickness of a second portion of the insulating layer is within a range of about 500 ? to about 2000 ?. In a blue sub-pixel region, a thickness of a third portion of the insulating layer is within a range of about 1500 ? to about 3000 ?.

Abstract: The present disclosure belongs to the technical field of heat exchangers, and provides a heat exchanger based on a Gyroid/Diamond (GD-type) hybrid minimal surface-based disturbance structure. The heat exchanger includes a core, headers, and flanges. The core includes a cold fluid channel and a hot fluid channel, the cold fluid channel and the hot fluid channel are separated by a parting sheet. An inlet and an outlet of the cold fluid channel are separated from an inlet and an outlet of the hot fluid channel by sealing bars. A GD-type hybrid minimal surface-based disturbance structure is inserted into the hot fluid channel. A cold fluid and a hot fluid are distributed in a cross-flow manner.

Abstract: A display substrate and a manufacturing method and a display device are provided. The display substrate includes: a first electrode pattern, a connecting electrode pattern, a second electrode, a light-emitting functional layer and a first dummy electrode pattern. The first electrode pattern is includes a plurality of first electrodes spaced apart from each other. The second electrode is connected with the connecting electrode pattern, the second electrode and the first electrode pattern are spaced apart from each other. The first dummy electrode pattern includes a plurality of first dummy electrodes; the connecting electrode pattern surrounds the first electrode pattern, the first dummy electrode pattern is located between the connecting electrode pattern and the first electrode pattern, and at least two of the plurality of first dummy electrodes are each of a block shape and are spaced apart from each other.

Abstract: A method of sampling a target tissue in an animal body, comprising the steps of inserting a endoscope-needle system into the animal body, guiding the endoscope-needle system along a path toward the target tissue using a Doppler-based optical coherence tomography (OCT) system coupled with machine-learning-based computer-aided diagnosis (ML-CAD), wherein the Doppler-based OCT system coupled with ML-CAD enables the identification of blood vessels along the path in advance of the needle tip of the endoscope-needle system thereby substantially avoiding damage to the blood vessels along the path as the needle tip of the endoscope-needle system is guided into the target tissue, after the needle tip is guided into the target tissue, and removing a tissue sample from the target tissue.

Abstract: A method for reducing inline directivity of an air-gun source signature by optimizing spatial distribution of air-guns is provided according to the present application, which relates to a field of design and optimization of an air-gun source. An evaluation standard in the air-gun distribution in an air-gun array direction is proposed. By a combination optimization along both the inline and depth directions, a design scheme having evidently broader effective bandwidth and effective take-off angle width than a design scheme of a conventional source is obtained, with which the directivity of the air-gun source signature can be reduced.

Abstract: A method of fabricating a semiconductor device includes etching a first trench and a second trench in an epitaxial layer over a semiconductor and forming a dielectric liner within the trenches. A photoresist layer is formed within the trenches and over the epitaxial layer and given a post-exposure bake at a first temperature. The photoresist layer is then given an adhesion-promoting bake at a greater second temperature; The photoresist layer is then removed from a top portion the trenches, thereby exposing a top portion of the dielectric liner and leaving a remaining portion of the photoresist in a bottom portion of the trenches. The exposed dielectric liner is etched, thereby leaving a remaining portion of the dielectric liner in the top portion of the trenches. The remaining portion of the photoresist is removed and the trenches are filled with a polysilicon layer.

Abstract: In a described example, a method of forming a capacitor includes forming a doped polysilicon layer over a semiconductor substrate. The method also includes forming a dielectric layer on the doped polysilicon layer. The method also includes forming an undoped polysilicon layer on the dielectric layer.

Abstract: A method of forming a microelectronic device includes forming positive tone photoresist on the microelectronic device, filling a trench, extending over a top surface adjacent to the trench, and covering a thickness monitor on a substrate containing the microelectronic device. The photoresist in and over the trench is exposed at a trench energy dose, and the photoresist in the monitor area is exposed at a monitor energy dose that is less than the trench energy dose. The photoresist is developed, leaving photoresist in the trench having an in-trench thickness less than the depth of the trench and leaving an in-monitor thickness of the photoresist on the monitor area less than an unexposed thickness. The in-monitor thickness of the photoresist on the monitor area may be measured and the measured thickness value may be used with a calibration chart to estimate the in-trench thickness of the photoresist.

Abstract: In a described example, a method of forming a capacitor includes forming a doped polysilicon layer over a semiconductor substrate. The method also includes forming a dielectric layer on the doped polysilicon layer. The method also includes forming an undoped polysilicon layer on the dielectric layer.

Abstract: The present invention discloses an in-place non-contact detection method for a shaft workpiece. The method includes: establishing a detection system, calibrating the detection system and establishing a detection coordinate system; analyzing a pose of a workpiece in the detection system to establish a coordinate system of a workpiece clamping device; controlling the workpiece clamping device of a shaft workpiece processing machine tool to rotate, continuously acquiring data by a linear laser measuring instrument, and calculating and analyzing the acquired data to obtain an ideal reference axis of the shaft workpiece; continuously acquiring data of a detection part, and calculating and analyzing the acquired data to obtain actual machining precision of runout of a shaft neck of a camshaft; and continuously acquiring data of the detection part, and calculating and analyzing the acquired data to obtain machining precision of coaxiality of the shaft workpiece.

Abstract: A method of fabricating an integrated circuit includes etching trenches in a first surface of a semiconductor layer. A trench dielectric layer is formed over the first surface and over bottoms and sidewalls of the trenches and a doped polysilicon layer is formed over the trench dielectric layer and within the trenches. The doped polysilicon layer is patterned to form a polysilicon bridge that connects to the polysilicon within the filled trenches and a blanket implant of a first dopant is directed to the polysilicon bridge and to the first surface. The blanket implant forms a contact region extending from the first surface into the semiconductor layer.

Abstract: An integrated circuit includes first and second trenches in a semiconductor substrate and a semiconductor mesa between the first and second trenches. A source region having a first conductivity type and a body region having an opposite second conductivity type are located within the semiconductor mesa. A trench shield is located within the first trench, and a gate electrode is over the trench shield between first and second sidewalls of the first trench. A gate dielectric is on a sidewall of the first trench between the gate electrode and the body region, and a pre-metal dielectric (PMD) layer is over the gate electrode. A gate contact through the PMD layer touches the gate electrode between the first and second sidewalls, and a trench shield contact through the PMD layer touches the trench shield between the first and second sidewalls.

Abstract: A method of fabricating an integrated circuit includes etching trenches in a first surface of a semiconductor layer. A trench dielectric layer is formed over the first surface and over bottoms and sidewalls of the trenches and a doped polysilicon layer is formed over the trench dielectric layer and within the trenches. The doped polysilicon layer is patterned to form a polysilicon bridge that connects to the polysilicon within the filled trenches and a blanket implant of a first dopant is directed to the polysilicon bridge and to the first surface. The blanket implant forms a contact region extending from the first surface into the semiconductor layer.

Abstract: A method for constructing a steel sheet pile cofferdam is provided, including: step S1, determining a construction area of the steel sheet pile cofferdam; step S2, piling steel casings, and welding guide frame brackets to the steel casings, the guide frame brackets are connected with a guide frame and limiting clamp plates; step S3, piling steel sheet piles by relying on the guide frame; step S4, pouring subsealing concrete at a bottom of the steel sheet pile cofferdam; step S5, arranging purlins and internal supports within the steel sheet pile cofferdam; step S6, perform a secondary subsealing at the bottom of the steel sheet pile cofferdam; step S7, pumping water within the steel sheet pile cofferdam through a pump and pouring to form a bearing platform on the subsealing concrete; step S8, removing the steel sheet pile cofferdam after the bearing platform is formed.

Abstract: A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.

Abstract: A hydrolysis method for tert-butyl ester in gadolinium-based contrast agent comprises hydrolyzing the tert-butyl ester with a catalyst. The preparation method of the catalyst comprises the following steps: subjecting zirconia and titanium tetrachloride to reaction in the presence of sulfuric acid and water at 60° C. to 90° C. until solids are dissolved, adding silica to perform reaction for 1 to 5 h, filtering to obtain solids, washing and calcining the solids. This hydrolysis method does not introduce other substances that are difficult to remove, such as acids, and provides high hydrolysis efficiency and high purity of the obtained product.

Abstract: A method for constructing a steel sheet pile cofferdam is provided, including: step S1, determining a construction area of the steel sheet pile cofferdam; step S2, piling steel casings, and welding guide frame brackets to the steel casings, the guide frame brackets are connected with a guide frame and limiting clamp plates; step S3, piling steel sheet piles by relying on the guide frame; step S4, pouring subsealing concrete at a bottom of the steel sheet pile cofferdam; step S5, arranging purlins and internal supports within the steel sheet pile cofferdam; step S6, perform a secondary subsealing at the bottom of the steel sheet pile cofferdam; step S7, pumping water within the steel sheet pile cofferdam through a pump and pouring to form a bearing platform on the subsealing concrete; step S8, removing the steel sheet pile cofferdam after the bearing platform is formed.

Abstract: In a described example, a method of forming a capacitor includes forming a doped polysilicon layer over a semiconductor substrate. The method also includes forming a dielectric layer on the doped polysilicon layer. The method also includes forming an undoped polysilicon layer on the dielectric layer.