Patents by Inventor Yuriy Pavlenko
Yuriy Pavlenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200026597Abstract: The subject technology provides for managing a data storage system. A data operation error for a data operation initiated in a first non-volatile memory die of a plurality of non-volatile memory die in the data storage system is detected. An error count for an error type of the data operation error for the first non-volatile memory die is incremented. The incremented error count satisfies a first threshold value for the error type of the data operation error is determined. The first non-volatile memory die is marked for exclusion from subsequent data operations.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: Sanghoon CHU, Scott JINN, Yuriy PAVLENKO, Kum-Jung SONG
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Publication number: 20200027520Abstract: The subject technology provides implementations, which may be included as part of firmware of the flash memory device, that will not solely rely on a flash controller interpreted status but includes additional checks to the returned flash status byte. Each flash read, write, and erase command requires a status read command to determine the state of operation. Depending on the particular command issued, each bit of the returned status has a different meaning. The flash memory device firmware can check whether an illogical or inconsistent status is present. For example, if an overall pass/fail bit indicates a “pass” but a plane pass/fail bit indicates a “fail” then there could be an erroneous detection. Also, for every operation, the firmware can read status twice when the flash memory is ready. If the second status byte fails to match the first status byte then a die may be flagged as failing.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: Sanghoon CHU, Scott JINN, Yuriy PAVLENKO
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Publication number: 20190347174Abstract: A device that provides power fail handling using command suspension includes non-volatile memory circuits and a controller that is configured to determine that a power fail event has occurred. The controller is configured to determine, in response to the determination that the power fail event has occurred, which of the non-volatile memory circuits are executing a first type of memory commands. The controller is also configured to issue a stop command to the determined non-volatile memory circuits to stop execution of the first type of memory commands.Type: ApplicationFiled: July 26, 2019Publication date: November 14, 2019Inventors: YungLi JI, Yuriy PAVLENKO, Kum-Jung SONG
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Patent number: 10453548Abstract: The subject technology provides implementations, which may be included as part of firmware of the flash memory device, that will not solely rely on a flash controller interpreted status but includes additional checks to the returned flash status byte. Each flash read, write, and erase command requires a status read command to determine the state of operation. Depending on the particular command issued, each bit of the returned status has a different meaning. The flash memory device firmware can check whether an illogical or inconsistent status is present. For example, if an overall pass/fail bit indicates a “pass” but a plane pass/fail bit indicates a “fail” then there could be an erroneous detection. Also, for every operation, the firmware can read status twice when the flash memory is ready. If the second status byte fails to match the first status byte then a die may be flagged as failing.Type: GrantFiled: May 19, 2017Date of Patent: October 22, 2019Assignee: Western Digital Technologies, Inc.Inventors: Sanghoon Chu, Scott Jinn, Yuriy Pavlenko
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Patent number: 10452468Abstract: The subject technology provides for managing a data storage system. A data operation error for a data operation initiated in a first non-volatile memory die of a plurality of non-volatile memory die in the data storage system is detected. An error count for an error type of the data operation error for the first non-volatile memory die is incremented. The incremented error count satisfies a first threshold value for the error type of the data operation error is determined. The first non-volatile memory die is marked for exclusion from subsequent data operations.Type: GrantFiled: December 30, 2016Date of Patent: October 22, 2019Assignee: Western Digital Technologies, Inc.Inventors: Sanghoon Chu, Scott Jinn, Yuriy Pavlenko, Kum-Jung Song
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Publication number: 20190317678Abstract: Command scheduling for die sets of non-volatile memory may be performed based on command states of the die sets. Upon receiving an erase command to erase data stored in a first block set of non-volatile memory, a command state of the first die set of the non-volatile memory is determined, where the first die set contains the first block set. If the first die set is determined to be in a pending command state, the erase command is queued in a wait queue. If the first die set is determined to be in an idle command state, the erase command is scheduled to erase the data stored in the first block set.Type: ApplicationFiled: June 27, 2019Publication date: October 17, 2019Inventors: YungLi JI, Yun-Tzuo LAI, Haining LIU, Yuriy PAVLENKO
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Patent number: 10379765Abstract: Command scheduling for die sets of non-volatile memory may be performed based on command states of the die sets. Upon receiving an erase command to erase data stored in a first block set of non-volatile memory, a command state of the first die set of the non-volatile memory is determined, where the first die set contains the first block set. If the first die set is determined to be in a pending command state, the erase command is queued in a wait queue. If the first die set is determined to be in an idle command state, the erase command is scheduled to erase the data stored in the first block set.Type: GrantFiled: August 15, 2017Date of Patent: August 13, 2019Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: YungLi Ji, Yun-Tzuo Lai, Haining Liu, Yuriy Pavlenko
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Patent number: 10379979Abstract: A device that provides power fail handling using command suspension includes non-volatile memory circuits and a controller that is configured to determine that a power fail event has occurred. The controller is configured to determine, in response to the determination that the power fail event has occurred, which of the non-volatile memory circuits are executing a first type of memory commands. The controller is also configured to issue a stop command to the determined non-volatile memory circuits to stop execution of the first type of memory commands.Type: GrantFiled: May 31, 2017Date of Patent: August 13, 2019Assignee: Western Digital Technologies, Inc.Inventors: YungLi Ji, Yuriy Pavlenko, Kum-Jung Song
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Publication number: 20190227720Abstract: A storage device may include a controller and a memory array including a plurality of dies arranged into a plurality of channels. In some examples, the controller may be configured to define, from the memory array, a plurality of die-sets based on respective chip enable lines associated with the plurality of dies, wherein each die-set of the plurality of die-sets includes at least one die from each of the plurality of channels; define, from a selected die-set of the plurality of die-sets, a plurality of blocksets, wherein each blockset includes a block from each die of the selected die-set; receive a unit of data to be stored; and issue commands that cause the unit of data to be stored in blocks of a selected blockset of the plurality of blocksets.Type: ApplicationFiled: March 29, 2019Publication date: July 25, 2019Inventors: Haining LIU, Yuriy PAVLENKO, George G. Artnak, JR.
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Patent number: 10289314Abstract: A storage device may include a controller and a memory array including a plurality of dies arranged into a plurality of channels. In some examples, the controller may be configured to define, from the memory array, a plurality of die-sets based on respective chip enable lines associated with the plurality of dies, wherein each die-set of the plurality of die-sets includes at least one die from each of the plurality of channels; define, from a selected die-set of the plurality of die-sets, a plurality of blocksets, wherein each blockset includes a block from each die of the selected die-set; receive a unit of data to be stored; and issue commands that cause the unit of data to be stored in blocks of a selected blockset of the plurality of blocksets.Type: GrantFiled: February 28, 2017Date of Patent: May 14, 2019Assignee: Western Digital Technologies, Inc.Inventors: Haining Liu, Yuriy Pavlenko, George G. Artnak, Jr.
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Publication number: 20180373450Abstract: Command scheduling for die sets of non-volatile memory may be performed based on command states of the die sets. Upon receiving an erase command to erase data stored in a first block set of non-volatile memory, a command state of the first die set of the non-volatile memory is determined, where the first die set contains the first block set. If the first die set is determined to be in a pending command state, the erase command is queued in a wait queue. If the first die set is determined to be in an idle command state, the erase command is scheduled to erase the data stored in the first block set.Type: ApplicationFiled: August 15, 2017Publication date: December 27, 2018Inventors: YUNGLI JI, YUN-TZUO LAI, HAINING LIU, YURIY PAVLENKO
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Publication number: 20180349240Abstract: A device that provides power fail handling using command suspension includes non-volatile memory circuits and a controller that is configured to determine that a power fail event has occurred. The controller is configured to determine, in response to the determination that the power fail event has occurred, which of the non-volatile memory circuits are executing a first type of memory commands. The controller is also configured to issue a stop command to the determined non-volatile memory circuits to stop execution of the first type of memory commands.Type: ApplicationFiled: May 31, 2017Publication date: December 6, 2018Inventors: YungLi JI, Yuriy PAVLENKO, Kum-Jung SONG
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Publication number: 20180336150Abstract: The subject technology provides for managing a data storage system. Commands are identified into as a first command type or a second command type. The commands identified as the first command type are assigned to a first queue, and the commands identified as the second command type are assigned to a second queue. After the commands from the first queue and the commands from the second queue are processed based on a scheduling ratio over a predetermined period of time, a write amplification factor, number of host read commands, and number of host write commands during the predetermined period of time are determined. The scheduling ratio is updated based on the write amplification, the number of host read commands, the number of host write commands, and a predetermined scheduling ratio factor. Subsequent commands are processed from the first queue and the second queue based on the updated scheduling ratio.Type: ApplicationFiled: May 19, 2017Publication date: November 22, 2018Inventors: Scott JINN, Yun-Tzuo LAI, Haining LIU, Yuriy PAVLENKO
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Publication number: 20180336960Abstract: The subject technology provides implementations, which may be included as part of firmware of the flash memory device, that will not solely rely on a flash controller interpreted status but includes additional checks to the returned flash status byte. Each flash read, write, and erase command requires a status read command to determine the state of operation. Depending on the particular command issued, each bit of the returned status has a different meaning. The flash memory device firmware can check whether an illogical or inconsistent status is present. For example, if an overall pass/fail bit indicates a “pass” but a plane pass/fail bit indicates a “fail” then there could be an erroneous detection. Also, for every operation, the firmware can read status twice when the flash memory is ready. If the second status byte fails to match the first status byte then a die may be flagged as failing.Type: ApplicationFiled: May 19, 2017Publication date: November 22, 2018Inventors: Sanghoon CHU, Scott Jinn, Yuriy Pavlenko
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Publication number: 20180188954Abstract: The subject technology provides for managing a data storage system. A data operation error for a data operation initiated in a first non-volatile memory die of a plurality of non-volatile memory die in the data storage system is detected. An error count for an error type of the data operation error for the first non-volatile memory die is incremented. The incremented error count satisfies a first threshold value for the error type of the data operation error is determined. The first non-volatile memory die is marked for exclusion from subsequent data operations.Type: ApplicationFiled: December 30, 2016Publication date: July 5, 2018Inventors: Sanghoon Chu, Scott Jinn, Yuriy Pavlenko, Kum-Jung Song
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Patent number: 9971515Abstract: In general, a storage device may perform an incremental background media scan. The storage device includes a data storage portion comprising a plurality of blocks. The storage device also includes a controller configured to perform the scan to determine whether to perform maintenance on the page. As such, the controller may scan a first page of a first block of a set of blocks. Each block has multiple pages. The controller may, for each respective remaining block of the set, scan a respective first page of the respective remaining block, the first page having a same first index as the respective first page. The controller may further scan a second page of the first block. The controller may then, for each respective remaining block of the set, scan a respective second page of the respective remaining block, the second page having a same second index as the respective second page.Type: GrantFiled: September 13, 2016Date of Patent: May 15, 2018Assignee: Western Digital Technologies, Inc.Inventors: Hung-Min Chang, Haining Liu, Yuriy Pavlenko, Hung-Cheng Yeh
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Publication number: 20180074701Abstract: In general, a storage device may perform an incremental background media scan. The storage device includes a data storage portion comprising a plurality of blocks. The storage device also includes a controller configured to perform the scan to determine whether to perform maintenance on the page. As such, the controller may scan a first page of a first block of a set of blocks. Each block has multiple pages. The controller may, for each respective remaining block of the set, scan a respective first page of the respective remaining block, the first page having a same first index as the respective first page. The controller may further scan a second page of the first block. The controller may then, for each respective remaining block of the set, scan a respective second page of the respective remaining block, the second page having a same second index as the respective second page.Type: ApplicationFiled: September 13, 2016Publication date: March 15, 2018Inventors: Hung-Min Chang, Haining Liu, Yuriy Pavlenko, Hung-Cheng Yeh
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Publication number: 20170336990Abstract: A storage device may include a controller and a memory array including a plurality of dies arranged into a plurality of channels.Type: ApplicationFiled: February 28, 2017Publication date: November 23, 2017Inventors: Haining LIU, Yuriy PAVLENKO, George G. ARTNAK, JR.
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Patent number: 9582201Abstract: A storage device may include a controller and a memory array including a plurality of dies arranged into a plurality of channels. In some examples, the controller may be configured to define, from the memory array, a plurality of die-sets based on respective chip enable lines associated with the plurality of dies, wherein each die-set of the plurality of die-sets includes at least one die from each of the plurality of channels; define, from a selected die-set of the plurality of die-sets, a plurality of blocksets, wherein each blockset includes a block from each die of the selected die-set; receive a unit of data to be stored; and issue commands that cause the unit of data to be stored in blocks of a selected blockset of the plurality of blocksets.Type: GrantFiled: September 26, 2014Date of Patent: February 28, 2017Assignee: Western Digital Technologies, Inc.Inventors: Haining Liu, Yuriy Pavlenko, George G. Artnak, Jr.
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Patent number: 9582192Abstract: A storage device may include a plurality of memory devices, and a controller. The controller may be configured to perform garbage collection to reclaim one or more blocks included in a particular memory device of the plurality of memory devices by at least: removing the particular memory device from the set of write-eligible memory devices; reading data from the one or more blocks included in the particular memory device; and returning the particular memory device to the set of write-eligible memory devices.Type: GrantFiled: February 6, 2015Date of Patent: February 28, 2017Assignee: Western Digital Technologies, Inc.Inventors: Siddharth Choudhuri, Haining Liu, Yuriy Pavlenko