Patents by Inventor Yusuke ARAYASHIKI

Yusuke ARAYASHIKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9379163
    Abstract: A resistance variable memory includes a plurality of first wires, a plurality of second wires, a controller, a memory cell array, a second current rectifying element and a second variable resistance element, an access controller, a first contact plug, and a second contact plug. The access controller switches the second variable resistance element to a low resistance state or a high resistance state in accordance with a voltage applied to the memory cell connected in series. The first contact plug is connected to the even-numbered first wire in the second direction from the substrate via the corresponding access controller. The second contact plug is connected to the odd-numbered first wire in the second direction from the substrate via the corresponding access controller.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: June 28, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yusuke Arayashiki
  • Publication number: 20160079177
    Abstract: According to one embodiment, a method is disclosed for manufacturing a microscopic structure. The method can include forming a stacked body including a plurality of films on a substrate, an upper surface of a mark region of the substrate for alignment being formed at a position lower than an upper surface of a portion of the substrate where a structural pattern is to be formed, aligning the substrate and a template using a configuration of an upper surface of the stacked body formed in the mark region, coating a material in a liquid form or a semi-liquid form onto the stacked body, pressing the template onto the material; forming a pattern by curing the material, releasing the template from the pattern, and patterning the stacked body using the pattern as a mask.
    Type: Application
    Filed: February 3, 2015
    Publication date: March 17, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yusuke ARAYASHIKI
  • Publication number: 20160064661
    Abstract: According to one embodiment, a resistive random access memory device includes a first electrode and a second electrode. The resistive random access memory device also includes a resistance change layer connected between the first electrode and the second electrode. The resistive random access memory device also includes a conductive layer connected in series to the resistance change layer between the first electrode and the second electrode. The resistive random access memory device in which the conductive layer includes a plurality of first material layers including a first material and a plurality of second material layers including a second material which is different from the first material.
    Type: Application
    Filed: February 25, 2015
    Publication date: March 3, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomohito KAWASHIMA, Takahiro NONAKA, Yusuke ARAYASHIKI, Takayuki ISHIKAWA
  • Patent number: 9276205
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: March 1, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Hidenori Miyagawa, Tomohito Kawashima
  • Patent number: 9257640
    Abstract: A memory device according to an embodiment includes an ion metal layer, an opposing electrode, and a resistance change layer. The ion metal layer contains a first metal and a second metal. The resistance change layer is disposed between the ion metal layer and the opposing electrode. The first metal is able to move repeatedly through an interior of the resistance change layer. The concentration of the first metal in a central portion of the ion metal layer is higher than the concentration of the first metal in an end portion of the ion metal layer.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: February 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Kensuke Takahashi
  • Patent number: 9202846
    Abstract: A resistance random access memory device according to one embodiment includes an interlayer insulation film which a trench is made therein, an ion supply layer provided along a bottom surface and a side surface of the trench, a portion of the ion supply layer provided along the bottom surface is thicker than a portion of the ion supply layer provided along the side surface, and a resistance change layer provided at least below the ion supply layer.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Kikuko Sugimae
  • Patent number: 9166157
    Abstract: According to one embodiment, a conductive bridging memory device includes a first wiring layer having a plurality of first wiring portions extending in a first direction, a second wiring layer having a plurality of second wiring portions extending in a second direction crossing the first direction, and a resistance change layer provided continuously along a plane having the first direction and the second direction between the first wiring layer and the second wiring layer. Each of the first wiring portions includes a first wiring extending in the first direction. Each of the second wiring portions includes a second wiring extending in the second direction, and an ion metal layer provided between the second wiring and the resistance change layer and extending in the second direction.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: October 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yusuke Arayashiki
  • Publication number: 20150228892
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Application
    Filed: April 22, 2015
    Publication date: August 13, 2015
    Inventors: Yusuke ARAYASHIKI, Hidenori MIYAGAWA, Tomohito KAWASHIMA
  • Patent number: 9040953
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Grant
    Filed: March 2, 2014
    Date of Patent: May 26, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Hidenori Miyagawa, Tomohito Kawashima
  • Publication number: 20150076435
    Abstract: According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal particles that are formed in an island form between the first electrodes and the resistance change layer and that contain a metal movable inside the resistance change layer. The first electrodes and the second electrodes are formed of a material which is more unlikely to be ionized as compared to the metal, and the first electrodes are in contact with the resistance change layer in an area around the ion metal particles.
    Type: Application
    Filed: March 2, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke ARAYASHIKI, Hidenori MIYAGAWA, Tomohito KAWASHIMA
  • Publication number: 20150069314
    Abstract: A memory device according to an embodiment includes an ion metal layer containing a first metal, an opposing electrode, a resistance change layer disposed between the ion metal layer and the opposing electrode, a first layer disposed in a central portion of a space between the ion metal layer and the resistance change layer, and a second layer disposed in an end portion of the space. The first layer contains a second metal. The second layer contains the second metal, and at least one selected from oxygen and nitrogen.
    Type: Application
    Filed: January 30, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke ARAYASHIKI, Kensuke Takahashi
  • Publication number: 20150069318
    Abstract: A memory device according to an embodiment includes an ion metal layer, an opposing electrode, and a resistance change layer. The ion metal layer contains a first metal and a second metal. The resistance change layer is disposed between the ion metal layer and the opposing electrode. The first metal is able to move repeatedly through an interior of the resistance change layer. The concentration of the first metal in a central portion of the ion metal layer is higher than the concentration of the first metal in an end portion of the ion metal layer.
    Type: Application
    Filed: January 30, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke ARAYASHIKI, Kensuke TAKAHASHI
  • Patent number: 8895948
    Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode and a resistance change film. The resistance change film is connected between the first electrode and the second electrode. An ion metal is introduced in a matrix material in the resistance change film. A concentration of the ion metal in a first region on the first electrode side of the resistance change film is higher than a concentration of the ion metal in a second region on the second electrode side of the resistance change film A layer made of only the ion metal is not provided in the memory device.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: November 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yusuke Arayashiki
  • Publication number: 20140284536
    Abstract: A resistance random access memory device according to one embodiment includes an interlayer insulation film which a trench is made therein, an ion supply layer provided along a bottom surface and a side surface of the trench, a portion of the ion supply layer provided along the bottom surface is thicker than a portion of the ion supply layer provided along the side surface, and a resistance change layer provided at least below the ion supply layer.
    Type: Application
    Filed: July 30, 2013
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke ARAYASHIKI, Kikuko SUGIMAE
  • Publication number: 20140264225
    Abstract: According to one embodiment, a resistance-variable memory device that is suitable for miniaturization is provided. A resistance-variable memory device according to the embodiment comprises a resistance-variable layer, and an ion supply layer that is laminated on the resistance-variable layer and that contains a silver alloy. A silver concentration of the ion supply layer is in a range of 30-80 atom %.
    Type: Application
    Filed: September 2, 2013
    Publication date: September 18, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yusuke ARAYASHIKI
  • Patent number: 8822966
    Abstract: A nonvolatile memory device has a memory cell including a resistance change layer, a first electrode, and a second electrode. The resistance change layer switches between high and low resistance states due to the transfer of metal ions from the first electrode in response to voltages applied between the electrodes. The first electrode is formed on a first side of the resistance change layer, and provides metal ions. The second electrode is formed on a second side of the resistance change layer. A memory cell region is formed between the first electrode and the second electrode with the resistance change layer. The memory device also includes a high permittivity layer with a higher dielectric constant than the resistance change layer.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kensuke Takahashi, Masanobu Baba, Yusuke Arayashiki
  • Publication number: 20140070156
    Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode and a resistance change film. The resistance change film is connected between the first electrode and the second electrode. An ion metal is introduced in a matrix material in the resistance change film. A concentration of the ion metal in a first region on the first electrode side of the resistance change film is higher than a concentration of the ion metal in a second region on the second electrode side of the resistance change film A layer made of only the ion metal is not provided in the memory device.
    Type: Application
    Filed: February 25, 2013
    Publication date: March 13, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yusuke ARAYASHIKI
  • Patent number: 8664632
    Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode, and a variable resistance film. The variable resistance film is connected between the first electrode and the second electrode. The first electrode includes a metal contained in a matrix made of a conductive material. A cohesive energy of the metal is lower than a cohesive energy of the conductive material. A concentration of the metal at a central portion of the first electrode in a width direction thereof is higher than concentrations of the metal in two end portions of the first electrode in the width direction.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: March 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Matsushita, Shosuke Fujii, Yoshifumi Nishi, Akira Takashima, Takayuki Ishikawa, Hidenori Miyagawa, Takashi Haimoto, Yusuke Arayashiki, Hideki Inokuma
  • Publication number: 20140008603
    Abstract: A nonvolatile memory device has a memory cell including a resistance change layer, a first electrode, and a second electrode. The resistance change layer switches between high and low resistance states due to the transfer of metal ions from the first electrode in response to voltages applied between the electrodes. The first electrode is formed on a first side of the resistance change layer, and provides metal ions. The second electrode is formed on a second side of the resistance change layer. A memory cell region is formed between the first electrode and the second electrode with the resistance change layer. The memory device also includes a high permittivity layer with a higher dielectric constant than the resistance change layer.
    Type: Application
    Filed: February 19, 2013
    Publication date: January 9, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kensuke TAKAHASHI, Masanobu Baba, Yusuke Arayashiki
  • Patent number: 8624344
    Abstract: A solid state imaging device according to an embodiment includes a light sensing part which conducts photoelectric conversion on incident light. The solid state imaging device includes a ferroelectric layer including an organic compound on a surface of the light sensing part on which light is incident. The solid state imaging device includes a transparent electrode formed on the ferroelectric layer.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: January 7, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Arayashiki, Kazuaki Nakajima