Patents by Inventor Yusuke Ikeda

Yusuke Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11178350
    Abstract: It makes it easier to reduce the line capacitance of vertical signal lines in a solid-state image sensor in which signals are output via the vertical signal lines. The solid-state image sensor is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In the solid-state image sensor, the logic circuit processes an analog signal. Also, in the solid-state image sensor, the pixel circuit generates an analog signal by photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In the solid-state image sensor, the negative capacitance circuit is connected to the predetermined signal line.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: November 16, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yosuke Ueno, Golan Zeituni, Noam Eshel, Yusuke Ikeda, Kiyoshi Makigawa
  • Publication number: 20210297623
    Abstract: Changing the analog gain for each of columns while suppressing an expansion of area and an increase in power consumption. A solid-state imaging apparatus (1, 1A) according to an embodiment includes: converters (10A to 10D) connected to a vertical signal line (VSL) extending from a pixel array unit (30); a voltage generator (20) that is connected to a plurality of voltage lines and outputs reference voltages having mutually different voltage values individually to the plurality of voltage lines; wiring lines (L10 to L31, L20 to L23) connecting the converter and the plurality of voltage lines; and switches (SW0 to SW3) provided on the wiring line and configured to perform changeover of the voltage lines connected to the converter to one of the plurality of voltage lines.
    Type: Application
    Filed: July 25, 2019
    Publication date: September 23, 2021
    Inventor: YUSUKE IKEDA
  • Publication number: 20210280897
    Abstract: A method for manufacturing an all-solid-state battery includes a battery unit producing step, a flattening step, and a stacking step. In the battery unit producing step, a battery unit having a plate shape is produced through a pressing step in which a laminate including at least one each of a positive electrode active material layer, a solid electrolyte layer, and a negative electrode active material layer is pressed in a thickness direction of the laminate with a first pressure. In the flattening step, the battery unit is flattened by pressing the produced battery unit in the thickness direction with a second pressure equal to or lower than the first pressure while heating the battery unit to a temperature equal to or higher than a temperature at which the battery unit softens and is deformed. In the stacking step, a plurality of the flattened battery units are stacked.
    Type: Application
    Filed: January 14, 2021
    Publication date: September 9, 2021
    Inventors: Yusuke IKEDA, Masato ONO
  • Publication number: 20210257653
    Abstract: A stacking apparatus provided with a flexible conveyor plate (20), a clamp mechanism (25) for holding a sheet-shaped member carried on the conveyor plate (20) against the conveyor plate (20), and an adjustment mechanism able to adjust the degree of curvature of the conveyor plate (20). When stacking a new sheet-shaped member (1) carried on the conveyor plate (20) onto already stacked sheet-shaped members (1), the adjustment mechanism makes the conveyor plate (20) deform from a flat state to a curved state to make the new sheet-shaped member (1) carried on the conveyor plate (20) deform from a flat state to a curved state.
    Type: Application
    Filed: December 14, 2020
    Publication date: August 19, 2021
    Inventors: Masato ONO, Yuichi ITOH, Yusuke IKEDA, Kazuhito KATO
  • Patent number: 10992892
    Abstract: There is provided an imaging device that includes a pixel, the pixel comprising: a photodetector; a control transistor; a capacitor coupled to the photodetector; a reset transistor coupled between the control transistor and the capacitor; an amplifier transistor having a gate terminal coupled to the capacitor; and a select transistor coupled to the amplifier transistor; a first signal line coupled to the select transistor; and a first amplifying circuit including a first input terminal coupled to the first signal line and a second input terminal configured to receive a first reference signal and an output terminal coupled to the control transistor.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: April 27, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Ikeda, Eiji Hirata, Kazunori Yamamoto
  • Publication number: 20200412994
    Abstract: An imaging element according to a first aspect includes: a successive approximation resistor type analog-digital converter that converts an analog signal output from a pixel including a photoelectric conversion part into a digital signal, in which the successive approximation resistor type analog-digital converter has a preamplifier having a band limiting function. An imaging element according to a second aspect includes a DAC in which the successive approximation resistor type analog-digital converter uses a capacitance element to convert a digital value after AD conversion to an analog value, and sets the analog value to a comparison reference for comparison with an analog input voltage.
    Type: Application
    Filed: April 3, 2019
    Publication date: December 31, 2020
    Inventors: Shinichirou ETOU, Yusuke IKEDA
  • Patent number: 10840283
    Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: November 17, 2020
    Assignee: Sony Corporation
    Inventors: Yosuke Ueno, Yusuke Ikeda, Shizunori Matsumoto, Tsutomu Haruta, Rei Yoshikawa
  • Patent number: 10757071
    Abstract: A bridge device (120-1) which can effectively reduce the waste of the band resource in the upstream bus connected to a management device is realized by including: a first input/output port (221); a second input/output port (222); a group information keeping unit (228) to keep a group identifier and a correspondence between one or more terminal devices and the group identifier, the group identifier identifying a group that includes one or more terminal devices to be connected to the second input/output port (222), the one or more terminal devices belonging to the group; an extended-request processing unit (224) to generate, when an extended-request frame including destination information corresponding to the group identifier for requesting state information of the one or more terminal devices belonging to the group is inputted to the first input/output port (221), a request frame to be outputted from the second input/output port (222) to each of the one or more terminal devices belonging to the group, on the b
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: August 25, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yusuke Ikeda, Katsuyoshi Takahashi
  • Publication number: 20200244907
    Abstract: It makes it easier to reduce the line capacitance of vertical signal lines in a solid-state image sensor in which signals are output via the vertical signal lines. The solid-state image sensor is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In the solid-state image sensor, the logic circuit processes an analog signal. Also, in the solid-state image sensor, the pixel circuit generates an analog signal by photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In the solid-state image sensor, the negative capacitance circuit is connected to the predetermined signal line.
    Type: Application
    Filed: July 10, 2018
    Publication date: July 30, 2020
    Inventors: Yosuke Ueno, Golan Zeituni, Noam Eshel, Yusuke Ikeda, Kiyoshi Makigawa
  • Publication number: 20200098805
    Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.
    Type: Application
    Filed: November 27, 2019
    Publication date: March 26, 2020
    Applicant: SONY CORPORATION
    Inventors: Yosuke UENO, Yusuke IKEDA, Shizunori MATSUMOTO, Tsutomu HARUTA, Rei YOSHIKAWA
  • Publication number: 20200045013
    Abstract: A bridge device (120-1) which can effectively reduce the waste of the band resource in the upstream bus connected to a management device is realized by including: a first input/output port (221); a second input/output port (222); a group information keeping unit (228) to keep a group identifier and a correspondence between one or more terminal devices and the group identifier, the group identifier identifying a group that includes one or more terminal devices to be connected to the second input/output port (222), the one or more terminal devices belonging to the group; an extended-request processing unit (224) to generate, when an extended-request frame including destination information corresponding to the group identifier for requesting state information of the one or more terminal devices belonging to the group is inputted to the first input/output port (221), a request frame to be outputted from the second input/output port (222) to each of the one or more terminal devices belonging to the group, on the b
    Type: Application
    Filed: December 6, 2016
    Publication date: February 6, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yusuke IKEDA, Katsuyoshi TAKAHASHI
  • Patent number: 10529756
    Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: January 7, 2020
    Assignee: Sony Corporation
    Inventors: Yosuke Ueno, Yusuke Ikeda, Shizunori Matsumoto, Tsutomu Haruta, Rei Yoshikawa
  • Publication number: 20190313047
    Abstract: There is provided an imaging device that includes a pixel, the pixel comprising: a photodetector; a control transistor; a capacitor coupled to the photodetector; a reset transistor coupled between the control transistor and the capacitor; an amplifier transistor having a gate terminal coupled to the capacitor; and a select transistor coupled to the amplifier transistor; a first signal line coupled to the select transistor; and a first amplifying circuit including a first input terminal coupled to the first signal line and a second input terminal configured to receive a first reference signal and an output terminal coupled to the control transistor.
    Type: Application
    Filed: October 10, 2017
    Publication date: October 10, 2019
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Ikeda, Eiji Hirata, Kazuyuki Yamamoto
  • Patent number: 10348987
    Abstract: The present disclosure relates to a solid-state imaging device, an AD converter, and an electronic apparatus that improve a crosstalk characteristic. The AD converter includes a comparator that compares the pixel signal with the reference signal, a pixel signal side capacitor, and a reference signal side capacitor. The pixel signal side capacitor and the reference signal side capacitor are formed such that a first parasitic capacity and a second parasitic capacity are substantially the same. The present technology is applicable to a CMOS image sensor, for example.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: July 9, 2019
    Assignee: Sony Corporation
    Inventors: Yusuke Ikeda, Daijiro Anai, Rei Yoshikawa
  • Patent number: 10237502
    Abstract: To reduce fluctuations in image signals when the voltage of a negative power supply supplied to pixels changes. A pixel operates based on a first ground potential applied to a first ground line and outputs an analog image signal according to emitted light. An analog-digital converter operates based on a second ground potential applied to a second ground line, the second ground potential higher than the first ground potential, and converts the analog image signal into a digital image signal based on a reference voltage as a standard for the conversion. A reference voltage generation unit operates based on the second ground potential and generates the reference voltage. A reference voltage correction unit corrects the reference voltage generated according to a change in the first ground potential and supplies the reference voltage to the analog-digital converter.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: March 19, 2019
    Assignee: Sony Corporation
    Inventors: Tatsuki Nishino, Yosuke Ueno, Yusuke Ikeda, Yusuke Moriyama, Shizunori Matsumoto
  • Patent number: 10194107
    Abstract: To reduce fluctuations in image signals when the voltage of a negative power supply supplied to pixels changes. A pixel operates based on a first ground potential applied to a first ground line and outputs an analog image signal according to emitted light. An analog-digital converter operates based on a second ground potential applied to a second ground line, the second ground potential higher than the first ground potential, and converts the analog image signal into a digital image signal based on a reference voltage as a standard for the conversion. A reference voltage generation unit operates based on the second ground potential and generates the reference voltage. A reference voltage correction unit corrects the reference voltage generated according to a change in the first ground potential and supplies the reference voltage to the analog-digital converter.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: January 29, 2019
    Assignee: Sony Corporation
    Inventors: Tatsuki Nishino, Yosuke Ueno, Yusuke Ikeda, Yusuke Moriyama, Shizunori Matsumoto
  • Publication number: 20180295304
    Abstract: The present disclosure relates to a solid-state imaging device, an AD converter, and an electronic apparatus that improve a crosstalk characteristic. The AD converter includes a comparator that compares the pixel signal with the reference signal, a pixel signal side capacitor, and a reference signal side capacitor. The pixel signal side capacitor and the reference signal side capacitor are formed such that a first parasitic capacity, and a second parasitic capacity are substantially the same. The present technology is applicable to a CMOS image sensor, for example.
    Type: Application
    Filed: June 13, 2018
    Publication date: October 11, 2018
    Applicant: SONY CORPORATION
    Inventors: Yusuke IKEDA, Daijiro ANAI, Rei YOSHIKAWA
  • Publication number: 20180269243
    Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.
    Type: Application
    Filed: May 17, 2018
    Publication date: September 20, 2018
    Inventors: Yosuke UENO, Yusuke IKEDA, Shizunori MATSUMOTO, Tsutomu HARUTA, Rei YOSHIKAWA
  • Patent number: 10044954
    Abstract: The present disclosure relates to a solid-state imaging device, an AD converter, and an electronic apparatus that improve a crosstalk characteristic. The AD converter includes a comparator that compares the pixel signal with the reference signal, a pixel signal side capacitor, and a reference signal side capacitor. The pixel signal side capacitor and the reference signal side capacitor are formed such that a first parasitic capacity, and a second parasitic capacity are substantially the same. The present technology is applicable to a CMOS image sensor, for example.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: August 7, 2018
    Assignee: Sony Corporation
    Inventors: Yusuke Ikeda, Daijiro Anai, Rei Yoshikawa
  • Patent number: 10008525
    Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: June 26, 2018
    Assignee: Sony Corporation
    Inventors: Yosuke Ueno, Yusuke Ikeda, Shizunori Matsumoto, Tsutomu Haruta, Rei Yoshikawa