Patents by Inventor Yusuke Kasahara

Yusuke Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097044
    Abstract: According to one embodiment, a semiconductor device includes a first conductive layer between first and second insulating layers with an oxide semiconductor column extending in the first direction through these layers. A third insulating layer covers the column. The column has a first semiconductor portion at a first position matching the first insulating layer, a second semiconductor portion at a second position matching second insulating layer, and a third semiconductor portion at a third position matching the first conductive layer. The first semiconductor portion is continuous along a second direction between the third insulating layer, the second semiconductor portion is continuous along the second direction between the third insulating layer, but the third semiconductor portion is not continuous between the third insulating layer.
    Type: Application
    Filed: August 25, 2023
    Publication date: March 21, 2024
    Inventors: Yusuke KASAHARA, Kappei IMAMURA, Akifumi GAWASE, Shinji MORI, Akihiro KAJITA
  • Patent number: 11798806
    Abstract: A pattern forming method includes: forming a first film on a first region of a processing target film; forming a second film containing metal and carbon and different from the first film, on a second region of the processing target film; etching the first film; and etching the processing target film using the first film after the etching while the second film is exposed.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: October 24, 2023
    Assignee: KIOXIA CORPORATION
    Inventor: Yusuke Kasahara
  • Publication number: 20230298863
    Abstract: A semiconductor manufacturing apparatus of embodiments includes: a chamber including a top plate and a sidewall; a holder provided in the chamber holding a substrate; a first high frequency power supply applying high frequency power to the holder or the top plate; a second high frequency power supply applying high frequency power to the holder; a third high frequency power supply applying high frequency power to the top plate; a gas supply pipe supplying a gas to the chamber; and a gas discharge pipe discharging a gas from the chamber.
    Type: Application
    Filed: September 12, 2022
    Publication date: September 21, 2023
    Applicant: Kioxia Corporation
    Inventor: Yusuke KASAHARA
  • Patent number: 11735431
    Abstract: In a pattern formation method, a first organic film is formed on a film to be etched and contains a metal. A second organic film is formed on the first organic film, and has a higher density than a density of the first organic film. The first and second organic films are patterned to form a mask, and the film to be etched is etched using the mask.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: August 22, 2023
    Assignee: KIOXIA CORPORATION
    Inventor: Yusuke Kasahara
  • Publication number: 20220301872
    Abstract: A pattern forming method includes: forming a first film on a first region of a processing target film; forming a second film containing metal and carbon and different from the first film, on a second region of the processing target film; etching the first film; and etching the processing target film using the first film after the etching while the second film is exposed.
    Type: Application
    Filed: September 2, 2021
    Publication date: September 22, 2022
    Applicant: Kioxia Corporation
    Inventor: Yusuke KASAHARA
  • Publication number: 20210280431
    Abstract: In a pattern formation method, a first organic film is formed on a film to be etched and contains a metal. A second organic film is formed on the first organic film, and has a higher density than a density of the first organic film. The first and second organic films are patterned to form a mask, and the film to be etched is etched using the mask.
    Type: Application
    Filed: September 3, 2020
    Publication date: September 9, 2021
    Applicant: Kioxia Corporation
    Inventor: Yusuke KASAHARA
  • Patent number: 10964538
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film that contains carbon on the first film, and processing the second film into a second pattern. The method further includes impregnating a metal element or a semiconductor element into the second pattern after the processing into the second pattern. The method further includes processing the first film into a first pattern using the second pattern after the impregnation of the metal element or the semiconductor element.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: March 30, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yusuke Kasahara
  • Patent number: 10847191
    Abstract: A semiconductor device includes a first pattern comprising first lines at a first interval and second pattern at the first interval. The second lines are between the first lines. A third pattern is above the first and the second patterns in a first and second areas. The third pattern includes third portions spaced from each other at the first interval in the first area and fourth portions spaced from each other at the first interval in the second area. The third portions are directly above the second lines in the first area and the fourth portions are directly above the first lines in the second area. A first contact is between third portions in the first area and connected to a first line of the first pattern. A second contact is between the fourth portions in the second area and connected to a second line of the second pattern.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: November 24, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yusuke Kasahara
  • Patent number: 10811268
    Abstract: According to one embodiment, a substrate processing apparatus comprises a chamber for a substrate that has a target film thereon. The apparatus includes a first gas introducing unit to introduce a precursor gas into the chamber, a second gas introducing unit that introduces a etching gas for etching the target film into the chamber, and a controller configured to control the first gas introducing unit and the second gas introducing unit to cause the first gas and the second gas to be alternately introduced to the chamber.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: October 20, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yusuke Kasahara, Shinichi Ito, Seiji Morita, Ryosuke Yamamoto, Ryuichi Saito
  • Publication number: 20200234735
    Abstract: A semiconductor device includes a first pattern comprising first lines at a first interval and second pattern at the first interval. The second lines are between the first lines. A third pattern is above the first and the second patterns in a first and second areas. The third pattern includes third portions spaced from each other at the first interval in the first area and fourth portions spaced from each other at the first interval in the second area. The third portions are directly above the second lines in the first area and the fourth portions are directly above the first lines in the second area. A first contact is between third portions in the first area and connected to a first line of the first pattern. A second contact is between the fourth portions in the second area and connected to a second line of the second pattern.
    Type: Application
    Filed: August 28, 2019
    Publication date: July 23, 2020
    Inventor: Yusuke KASAHARA
  • Publication number: 20190287809
    Abstract: According to one embodiment, a substrate processing apparatus comprises a chamber for a substrate that has a target film thereon. The apparatus includes a first gas introducing unit to introduce a precursor gas into the chamber, a second gas introducing unit that introduces a etching gas for etching the target film into the chamber, and a controller configured to control the first gas introducing unit and the second gas introducing unit to cause the first gas and the second gas to be alternately introduced to the chamber.
    Type: Application
    Filed: August 13, 2018
    Publication date: September 19, 2019
    Inventors: Yusuke KASAHARA, Shinichi ITO, Seiji MORITA, Ryosuke YAMAMOTO, Ryuichi SAITO
  • Patent number: 10409157
    Abstract: A pattern forming method includes forming a first film on a first layer and a second film on the first film. First and second concave portions are formed in the second film. A third film is formed in the concave portions and a fourth film comprising a polymer is formed on the third film. The fourth film can be processed to phase separate and form a pattern in at least the first opening. The pattern formed in the fourth film can be used in patterning films thereunder. A fifth film can be formed which covers the first concave portion and does not cover the second concave portion. The third film in the second concave portion and the first film under the second concave portion can be processed using the fifth film. The first layer can be patterned using the first, second, or third film as a mask.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: September 10, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yusuke Kasahara
  • Patent number: 10366886
    Abstract: According to one embodiment, a pattern forming method includes supplying, onto an under layer, a self-organization material including a block copolymer which includes a first polymer and a second polymer, and a third polymer having a molecular structure with oxygen attached to a cyclic structure, wherein the third polymer is bonded to the first polymer, and phase-separating the block copolymer to form a phase-separation pattern on the under layer.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: July 30, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Seiji Morita, Masahiro Kanno, Yusuke Kasahara
  • Publication number: 20190080900
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film that contains carbon on the first film, and processing the second film into a second pattern. The method further includes impregnating a metal element or a semiconductor element into the second pattern after the processing into the second pattern. The method further includes processing the first film into a first pattern using the second pattern after the impregnation of the metal element or the semiconductor element.
    Type: Application
    Filed: February 14, 2018
    Publication date: March 14, 2019
    Applicant: Toshiba Memory Corporation
    Inventor: Yusuke Kasahara
  • Publication number: 20180275519
    Abstract: A pattern formation method includes forming a first pattern in a first film in a first region and forming a second pattern in the first film in a second region by using an optical lithography technology. The pattern formation method also includes forming a third pattern corresponding to the first pattern in a second film below the first film in the first region by using a self-organization lithography technology. The pattern formation method also includes transferring the third pattern to a third film below the first film and the second film in the first region and transferring the second pattern to the third film in the second region.
    Type: Application
    Filed: September 5, 2017
    Publication date: September 27, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Ayako KAWANISHI, Takehiro Kondoh, Yusuke Kasahara
  • Publication number: 20180090658
    Abstract: According to one embodiment, a thermoelectric conversion device includes a first stacked body comprising a plurality of first semiconductor layers of a first conductivity type, the first semiconductor layers spaced from each other in a first direction, a second stacked body comprising a plurality of second semiconductor layers of a second conductivity type, the second semiconductor layers spaced from each other in the first direction, and a first connection portion electrically connecting the first stacked body to the second stacked body, wherein the first stacked body has a plurality of first openings that extend inwardly of the first stacked body in the first direction, wherein a direction from the first stacked body to the second stacked body intersects the first direction, and wherein the second stacked body has a plurality of second openings extending inwardly of the second stacked body in the first direction.
    Type: Application
    Filed: March 2, 2017
    Publication date: March 29, 2018
    Inventors: Yusuke KASAHARA, Miwa SATO, Yasuo AKATSUKA, Masamichi SUZUKI, Tomoaki INOKUCHI
  • Publication number: 20180076019
    Abstract: According to one embodiment, a pattern forming method includes supplying, onto an under layer, a self-organization material including a block copolymer which includes a first polymer and a second polymer, and a third polymer having a molecular structure with oxygen attached to a cyclic structure, wherein the third polymer is bonded to the first polymer, and phase-separating the block copolymer to form a phase-separation pattern on the under layer.
    Type: Application
    Filed: February 28, 2017
    Publication date: March 15, 2018
    Inventors: Seiji MORITA, Masahiro KANNO, Yusuke KASAHARA
  • Patent number: 9816004
    Abstract: A pattern forming method includes forming a guide mask layer including a first feature having a first opening width, a second feature having a second opening width, a third feature having a third opening width. The first width being less than the second width and greater than the third width. A self-organizing material having a phase-separation period is disposed on the guide mask layer to at least partially fill the first, second, and third features. The self-organizing material is process to the cause phase-separation into first and second polymer portions. The first width is greater than the phase-separation period and the third width is less. A masking pattern is formed on the first layer by removing the second polymer portions and leaving the first polymer portions. The masking pattern is then transferred to the first layer.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: November 14, 2017
    Assignee: Toshiba Memory Corporation
    Inventors: Ayako Kawanishi, Yusuke Kasahara, Hiroki Yonemitsu
  • Patent number: 9696628
    Abstract: According to one embodiment, a pattern forming method includes forming a resist pattern on an under-layer, forming a recessed portion in the under-layer by etching the under-layer using the resist pattern as a mask, slimming the resist pattern, forming a neutral layer having an affinity for first and second polymers on a region of the under-layer not covered with the slimmed resist pattern, forming a block copolymer film containing the first polymer and the second polymer on the slimmed resist pattern and the neutral layer, and forming a microphase separation pattern comprising a first portion formed of the first polymer and a second portion formed of the second polymer by applying microphase separation processing to the block copolymer film.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: July 4, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Kasahara, Hideki Kanai
  • Patent number: 9685331
    Abstract: A semiconductor device manufacturing method includes forming a first film on a substrate having a first region and a second region. A second film is formed on the first film. Guide grooves are formed by removing portions of the second film and exposing the first film. A self-assembly material is coated on the exposed first film and heated to cause a phase separation into a first and a second phase section. The self-assembly material is irradiated. A mask pattern including at least a portion of the first phase section is formed by removing the second phase section. The mask pattern has a first dimension in the first region and a second dimension in the second region that is different from the first dimension. The first film is etched after the mask pattern is formed.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: June 20, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ayako Kawanishi, Yusuke Kasahara, Hiroki Yonemitsu