Patents by Inventor Yusuke Kasahara

Yusuke Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170076940
    Abstract: According to one embodiment, a pattern forming method includes forming a resist pattern on an under-layer, forming a recessed portion in the under-layer by etching the under-layer using the resist pattern as a mask, slimming the resist pattern, forming a neutral layer having an affinity for first and second polymers on a region of the under-layer not covered with the slimmed resist pattern, forming a block copolymer film containing the first polymer and the second polymer on the slimmed resist pattern and the neutral layer, and forming a microphase separation pattern comprising a first portion formed of the first polymer and a second portion formed of the second polymer by applying microphase separation processing to the block copolymer film.
    Type: Application
    Filed: March 11, 2016
    Publication date: March 16, 2017
    Inventors: Yusuke KASAHARA, Hideki KANAI
  • Publication number: 20170076952
    Abstract: A pattern forming method includes forming a guide mask layer including a first feature having a first opening width, a second feature having a second opening width, a third feature having a third opening width. The first width being less than the second width and greater than the third width. A self-organizing material having a phase-separation period is disposed on the guide mask layer to at least partially fill the first, second, and third features. The self-organizing material is process to the cause phase-separation into first and second polymer portions. The first width is greater than the phase-separation period and the third width is less. A masking pattern is formed on the first layer by removing the second polymer portions and leaving the first polymer portions. The masking pattern is then transferred to the first layer.
    Type: Application
    Filed: August 10, 2016
    Publication date: March 16, 2017
    Inventors: Ayako KAWANISHI, Yusuke KASAHARA, Hiroki YONEMITSU
  • Publication number: 20170068162
    Abstract: A pattern forming method includes forming a first film on a first layer and a second film on the first film. First and second concave portions are formed in the second film. A third film is formed in the concave portions and a fourth film comprising a polymer is formed on the third film. The fourth film can be processed to phase separate and form a pattern in at least the first opening. The pattern formed in the fourth film can be used in patterning films thereunder. A fifth film can be formed which covers the first concave portion and does not cover the second concave portion. The third film in the second concave portion and the first film under the second concave portion can be processed using the fifth film. The first layer can be patterned using the first, second, or third film as a mask.
    Type: Application
    Filed: August 10, 2016
    Publication date: March 9, 2017
    Inventor: Yusuke KASAHARA
  • Patent number: 9371427
    Abstract: A pattern is formed by forming a first pattern on a first film, forming a block copolymer layer including a first block chain and a second block chain on the first pattern, forming a second pattern, forming a second film on the second pattern, selectively removing the second film until the second pattern is exposed, forming a third pattern, and processing the first film using the third pattern as a mask. The second pattern is formed by microphase-separating the block copolymer layer, and removing the first block chain or the second block chain. The second film is formed by applying a material having an etch rate that is less than an etch rate of a material of the first pattern and the second pattern. The third pattern is formed by selectively removing the second pattern and the first pattern using the second film as a mask.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: June 21, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsutoshi Kobayashi, Yusuke Kasahara, Hiroki Yonemitsu, Hitoshi Kubota, Ayako Kawanishi
  • Publication number: 20160060410
    Abstract: A pattern is formed by forming a first pattern on a first film, forming a block copolymer layer including a first block chain and a second block chain on the first pattern, forming a second pattern, forming a second film on the second pattern, selectively removing the second film until the second pattern is exposed, forming a third pattern, and processing the first film using the third pattern as a mask. The second pattern is formed by microphase-separating the block copolymer layer, and removing the first block chain or the second block chain. The second film is formed by applying a material having an etch rate that is less than an etch rate of a material of the first pattern and the second pattern. The third pattern is formed by selectively removing the second pattern and the first pattern using the second film as a mask.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 3, 2016
    Inventors: Katsutoshi KOBAYASHI, Yusuke KASAHARA, Hiroki YONEMITSU, Hitoshi KUBOTA, Ayako KAWANISHI
  • Patent number: 9252027
    Abstract: In accordance with an embodiment, a method of forming a pattern includes forming a first layer on a fabrication target film, making a mold and the first layer push each other to form a protrusion on the fabrication target film, and forming first and second regions, forming a block copolymer layer including first and second blocks in the first and second regions, phase-separating the block copolymer layer, forming second and third layers in the first region, and forming fourth and fifth layers in the second region; and removing the third and fifth layers. The first region is surrounded by the first layer and the protrusion. The second region is surrounded by the first layer and contacts the first region via the protrusion. The third layer is surrounded by the second layer. The fifth layer is surrounded by the fourth layer.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: February 2, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Kasahara, Kei Kobayashi
  • Publication number: 20150151329
    Abstract: In a pattern forming method according to the present embodiment, a first guide layer having a first pattern is formed above a base material. A second guide layer having a second pattern intersecting the first pattern is formed. A directed self-assembly material is introduced in a concave portion surrounded by the first and second guide layers. A directed self-assembly pattern having a diameter which is smaller than an opening diameter of the concave portion is formed in the concave portion by causing the directed self-assembly material to be directed self-assembled.
    Type: Application
    Filed: February 27, 2014
    Publication date: June 4, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ayako KAWANISHI, Hirokazu Kato, Hiroki Yonemitsu, Yusuke Kasahara
  • Patent number: 9029266
    Abstract: According to one embodiment, a semiconductor device manufacturing method includes depositing a silicon film above a semiconductor substrate, forming an insulating film which includes silicon oxide or silicon nitride on the silicon film, forming a physical guide having a depressed portion above the insulating film, forming a directed self-assembly material layer which includes a first polymer and a second polymer in the depressed portion of the physical guide, phase-separating the directed self-assembly material layer into a first region which includes the first polymer and a second region which includes the second polymer, removing the second region, processing the insulating film by using the physical guide and the first region as masks, and transferring a pattern corresponding to the second region to the insulating film. Further, the silicon film is processed by using the pattern transferred onto the insulating film as a mask.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: May 12, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Kasahara, Noriko Sakurai
  • Publication number: 20140199847
    Abstract: According to one embodiment, a semiconductor device manufacturing method includes depositing a silicon film above a semiconductor substrate, forming an insulating film which includes silicon oxide or silicon nitride on the silicon film, forming a physical guide having a depressed portion above the insulating film, forming a directed self-assembly material layer which includes a first polymer and a second polymer in the depressed portion of the physical guide, phase-separating the directed self-assembly material layer into a first region which includes the first polymer and a second region which includes the second polymer, removing the second region, processing the insulating film by using the physical guide and the first region as masks, and transferring a pattern corresponding to the second region to the insulating film. Further, the silicon film is processed by using the pattern transferred onto the insulating film as a mask.
    Type: Application
    Filed: August 21, 2013
    Publication date: July 17, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke KASAHARA, Noriko SAKURAI
  • Patent number: 8642484
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a film containing boron on a semiconductor substrate, forming a film containing silicon oxide on the film containing boron, patterning the film containing silicon oxide and etching the film containing boron with a gas containing chlorine by using the patterned film containing silicon oxide as a mask.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: February 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yusuke Kasahara
  • Publication number: 20130344698
    Abstract: According to one embodiment, a mask layer is formed on a film to be processed. A resist film containing a desired pattern is formed on the mask layer. Etching is performed on the above mentioned mask layer with an etching gas that does not contain fluorine. The method also includes removing the resist film. After the resist film is removed, using the mask layer as a mask, an etching is performed on the to be processed film using a fluorocarbon gas.
    Type: Application
    Filed: March 4, 2013
    Publication date: December 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke OCHIAI, Hisataka HAYASHI, Yusuke KASAHARA
  • Patent number: 8536061
    Abstract: According to one embodiment, a semiconductor device manufacturing method includes collectively etching layers of a multilayered film including silicon layers and silicon oxide films alternately stacked on a semiconductor substrate. The etching gas of the etching contains at least two types of group-VII elements and one of a group-III element, a group-IV element, a group-V element, and a group-VI element, the energy of ions entering the semiconductor substrate when performing the etching is not less than 100 eV, and an addition ratio of the group-III element, the group-IV element, the group-V element, the group-VI element, and the group-VII element to the group-VII element is 0.5 (inclusive) to 3.0 (inclusive).
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: September 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisataka Hayashi, Yusuke Kasahara, Tsubasa Imamura
  • Publication number: 20130059437
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a film containing boron on a semiconductor substrate, forming a film containing silicon oxide on the film containing boron, patterning the film containing silicon oxide and etching the film containing boron with a gas containing chlorine by using the patterned film containing silicon oxide as a mask.
    Type: Application
    Filed: March 8, 2012
    Publication date: March 7, 2013
    Inventor: Yusuke KASAHARA
  • Publication number: 20120034785
    Abstract: According to one embodiment, a semiconductor device manufacturing method includes collectively etching layers of a multilayered film including silicon layers and silicon oxide films alternately stacked on a semiconductor substrate. The etching gas of the etching contains at least two types of group-VII elements and one of a group-III element, a group-IV element, a group-V element, and a group-VI element, the energy of ions entering the semiconductor substrate when performing the etching is not less than 100 eV, and an addition ratio of the group-III element, the group-IV element, the group-V element, the group-VI element, and the group-VII element to the group-VII element is 0.5 (inclusive) to 3.0 (inclusive).
    Type: Application
    Filed: March 11, 2011
    Publication date: February 9, 2012
    Inventors: Hisataka HAYASHI, Yusuke Kasahara, Tsubasa Imamura
  • Patent number: 8084360
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film containing boron (B) on a member to be etched, the member being a semiconductor substrate, or a film formed on the semiconductor substrate, and forming a second film formed of a silicon oxide film on the first film. The method further includes pressing an original plate having a pattern formed in an uneven shape onto the second film to transfer the pattern to the second film, and etching the first film by using the second film where the pattern is transferred as a mask, with an etching gas that contains fluoromethane (CH3F) and oxygen (O2) and has an oxygen concentration of 50 to 90 at. %, to transfer the pattern to the first film. The method further includes etching the member by using the first film where the pattern is transferred as a mask, to form a concave portion having the pattern in the member.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: December 27, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Kasahara, Hisataka Hayashi
  • Publication number: 20110269290
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film containing boron (B) on a member to be etched, the member being a semiconductor substrate, or a film formed on the semiconductor substrate, and forming a second film formed of a silicon oxide film on the first film. The method further includes pressing an original plate having a pattern formed in an uneven shape onto the second film to transfer the pattern to the second film, and etching the first film by using the second film where the pattern is transferred as a mask, with an etching gas that contains fluoromethane (CH3F) and oxygen (O2) and has an oxygen concentration of 50 to 90 at. %, to transfer the pattern to the first film. The method further includes etching the member by using the first film where the pattern is transferred as a mask, to form a concave portion having the pattern in the member.
    Type: Application
    Filed: December 9, 2010
    Publication date: November 3, 2011
    Inventors: Yusuke KASAHARA, Hisataka Hayashi