Patents by Inventor Yusuke Kohyama
Yusuke Kohyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250142999Abstract: A first photodetector according to an embodiment of the present disclosure includes: a semiconductor substrate having a first surface and a second surface that are opposed to each other, and including a plurality of pixels arranged in an array; one or a plurality of transistors provided on the first surface of the semiconductor substrate in the pixel; and a first isolation trench that is provided in the semiconductor substrate, and isolates the plurality of pixels adjacent to each other from each other, and the first isolation trench being in contact with at least one of a source region or a drain region of the one or plurality of transistors in a plan view.Type: ApplicationFiled: February 14, 2023Publication date: May 1, 2025Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yusuke KOHYAMA, Junpei YAMAMOTO, Kentaro EDA, Ryoji HASUMI, Hirofumi YAMASHITA
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Patent number: 12183756Abstract: An imaging device according to an embodiment of the present disclosure includes: a first substrate including a sensor pixel that performs photoelectric conversion; a second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel; and a third substrate including a processing circuit that performs signal processing on the pixel signal. The first substrate, the second substrate, and the third substrate are stacked in this order, and a concentration of electrically-conductive type impurities in a region on side of the first substrate is higher than a concentration of electrically-conductive type impurities in a region on side of the third substrate, in at least one or more semiconductor layers in which a field-effect transistor of the pixel circuit is provided.Type: GrantFiled: June 25, 2020Date of Patent: December 31, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Naoki Saka, Shintaro Okamoto, Yusuke Kohyama, Shigetaka Mori
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Patent number: 12136639Abstract: The present technology relates to an imaging element and electronic equipment that enable an increase in the amount of saturated charge. The imaging element includes a substrate, a first photoelectric conversion region adjacent a second photoelectric conversion region in the substrate, a pixel isolation section between the first photoelectric conversion region and the second photoelectric conversion region, and a junction region in a side wall of the pixel isolation section, the junction region including a first impurity region including first impurities and a second impurity region including second impurities. The length of a side of the first impurity region, the side perpendicularly intersecting two parallel sides of four sides of the pixel isolation section enclosing the first photoelectric conversion region, is larger than the length between the two parallel sides of the pixel isolation section. The present technology is applicable to, for example, an imaging apparatus.Type: GrantFiled: October 24, 2019Date of Patent: November 5, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Masashi Ohura, Yusuke Kohyama
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Publication number: 20220367536Abstract: An imaging device according to an embodiment of the present disclosure includes: a first substrate including a sensor pixel that performs photoelectric conversion; a second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel; and a third substrate including a processing circuit that performs signal processing on the pixel signal. The first substrate, the second substrate, and the third substrate are stacked in this order, and a concentration of electrically-conductive type impurities in a region on side of the first substrate is higher than a concentration of electrically-conductive type impurities in a region on side of the third substrate, in at least one or more semiconductor layers in which a field-effect transistor of the pixel circuit is provided.Type: ApplicationFiled: June 25, 2020Publication date: November 17, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Naoki SAKA, Shintaro OKAMOTO, Yusuke KOHYAMA, Shigetaka MORI
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Publication number: 20210408090Abstract: An imaging device according to an embodiment of the present disclosure includes: a plurality of photoelectric conversion sections; a plurality of color filters provided for the respective photoelectric conversion sections; an element separation section extending from between adjacent two of the photoelectric conversion sections to between adjacent two of the color filters; and a diffusion layer being provided in contact with a surface, of the element separation section, on side of the photoelectric conversion section, and having an electric conductivity type different from an electric conductivity type of the photoelectric conversion section.Type: ApplicationFiled: October 31, 2019Publication date: December 30, 2021Inventor: YUSUKE KOHYAMA
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Publication number: 20210399029Abstract: The present technology relates to an imaging element and electronic equipment that enable an increase in the amount of saturated charge. The imaging element includes a substrate, a first photoelectric conversion region adjacent a second photoelectric conversion region in the substrate, a pixel isolation section between the first photoelectric conversion region and the second photoelectric conversion region, and a junction region in a side wall of the pixel isolation section, the junction region including a first impurity region including first impurities and a second impurity region including second impurities. The length of a side of the first impurity region, the side perpendicularly intersecting two parallel sides of four sides of the pixel isolation section enclosing the first photoelectric conversion region, is larger than the length between the two parallel sides of the pixel isolation section. The present technology is applicable to, for example, an imaging apparatus.Type: ApplicationFiled: October 24, 2019Publication date: December 23, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masashi OHURA, Yusuke KOHYAMA
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Publication number: 20160028983Abstract: According to an embodiment, a solid-state image pickup device is provided. The solid-state image pickup device includes a sensor substrate, microlenses, and a flattened layer. The sensor substrate is provided with a plurality of photoelectric conversion elements arranged in a two-dimensional array shape. The microlenses are provided at positions facing light receiving surfaces of the plurality of photoelectric conversion elements, respectively, and collect incident light onto the photoelectric conversion elements. The flattened layer is provided on a light incident side of the microlenses and has a refractive index which is higher than a refractive index of air and is 1/1.3 times or less of a refractive index of the microlenses.Type: ApplicationFiled: July 6, 2015Publication date: January 28, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Shinji UYA, Yusuke Kohyama
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Publication number: 20140218578Abstract: According to an embodiment of the present invention, a solid-state imaging device is provided. The solid-state imaging device includes a plurality of photoelectric conversion devices and an amplifier transistor. The plurality of photoelectric conversion devices photoelectrically converts an incident beam into signal charges. The amplifier transistor is provided on a face on the opposite side of the light incidence plane of the photoelectric conversion devices through an interlayer insulating film as the amplifier transistor is laid over the photoelectric conversion devices. The amplifier transistor has the area of a channel greater than the area of the incidence plane of a single photoelectric conversion device, and the amplifier transistor amplifies the signal charges.Type: ApplicationFiled: August 23, 2013Publication date: August 7, 2014Applicant: Kabushiki Kaisha ToshibaInventor: Yusuke Kohyama
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Patent number: 8310003Abstract: A charge accumulation region of a first conductivity type is buried in a semiconductor substrate. A charge transfer destination diffusion layer of the first conductivity type is formed on a surface of the semiconductor substrate. A transfer gate electrode is formed on the charge accumulation region, and charge is transferred from the charge accumulation region to the charge transfer destination diffusion layer.Type: GrantFiled: July 27, 2009Date of Patent: November 13, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Yusuke Kohyama
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Patent number: 8138533Abstract: A semiconductor device includes a semiconductor substrate, a back side drawn electrode formed by embedding a first conductive material in a contact hole penetrating the semiconductor substrate through an insulating film formed to include a uniform thickness, used also as an alignment mark, and configured to draw out an electrode to the back side of the semiconductor substrate. The device further includes a pad provided on the back side of the semiconductor substrate, and connected to the back side drawn electrode.Type: GrantFiled: December 15, 2009Date of Patent: March 20, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Hidetoshi Koike, Yusuke Kohyama
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Patent number: 8133753Abstract: In a solid-state image pick up device, a first conduction type semiconductor layer which has a first surface side. A second surface side which is located the opposite side of the first surface side and an image sensor area. A photo-conversion area which is configured in the first surface side and charges electron by photoelectric conversion. A first diffusion area of second conduction type for isolation, wherein the first diffusion area surrounds the photo-conversion area and extends from the first surface side to the middle part of the semiconductor layer and a second diffusion area of second conduction type for isolation, wherein the second diffusion area extends from the second surface side to the bottom of the first diffusion layer.Type: GrantFiled: June 22, 2011Date of Patent: March 13, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Yusuke Kohyama
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Patent number: 8039883Abstract: In a solid-state image pick up device, a first conduction type semiconductor layer which has a first surface side. A second surface side which is located the opposite side of the first surface side and an image sensor area. A photo-conversion area which is configured in the first surface side and charges electron by photoelectric conversion. A first diffusion area of second conduction type for isolation, wherein the first diffusion area surrounds the photo-conversion area and extends from the first surface side to the middle part of the semiconductor layer and a second diffusion area of second conduction type for isolation, wherein the second diffusion area extends from the second surface side to the bottom of the first diffusion layer.Type: GrantFiled: June 17, 2009Date of Patent: October 18, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Yusuke Kohyama
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Publication number: 20110250716Abstract: In a solid-state image pick up device, a first conduction type semiconductor layer which has a first surface side. A second surface side which is located the opposite side of the first surface side and an image sensor area. A photo-conversion area which is configured in the first surface side and charges electron by photoelectric conversion. A first diffusion area of second conduction type for isolation, wherein the first diffusion area surrounds the photo-conversion area and extends from the first surface side to the middle part of the semiconductor layer and a second diffusion area of second conduction type for isolation, wherein the second diffusion area extends from the second surface side to the bottom of the first diffusion layer.Type: ApplicationFiled: June 22, 2011Publication date: October 13, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Yusuke KOHYAMA
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Publication number: 20110042552Abstract: According to one embodiment, a solid-state imaging device with an array arrangement of unit pixels including photoelectric conversion parts configured to generate signal charges by photoelectric conversion and a signal scanning circuit part, the signal scanning circuit part being provided on a second semiconductor layer different from a first semiconductor layer including the photoelectric conversion parts, the second semiconductor layer being stacked above the front side of the first semiconductor layer via an insulating film, and the first semiconductor layer being so configured that a pixel separation insulating film is buried in pixel boundary parts and read transistors configured to read signal charges generated by the photoelectric conversion parts are formed at the front side of the first semiconductor layer.Type: ApplicationFiled: August 9, 2010Publication date: February 24, 2011Inventors: Shogo FURUYA, Hirofumi Yamashita, Yusuke Kohyama
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Patent number: 7859073Abstract: The present invention provides a solid-state image pickup device including an image pickup pixel section which is provided on a semiconductor substrate and in which a plurality of pixels each having a photoelectric conversion element and a field-effect transistor are arranged, and a peripheral circuit section for the image pickup pixel section. An interconnect layer driving the field-effect transistor in the image pickup pixel section is formed on a first surface side of the semiconductor substrate. A light receiving surface of the photoelectric conversion element is located on a second surface side of the semiconductor substrate. The solid-state image pickup device includes a first terminal exposed from the second surface side of the semiconductor substrate, and a second terminal electrically connected to the first terminal and connectable to an external device on the first surface side of the semiconductor substrate.Type: GrantFiled: July 2, 2008Date of Patent: December 28, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Mie Matsuo, Yusuke Kohyama
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Publication number: 20100155796Abstract: A semiconductor device includes a semiconductor substrate, a back side drawn electrode formed by embedding a first conductive material in a contact hole penetrating the semiconductor substrate through an insulating film formed to include a uniform thickness, used also as an alignment mark, and configured to draw out an electrode to the back side of the semiconductor substrate. The device further includes a pad provided on the back side of the semiconductor substrate, and connected to the back side drawn electrode.Type: ApplicationFiled: December 15, 2009Publication date: June 24, 2010Inventors: Hidetoshi KOIKE, Yusuke Kohyama
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Patent number: 7696537Abstract: A device, and method for manufacturing the same, including a PFET having an embedded SiGe layer where a shallow portion of the SiGe layer is closer to the PFET channel and a deep portion of the SiGe layer is further from the PFET channel. Thus, the SiGe layer has a boundary on the side facing toward the channel that is tapered. Such a configuration may allow the PFET channel to be compressively stressed by a large amount without necessarily substantially degrading extension junction characteristics. The tapered SiGe boundary may be configured as a plurality of discrete steps. For example, two, three, or more discrete steps may be formed.Type: GrantFiled: April 18, 2005Date of Patent: April 13, 2010Assignee: Toshiba America Electronic Components, Inc.Inventor: Yusuke Kohyama
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Publication number: 20100025738Abstract: A charge accumulation region of a first conductivity type is buried in a semiconductor substrate. A charge transfer destination diffusion layer of the first conductivity type is formed on a surface of the semiconductor substrate. A transfer gate electrode is formed on the charge accumulation region, and charge is transferred from the charge accumulation region to the charge transfer destination diffusion layer.Type: ApplicationFiled: July 27, 2009Publication date: February 4, 2010Inventor: Yusuke KOHYAMA
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Publication number: 20100006973Abstract: A semiconductor device with STIs separating HOT regions is described. Processes for eliminating voids due to misalignments in boundary region STIs are described.Type: ApplicationFiled: March 12, 2009Publication date: January 14, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Yusuke KOHYAMA
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Publication number: 20090315132Abstract: In a solid-state image pick up device, a first conduction type semiconductor layer which has a first surface side. A second surface side which is located the opposite side of the first surface side and an image sensor area. A photo-conversion area which is configured in the first surface side and charges electron by photoelectric conversion. A first diffusion area of second conduction type for isolation, wherein the first diffusion area surrounds the photo-conversion area and extends from the first surface side to the middle part of the semiconductor layer and a second diffusion area of second conduction type for isolation, wherein the second diffusion area extends from the second surface side to the bottom of the first diffusion layer.Type: ApplicationFiled: June 17, 2009Publication date: December 24, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Yusuke KOHYAMA