Patents by Inventor Yusuke Masuda

Yusuke Masuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140362301
    Abstract: A liquid crystal display device 10 includes an LED 17, a liquid crystal panel 11, a gate flexible boards 28 connected to an end portion of the liquid crystal panel 11, a light guide plate 16 arranged so as to overlap the liquid crystal panel 11, an optical member 15 arranged between the liquid crystal panel 11 and the light guide plate 16, a holding member HM including a frame 13 and a chassis 14 that hold the liquid crystal panel 11, the optical member 15, and the light guide plate 16, a light blocking portion 23A including a gate flexible board insertion recess 29, and a light restriction portion 30 provided to the optical member 15 and arranged in the gate flexible board insertion recess 29. The light blocking portion 23A blocks light on the outer side thereof from directly entering the end portion of the liquid crystal panel 11. The light restriction portion 30 restricts the light from directly entering the end portion of the liquid crystal panel 11 through the gate flexible board insertion recess 29.
    Type: Application
    Filed: December 27, 2012
    Publication date: December 11, 2014
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yusuke Masuda, Masatoshi Tomomasa
  • Publication number: 20130337202
    Abstract: Disclosed are a multilayer styrenic resin sheet including 10 to 50 laminated layers which are each made of a styrenic resin composition that includes 29 to 65 mass % of a styrene/conjugated diene copolymer (A), 51 to 15 mass % of a polystyrene resin (B) and 20 to 9 mass % of an impact-resistant polystyrene resin (C) and which each have an average thickness of 2 to 50 ?m; and a packaging material (such as carrier tape or tray) for electronic components which is formed from the multilayer styrenic resin sheet. The melt tension of the styrenic resin composition at 220° C. is preferably 10 to 30 mN, and the content of the conjugated diene is preferably 10 to 25 mass % relative to 100 mass % of the copolymer (A).
    Type: Application
    Filed: January 16, 2012
    Publication date: December 19, 2013
    Applicant: DENKI KAGAKU KOGYO KABUSHIKI KAISHA
    Inventors: Yutaka Aoki, Atsushi Takei, Yasushi Hirokawa, Yusuke Masuda
  • Publication number: 20130285994
    Abstract: A liquid crystal display device includes: a display control unit configured to cause the liquid crystal panel to display a right eye image and a left eye image in an alternating manner; and a polarity control unit configured to cause the polarity of the drive voltage for the liquid crystal panel to be reversed. The polarity control unit causes the polarity of the drive voltage to be reversed such that, in one cycle including a number of display frames for right and left eye images, the number being a multiple of 8, the combination of polarities for image display in one pair of display frames composed of right and left eye images is one of four combinations and a number of occurrences of each of the four combinations is equal.
    Type: Application
    Filed: January 5, 2012
    Publication date: October 31, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Yusuke Masuda
  • Publication number: 20130251970
    Abstract: A surface conductive thermoplastic resin sheet and a molded member, such as an embossed carrier tape, using the sheet, in which burr- and flash-related faults are prevented, whatever the molding equipment, by a slitting method or punching when embossing. Provided is a conductive multilayered sheet, and an electronic component package, a carrier tape and a tray consisting of the conductive multilayered sheet, wherein respective layers with a mean thickness of 2 to 50 ?m are composed of a thermoplastic resin, or a resin composition having the thermoplastic resin as a main component, and wherein a conductive resin layer consisting of 65 to 95 wt % of a thermoplastic resin, or a resin composition having the thermoplastic resin as a main component, and 5 to 35 wt % of carbon black, on one side or both sides of the base sheet consisting of multiple layers wherein 10 to 50 respective layers are layered.
    Type: Application
    Filed: October 6, 2011
    Publication date: September 26, 2013
    Applicant: DENKI KAGAKU KOGYO KABUSHIKI KAISHA
    Inventors: Yutaka Aoki, Atsushi Takei, Yasushi Hirokawa, Yusuke Masuda
  • Patent number: 7292448
    Abstract: A circuit substrate includes a first rigid substrate having a plurality of land portions located at a predetermined interval on one surface, a second rigid substrate having a plurality of second land portions located at a predetermined interval on one surface and a flexible wiring board sandwiched by the first and second rigid substrates and which has a plurality of third land portions corresponding to the first land portions on one surface and a plurality of fourth land portions corresponding to the second land portions on the other surface. In this circuit substrate, the second and fourth land portions are displaced from each other relative to the first and third land portions and at least part of the first and third land portions and at least part of the second and fourth land portions are electrically connected to each other, respectively.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: November 6, 2007
    Assignee: Sony Corporation
    Inventors: Toshichika Urushibara, Koji Shiozawa, Masakazu Okabe, Yukiko Hyodo, Yusuke Masuda, Tadayuki Miyamoto
  • Publication number: 20070081309
    Abstract: A circuit substrate includes a first rigid substrate having a plurality of land portions located at a predetermined interval on one surface, a second rigid substrate having a plurality of second land portions located at a predetermined interval on one surface and a flexible wiring board sandwiched by the first and second rigid substrates and which has a plurality of third land portions corresponding to the first land portions on one surface and a plurality of fourth land portions corresponding to the second land portions on the other surface. In this circuit substrate, the second and fourth land portions are displaced from each other relative to the first and third land portions and at least part of the first and third land portions and at least part of the second and fourth land portions are electrically connected to each other, respectively.
    Type: Application
    Filed: August 24, 2006
    Publication date: April 12, 2007
    Applicant: Sony Corporation
    Inventors: Toshichika Urushibara, Koji Shiozawa, Masakazu Okabe, Yukiko Hyodo, Yusuke Masuda, Tadayuki Miyamoto
  • Patent number: 4962486
    Abstract: A plurality of slide access memories (SM.sub.00, SM.sub.01, . . . , SM.sub.n-1, m-1), in which a voluntary rectangular group of bits can be accessed, are arranged in an n-rows and m-columns matrix and connected to common data lines (D.sub.0, D.sub.1, . . . , D.sub.15). A first access means accesses the same rectangular group of bits in each of the slide access memories and interconnects these groups to input/output portions incorporated into each of the slide access memories. A second access means selects the input/output portions of each of the slide access memories to enable or disable the operation thereof in accordance with a special bit position, or a pointing bit (PB) position, to thereby connect only a desired group of bits to common data lines, and thus enlarge the scope of slide access memories.
    Type: Grant
    Filed: June 8, 1988
    Date of Patent: October 9, 1990
    Assignee: Fujitsu Limited
    Inventors: Yusuke Masuda, Junji Ogawa