Patents by Inventor Yusuke Matsunaga

Yusuke Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10520549
    Abstract: A semiconductor device includes a system bus, a plurality of Central Processing Unit (CPU) cores each connected to the system bus, including a scan chain, and being assigned one or more tasks and configured to perform one of the tasks in a normal operation state, and a diagnostic test circuit connected to the system bus and capable of communicating with the plurality of the CPU cores, and configured to perform a scan test for the plurality of the CPU cores by using the scan chain. The plurality of the CPU cores outputs a test start instruction signal to the diagnostic test circuit, when the test start instruction signal is output from one of the plurality of the CPU cores, the diagnostic test circuit performs a scan test for the one of the plurality of the CPU cores in accordance with the test start instruction signal.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: December 31, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yukitoshi Tsuboi, Hideo Nagano, Hiroshi Nagaoka, Yusuke Matsunaga, Yutaka Igaku, Naotaka Kubota
  • Patent number: 10443110
    Abstract: A high toughness and high tensile strength thick steel plate has a plate thickness of 100 mm or more, wherein a reduction of area in a center of the plate thickness by tension in a plate thickness direction is 40% or more. Thus, a high tensile strength thick steel plate with excellent strength and toughness in a center of the plate thickness can be obtained with no need for a larger production line, even in the case of producing a high strength thick steel plate for which the addition amount of alloying element needs to be increased.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: October 15, 2019
    Assignee: JFE Steel Corporation
    Inventors: Shigeki Kitsuya, Katsuyuki Ichimiya, Kazukuni Hase, Teruhisa Kinugawa, Naoki Matsunaga, Kenji Hayashi, Masayuki Horie, Yusuke Terazawa, Shigeru Endo
  • Patent number: 10433541
    Abstract: Provided are an antibacterial liquid having excellent sedimentation resistance, an antibacterial film formed using the antibacterial liquid, and a wet wipe produced using the antibacterial liquid. The antibacterial liquid is an antibacterial liquid including antibacterial microparticles, a binder, and a solvent, in which the antibacterial microparticles contain a silver-supporting inorganic oxide, the average particle size of the antibacterial microparticles is 1.0 ?m or less, the binder includes at least one silane compound, the solvent includes an alcohol and water, and the content of the alcohol with respect to the total mass of the antibacterial liquid is 10% by mass or more.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: October 8, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Mitsumasa Hamano, Naohiro Matsunaga, Yusuke Hatanaka
  • Publication number: 20190305654
    Abstract: A method of manufacturing a stacked core includes: forming a stack by stacking a plurality of core members, each of the plurality of core members including one or more blanked members blanked by a die from a metal plate along a predetermined shape; removing one core member of the plurality of core members from the stack; supplying adhesive to the one core member removed from the stack; and stacking the one core member next to an adjacent core member of the plurality of core members so that the adhesive is placed between the one core member and the adjacent core member.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 3, 2019
    Applicant: Mitsui High-tec, Inc.
    Inventors: Satoshi MATSUBAYASHI, Yukio MATSUNAGA, Yusuke HASUO, Yusuke ETO, Hayato NAKAYAMA
  • Publication number: 20190262509
    Abstract: According to the present invention, there is provided a membrane for immunoisolation, including a porous membrane that contains a polymer, in which Formulas (I) and (II) are satisfied for at least one surface of the porous membrane, B/A?0.7 (I) and A?0.015 (II) (in the formula, A represents a ratio of an N element to a C element on a surface of the membrane, and B represents a ratio of the N element to the C element at a depth of 30 nm from the surface of the membrane); a chamber for transplantation for enclosing a biological constituent therein, including the above-described membrane for immunoisolation on at least a part of a surface forming an inside and an outside of the chamber for transplantation; and a device for transplantation includes the above-described chamber for transplantation enclosing the above-described biological constituent therein. The membrane for immunoisolation of the present invention has a high bioaffinity.
    Type: Application
    Filed: May 10, 2019
    Publication date: August 29, 2019
    Applicant: FUJIFILM Corporation
    Inventors: Yusuke MOCHIZUKI, Kentaro NAKAMURA, Shigeaki OHTANI, Naohiro MATSUNAGA, Ryuta TAKEGAMI
  • Publication number: 20190262122
    Abstract: According to the present invention, there are provided a membrane for immunoisolation, including: a porous membrane that contains a polymer, in which the porous membrane includes a layered compact portion where a pore diameter is the smallest within the membrane, and a pore diameter continuously increases in a thickness direction from the compact portion toward at least one surface of the porous membrane; a chamber for transplantation for enclosing a biological constituent therein, including the above-described membrane for immunoisolation on at least a part of a surface forming an inside and an outside of the chamber for transplantation; and a device for transplantation, including the above-described chamber for transplantation enclosing the biological constituent therein. In the membrane for immunoisolation of the present invention which can be manufactured at low costs, a deterioration in substance permeability is unlikely to occur.
    Type: Application
    Filed: May 10, 2019
    Publication date: August 29, 2019
    Applicant: FUJIFILM Corporation
    Inventors: Yusuke MOCHIZUKI, Kentaro NAKAMURA, Shigeaki OHTANI, Naohiro MATSUNAGA, Ryuta TAKEGAMI
  • Publication number: 20180080984
    Abstract: A semiconductor device includes a system bus, a plurality of Central Processing Unit (CPU) cores each connected to the system bus, including a scan chain, and being assigned one or more tasks and configured to perform one of the tasks in a normal operation state, and a diagnostic test circuit connected to the system bus and capable of communicating with the plurality of the CPU cores, and configured to perform a scan test for the plurality of the CPU cores by using the scan chain. The plurality of the CPU cores outputs a test start instruction signal to the diagnostic test circuit, when the test start instruction signal is output from one of the plurality of the CPU cores, the diagnostic test circuit performs a scan test for the one of the plurality of the CPU cores in accordance with the test start instruction signal.
    Type: Application
    Filed: November 1, 2017
    Publication date: March 22, 2018
    Inventors: Yukitoshi TSUBOI, Hideo NAGANO, Hiroshi NAGAOKA, Yusuke MATSUNAGA, Yutaka IGAKU, Naotaka KUBOTA
  • Patent number: 9810738
    Abstract: Deterioration in operation performance due to a fault diagnosis is prevented. A semiconductor device 90 according to the present invention includes a plurality of CPU cores 91 to 94 each including a scan chain, and a diagnostic test circuit 95 that performs a scan test for the plurality of CPU cores 91 to 94 by using the scan chain of the CPU core. The diagnostic test circuit 95 performs a scan test for each of the plurality of CPU cores 91 to 94 in a predetermined order on a periodic basis so that execution time periods of the scan tests do not overlap each other.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: November 7, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Yukitoshi Tsuboi, Hideo Nagano, Hiroshi Nagaoka, Yusuke Matsunaga, Yutaka Igaku, Naotaka Kubota
  • Publication number: 20150293173
    Abstract: Deterioration in operation performance due to a fault diagnosis is prevented. A semiconductor device 90 according to the present invention includes a plurality of CPU cores 91 to 94 each including a scan chain, and a diagnostic test circuit 95 that performs a scan test for the plurality of CPU cores 91 to 94 by using the scan chain of the CPU core. The diagnostic test circuit 95 performs a scan test for each of the plurality of CPU cores 91 to 94 in a predetermined order on a periodic basis so that execution time periods of the scan tests do not overlap each other.
    Type: Application
    Filed: April 1, 2015
    Publication date: October 15, 2015
    Inventors: Yukitoshi TSUBOI, Hideo NAGANO, Hiroshi NAGAOKA, Yusuke MATSUNAGA, Yutaka IGAKU, Naotaka KUBOTA
  • Patent number: 7490271
    Abstract: A trace chip monitors a signal between a target logic chip having a data processing circuit mounted thereon and a memory chip having a memory storing data to be used by the target logic chip mounted therein, and traces an operation of the target logic chip. As the trace chip is implemented by a chip separate from the target logic chip and a memory chip, a debugging circuit need not be added to mass-produced articles when the trace chip is not mounted to the mass-produced articles. Thus, manufacturing cost of the articles can be reduced.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: February 10, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Motoki Higashida, Yusuke Matsunaga
  • Patent number: 7260893
    Abstract: A secondary heat exchanger subassembly, such as a transmission oil cooler, is disposed in a metal tank of a radiator and has a pair of metal fluid fittings. Either a connector ring engages a fitting extending through the opening in the tank or a connector nut extends into the opening to threadedly engage the fitting whereby the metal fittings are held to the metal tank and inserted into a furnace for being brazed into sealed relationship with the metal tank.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: August 28, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Chris A. Calhoun, Terry Joseph Hunt, David A. Southwick, Karl Paul Kroetsch, Krzysztof Wawrocki, Khalid El Moutamid, Yusuke Matsunaga, Laurent Art
  • Patent number: 7147040
    Abstract: A heat exchanger is disclosed. A plurality of guides are integrally formed with the walls of a header tank and are used to position an oil cooler inside the tank to align a pair of fittings carried by the cooler with a pair of spaced openings in the tank.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: December 12, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Chris A. Calhoun, Terry Joseph Hunt, David A. Southwick, Karl Paul Kroetsch, Krzysztof Wawrocki, Khalid El Moutamid, Yusuke Matsunaga, Laurent Art
  • Patent number: 7146543
    Abstract: A trace chip monitors a signal between a target logic chip having a data processing circuit mounted thereon and a memory chip having a memory storing data to be used by the target logic chip mounted therein, and traces an operation of the target logic chip. As the trace chip is implemented by a chip separate from the target logic chip and a memory chip, a debugging circuit need not be added to mass-produced articles when the trace chip is not mounted to the mass-produced articles. Thus, manufacturing cost of the articles can be reduced.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: December 5, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Motoki Higashida, Yusuke Matsunaga
  • Publication number: 20060271828
    Abstract: A trace chip monitors a signal between a target logic chip having a data processing circuit mounted thereon and a memory chip having a memory storing data to be used by the target logic chip mounted therein, and traces an operation of the target logic chip. As the trace chip is implemented by a chip separate from the target logic chip and a memory chip, a debugging circuit need not be added to mass-produced articles when the trace chip is not mounted to the mass-produced articles. Thus, manufacturing cost of the articles can be reduced.
    Type: Application
    Filed: July 27, 2006
    Publication date: November 30, 2006
    Inventors: Motoki Higashida, Yusuke Matsunaga
  • Patent number: 7059050
    Abstract: A metal tank cap is integral with a reinforcing member via a narrow connection and is flared outwardly at the narrow connection portion to be over an open end of the tank simultaneously with moving the metal tubes of the core into the tank. By unbending the connection portion, the respective tank caps are deflared into the open ends of the respective tanks and the entire assembly is placed in a furnace and brazed together.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: June 13, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Chris A. Calhoun, Terry Joseph Hunt, David A. Southwick, Karl Paul Kroetsch, Krzysztof Wawrocki, Khalid El Moutamid, Yusuke Matsunaga, Laurent Art
  • Patent number: 7007743
    Abstract: A one-piece header tank includes side edges that are overlapped and brazed together to form a joint positioned within the interior of the tank. The tank also includes an integrally formed mounting flange that may be fabricated without jeopardizing the leak integrity of the tank.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: March 7, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Chris A. Calhoun, Terry Joseph Hunt, David A. Southwick, Karl Paul Kroetsch, Krzysztof Wawrocki, Khalid El Moutamid, Yusuke Matsunaga, Laurent Art
  • Publication number: 20050150646
    Abstract: A heat exchanger is disclosed. A plurality of guides are integrally formed with the walls of a header tank and are used to position an oil cooler inside the tank to align a pair of fittings carried by the cooler with a pair of spaced openings in the tank.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 14, 2005
    Inventors: Chris Calhoun, Terry Hunt, David Southwick, Karl Kroetsch, Krzysztof Wawrocki, Khalid Moutamid, Yusuke Matsunaga, Laurent Art
  • Publication number: 20050150647
    Abstract: A secondary heat exchanger subassembly, such as a transmission oil cooler, is disposed in a metal tank of a radiator and has a pair of metal fluid fittings. Either a connector ring engages a fitting extending through the opening in the tank or a connector nut extends into the opening to threadedly engage the fitting whereby the metal fittings are held to the metal tank and inserted into a furnace for being brazed into sealed relationship with the metal tank.
    Type: Application
    Filed: January 9, 2004
    Publication date: July 14, 2005
    Inventors: Chris Calhoun, Terry Hunt, David Southwick, Karl Kroetsch, Krzysztof Wawrocki, Khalid Moutamid, Yusuke Matsunaga, Laurent Art
  • Publication number: 20050150641
    Abstract: A metal tank cap is integral with a reinforcing member via a narrow connection and is flared outwardly at the narrow connection portion to be over an open end of the tank simultaneously with moving the metal tubes of the core into the tank. By unbending the connection portion, the respective tank caps are deflared into the open ends of the respective tanks and the entire assembly is placed in a furnace and brazed together.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 14, 2005
    Inventors: Chris Calhoun, Terry Hunt, David Southwick, Karl Kroetsch, Krzysztof Wawrocki, Khalid Moutamid, Yusuke Matsunaga, Laurent Art
  • Publication number: 20050103485
    Abstract: A one-piece header tank includes side edges that are overlapped and brazed together to form a joint positioned within the interior of the tank. The tank also includes an integrally formed mounting flange that may be fabricated without jeopardizing the leak integrity of the tank.
    Type: Application
    Filed: November 17, 2003
    Publication date: May 19, 2005
    Inventors: Chris Calhoun, Terry Hunt, David Southwick, Karl Kroetsch, Krzysztof Wawrocki, Khalid Moutamid, Yusuke Matsunaga, Laurent Art