Patents by Inventor Yusuke NEGORO
Yusuke NEGORO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12659621Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.Type: GrantFiled: October 9, 2024Date of Patent: June 16, 2026Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunsuke Sato, Seiichi Yoneda, Yusuke Negoro, Takeya Hirose, Shunpei Yamazaki
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Patent number: 12660239Abstract: An imaging device having an image processing function is provided. The imaging device includes a plurality of pixels. The pixel has a function of generating first data of an n-th frame by supplying a first weight to image data obtained in the n-th frame (n is an integer greater than or equal to 2). The pixel has a function of generating first data of an n?1-th frame by supplying a second weight to image data obtained in the n?1-th frame. The pixel has a function of generating second data by adding the first data of the n?1-th frame and the first data of the n-th frame.Type: GrantFiled: April 19, 2021Date of Patent: June 16, 2026Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yusuke Negoro, Seiichi Yoneda, Shunpei Yamazaki
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Patent number: 12644989Abstract: An object is to obtain accurate distance image data by denoising. Another object is to realize distance image data acquisition in a short time by reducing the frequency of accumulating. A distance image processing system including a solid-state imaging element that can be used for three-dimensionally recognizing an object is provided for the utilization of autonomous driving of passenger cars, for example. Image processing including distance information obtained by a TOF system solid-state imaging element, a so-called TOF camera, is performed by utilizing deep learning. A high-accurate distance image with noise reduced by deep learning can be obtained.Type: GrantFiled: August 7, 2020Date of Patent: June 2, 2026Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yusuke Negoro, Seiichi Yoneda
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Patent number: 12495629Abstract: A small-sized and highly functional imaging device is provided. The imaging device includes a photoelectric conversion device formed on a silicon substrate and a transistor including a channel formation region in a silicon epitaxial growth layer formed on the silicon substrate. The transistor provided in the epitaxial growth layer has favorable electrical characteristics, so that the imaging device with little noise can be formed. Since the transistor can be formed so as to have a region overlapping with the photoelectric conversion device, the imaging device can be downsized.Type: GrantFiled: February 8, 2021Date of Patent: December 9, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Seiichi Yoneda, Hiroki Inoue, Yusuke Negoro, Takayuki Ikeda, Shunpei Yamazaki
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Publication number: 20250344413Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel portion, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel portion and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, so that power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are formed to be stacked; therefore, the length of a wiring between the circuits can be shortened, and a low-power consumption operation and a high-speed operation can be performed.Type: ApplicationFiled: July 10, 2025Publication date: November 6, 2025Inventors: Yusuke NEGORO, Hideaki SHISHIDO
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Patent number: 12426435Abstract: A multifunctional imaging device is provided. The imaging device includes first to fourth light-receiving elements and first and second functional layers. The first to fourth light-receiving elements are photoelectric conversion elements having sensitivity to light of different wavelengths from each other. The first and second functional layers each include first and second transistors. The first functional layer and the fourth to first light-receiving elements are stacked in this order over the second functional layer. In each of the first to fourth light-receiving elements, a first conductive layer, a first buffer layer, a photoelectric conversion layer, a second buffer layer, and a second conductive layer are stacked in this order. The photoelectric conversion layer includes an organic compound, and the first buffer layer and the second buffer layer each include a metal or an organic compound.Type: GrantFiled: February 3, 2021Date of Patent: September 23, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yusuke Negoro, Seiichi Yoneda, Hiroki Inoue, Shunsuke Sato, Shunpei Yamazaki
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Patent number: 12396181Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel portion, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel portion and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, so that power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are formed to be stacked; therefore, the length of a wiring between the circuits can be shortened, and a low-power consumption operation and a high-speed operation can be performed.Type: GrantFiled: September 9, 2021Date of Patent: August 19, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yusuke Negoro, Hideaki Shishido
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Patent number: 12376410Abstract: The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. A first stacked body is formed in which a circuit provided with a transistor including a metal oxide in its channel formation region (hereinafter, OS transistor) is stacked over a circuit including a Si transistor. A second stacked body is formed in which an OS transistor is provided over a Si photodiode. Layers including the OS transistors of the first stacked body and the second stacked body are bonded to each other to obtain electrical connection between circuits. With such a structure, even when a structure is employed in which a plurality of circuits having different functions are stacked, the number of polishing steps and bonding steps can be reduced, improving the yield.Type: GrantFiled: June 22, 2020Date of Patent: July 29, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yusuke Negoro, Seiichi Yoneda
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Patent number: 12362732Abstract: A semiconductor device with a small circuit scale is provided. The semiconductor device includes a first circuit and a second circuit. The first circuit includes first to n-th (n is an integer of 2 or more) transistors and the second circuit includes (n+1)-th to 2n-th transistors. The first to n-th transistors are connected in parallel to each other and the (n+1)-th to 2n-th transistors are connected in series to each other. First to n-th signals are supplied to the first circuit and the second circuit. The first circuit has a function of outputting a first potential when each of potentials of the first to n-th signals is lower than or equal to a first reference potential, and outputting a second potential when at least one of the potentials of the first to n-th signals is higher than the first reference potential.Type: GrantFiled: November 16, 2020Date of Patent: July 15, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Inoue, Seiichi Yoneda, Yusuke Negoro
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Publication number: 20250159384Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device has an additional function such as image processing, and can retain analog data obtained by an image capturing operation in pixels and extract data obtained by multiplying the analog data by a given weight coefficient. In the imaging device, the data is stored in a memory cell and pooling processing of data stored in a plurality of memory cells can be performed. The pixels are provided so as to have a region overlapping with at least one of the memory cells, a pooling processing circuit, and a reading circuit of the pixels; thus, an increase in the area of the imaging device can be inhibited even with an additional function.Type: ApplicationFiled: January 15, 2025Publication date: May 15, 2025Inventors: Seiichi YONEDA, Yusuke NEGORO, Takeya HIROSE, Shunsuke SATO, Shunpei YAMAZAKI
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Publication number: 20250151428Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.Type: ApplicationFiled: January 8, 2025Publication date: May 8, 2025Inventors: Takayuki IKEDA, Yoshiyuki KUROKAWA, Shintaro HARADA, Hidetomo KOBAYASHI, Roh YAMAMOTO, Kiyotaka KIMURA, Takashi NAKAGAWA, Yusuke NEGORO
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Publication number: 20250088769Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.Type: ApplicationFiled: October 9, 2024Publication date: March 13, 2025Inventors: Shunsuke SATO, Seiichi YONEDA, Yusuke NEGORO, Takeya HIROSE, Shunpei YAMAZAKI
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Patent number: 12225314Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device has an additional function such as image processing, and can retain analog data obtained by an image capturing operation in pixels and extract data obtained by multiplying the analog data by a given weight coefficient. In the imaging device, the data is stored in a memory cell and pooling processing of data stored in a plurality of memory cells can be performed. The pixels are provided so as to have a region overlapping with at least one of the memory cells, a pooling processing circuit, and a reading circuit of the pixels; thus, an increase in the area of the imaging device can be inhibited even with an additional function.Type: GrantFiled: April 9, 2021Date of Patent: February 11, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Seiichi Yoneda, Yusuke Negoro, Takeya Hirose, Shunsuke Sato, Shunpei Yamazaki
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Patent number: 12212873Abstract: The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. The imaging device is formed in such a manner that a first stacked body in which a plurality of devices are stacked and a second stacked body in which a plurality of devices are stacked are bonded to each other. For example, a pixel circuit, a driver circuit of a pixel, and the like can be provided in the first stacked body, and a reading circuit of the pixel circuit, a memory circuit, a driver circuit of the memory circuit, and the like can be provided in the second stacked body. With these structures, the imaging device which is small can be formed. Furthermore, wiring delay or the like can be prevented by stacking circuits, so that high-speed operation can be performed.Type: GrantFiled: September 13, 2021Date of Patent: January 28, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yusuke Negoro, Hideaki Shishido
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Patent number: 12205965Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.Type: GrantFiled: August 9, 2023Date of Patent: January 21, 2025Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Shintaro Harada, Hidetomo Kobayashi, Roh Yamamoto, Kiyotaka Kimura, Takashi Nakagawa, Yusuke Negoro
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Patent number: 12132060Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and extract data obtained by multiplying the analog data by a predetermined weight coefficient. When the data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.Type: GrantFiled: June 5, 2020Date of Patent: October 29, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Seiichi Yoneda, Yusuke Negoro
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Patent number: 12126344Abstract: A semiconductor device with low power consumption can be provided. The semiconductor device includes a differential circuit and a latch circuit, the differential circuit includes a transistor including an oxide semiconductor in a channel formation region, and the latch circuit includes a transistor including a single semiconductor or a compound semiconductor in a channel formation region. The differential circuit and the latch circuit include an overlap region.Type: GrantFiled: July 12, 2021Date of Patent: October 22, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takeya Hirose, Seiichi Yoneda, Yusuke Negoro
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Patent number: 12120446Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.Type: GrantFiled: July 12, 2021Date of Patent: October 15, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunsuke Sato, Seiichi Yoneda, Yusuke Negoro, Takeya Hirose, Shunpei Yamazaki
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Patent number: 12080736Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device, which has an additional function such as image processing, can retain analog data obtained by an image capturing operation in a pixel and extract data obtained by multiplying the analog data by a predetermined weight coefficient. In the imaging device, some of potentials used for an arithmetic operation in pixels are generated by redistribution of charge with which wirings are charged. This enables an arithmetic operation to be performed at high speed with low power consumption, compared with the case where the potentials are supplied from another circuit to the pixels.Type: GrantFiled: August 7, 2020Date of Patent: September 3, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Seiichi Yoneda, Yusuke Negoro, Takayuki Ikeda, Shunpei Yamazaki
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Patent number: 12041800Abstract: An imaging device having a color imaging function and an infrared imaging function is provided. The imaging device has a structure in which a first photoelectric conversion device and a second photoelectric conversion device are stacked, and the second photoelectric conversion device generates electric charge by absorbing infrared light and transmits light having a wavelength of a higher energy than that of infrared light. The first photoelectric conversion device is positioned to overlap with the second photoelectric conversion device, and generates electric charge by absorbing light (visible light) passing through the second photoelectric conversion device. Thus, a subpixel for color imaging and a subpixel for infrared imaging can be positioned to overlap with each other, and an infrared imaging function can be added without a decrease in the definition of color imaging.Type: GrantFiled: November 11, 2020Date of Patent: July 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuro Kanemura, Yusuke Negoro