Patents by Inventor Yusuke Ota

Yusuke Ota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130071127
    Abstract: A digital burst mode communication system operates at a fixed wavelength for transmission and reception of burst mode signals using a pair of transceivers and a single optical cable. The stray noise level in the system is significantly reduced by use of angled plate absorbers that receive scattered transmission burst signal from a 45 degree partially reflecting mirror. Isolation of received burst signal from transmitted burst signal is increased to better than 30 dB. The system operates by sending only data bits across the single optical cable without scrambling or encoding preambles, significantly improving the efficiency of high speed communication.
    Type: Application
    Filed: September 15, 2011
    Publication date: March 21, 2013
    Inventors: Yusuke Ota, Kenichiro Takeuchi
  • Patent number: 8355634
    Abstract: An optical network unit useful in a passive optical network has capability for automatic shutdown upon detection of a malfunction, thereby protecting the integrity of upstream data transmitted in the network. The unit detects the generation of upstream light during intervals in which transmission is not authorized. In response, the light source of the unit is deactivated to prevent collisions with upstream data from other optical network units in the network.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: January 15, 2013
    Assignee: Go! Foton Holding, Inc.
    Inventors: Yusuke Ota, Wilhelm C. Fischer
  • Publication number: 20120273292
    Abstract: There is provided an electric power steering device for solving unsolved problems with ensuring advantages of a control device of motor housing mounting type and gearbox mounting type. An electric power steering device includes: a steering column in which a steering shaft for transmitting a steering torque is built; an electric motor for transmitting a steering assist force through a gear mechanism in a gearbox to the steering shaft; and a control device for driving and controlling the electric motor. The control device including at least: a drive circuit module including a switching element for driving the electric motor, and mounted on a housing of the electric motor; and a control module, mounted on the gearbox, for controlling the drive circuit module.
    Type: Application
    Filed: October 29, 2010
    Publication date: November 1, 2012
    Applicant: NSK LTD.
    Inventors: Takaaki Sekine, Shin Kumagai, Yusuke Ota, Yasuhiro Iwasaki, Yousuke Imamura, Yusuke Kikuchi
  • Patent number: 8222738
    Abstract: To provide a semiconductor device with improved reliability. The semiconductor device includes a wiring board, a microcomputer chip flip-chip bonded over the wiring board via gold bumps, a first memory chip laminated over the microcomputer chip, wires for coupling the first memory chip to the wiring board, an underfill material with which a flip-chip coupling portion of the microcomputer chip is filled, and a sealing member for sealing the microcomputer chip and the first memory chip with resin. Further, the corner of a second opening portion of a solder resist film of the wiring board corresponding to the corner of the chip on the air vent side in charging the underfill material is made close to the microcomputer chip, which can improve the wettability and spread of the underfill material at the second opening portion, thus reducing the exposure of leads to the second opening portion, thereby improving the reliability of the semiconductor device.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: July 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yusuke Ota, Michiaki Sugiyama, Toshikazu Ishikawa, Mikako Okada
  • Publication number: 20110300672
    Abstract: To provide a semiconductor device with improved reliability. The semiconductor device includes a wiring board, a microcomputer chip flip-chip bonded over the wiring board via gold bumps, a first memory chip laminated over the microcomputer chip, wires for coupling the first memory chip to the wiring board, an underfill material with which a flip-chip coupling portion of the microcomputer chip is filled, and a sealing member for sealing the microcomputer chip and the first memory chip with resin. Further, the corner of a second opening portion of a solder resist film of the wiring board corresponding to the corner of the chip on the air vent side in charging the underfill material is made close to the microcomputer chip, which can improve the wettability and spread of the underfill material at the second opening portion, thus reducing the exposure of leads to the second opening portion, thereby improving the reliability of the semiconductor device.
    Type: Application
    Filed: August 18, 2011
    Publication date: December 8, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yusuke OTA, Michiaki SUGIYAMA, Toshikazu ISHIKAWA, Mikako OKADA
  • Patent number: 8021932
    Abstract: To provide a semiconductor device with improved reliability. The semiconductor device includes a wiring board, a microcomputer chip flip-chip bonded over the wiring board via gold bumps, a first memory chip laminated over the microcomputer chip, wires for coupling the first memory chip to the wiring board, an underfill material with which a flip-chip coupling portion of the microcomputer chip is filled, and a sealing member for sealing the microcomputer chip and the first memory chip with resin. Further, the corner of a second opening portion of a solder resist film of the wiring board corresponding to the corner of the chip on the air vent side in charging the underfill material is made close to the microcomputer chip, which can improve the wettability and spread of the underfill material at the second opening portion, thus reducing the exposure of leads to the second opening portion, thereby improving the reliability of the semiconductor device.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: September 20, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Yusuke Ota, Michiaki Sugiyama, Toshikazu Ishikawa, Mikako Okada
  • Patent number: 7929654
    Abstract: A clock and data recovery circuit and method are used in a digital data communications system. The circuit and method are effectively employed for high speed, burst-mode transmission and allow rapid recovery of the clock and data signals without the need for an extended header, and notwithstanding the presence of substantial timing jitter. The method adaptively selects from among three delay times for the extraction of data by identifying a frequently recurring incoming pattern in the incoming data. The delay time is selected in a manner that insures that the same pattern is present in the reconstructed, resynchronized output data.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: April 19, 2011
    Assignee: Zenko Technologies, Inc.
    Inventors: Wilhelm C. Fischer, David A. Inglis, Yusuke Ota
  • Publication number: 20110044685
    Abstract: An optical network unit useful in a passive optical network has capability for automatic shutdown upon detection of a malfunction, thereby protecting the integrity of upstream data transmitted in the network. The unit detects the generation of upstream light during intervals in which transmission is not authorized. In response, the light source of the unit is deactivated to prevent collisions with upstream data from other optical network units in the network.
    Type: Application
    Filed: August 20, 2009
    Publication date: February 24, 2011
    Inventors: Yusuke Ota, Wilhelm C. Fischer
  • Publication number: 20110026922
    Abstract: A passive optical network system and method in which at least part of the data is optically transmitted through a single optical fiber using a wavelength division multiplexing technique, with a plurality of signals being carried through the fiber in each direction, a different wavelength being used for each of the multiplexed upstream and downstream signals. The system may be retrofitted into existing telecommunications system to provide a multi-fold increase in the available bandwidth of long-distance optical fiber transmission.
    Type: Application
    Filed: July 31, 2009
    Publication date: February 3, 2011
    Inventors: Yusuke Ota, Jangsun Kim
  • Publication number: 20100084215
    Abstract: A torque detector capable of achieving reduced size, a method of producing the same and an electric power steering device are provided.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 8, 2010
    Applicant: NSK Ltd.
    Inventors: Ikunori Sakatani, Atsushi Horikoshi, Atsuyoshi Asaka, Yasuhiro Kawai, Yusuke Ota
  • Publication number: 20100052608
    Abstract: During charging of a battery, the start-up of the main body of an apparatus due to the switching on of a controller leads to increased consumption of power and also leads to heating of the battery, and therefore it is not possible to pass a sufficient charging current. A main microcomputer 5 serving as a main control apparatus, a charging IC 2 that performs charging of a battery 6, and a charging microcomputer 3 are provided. The charging microcomputer 3 monitors the operation of the main microcomputer 5, and the charging microcomputer 3 prohibits the charging operation by the charging IC 2 if the main microcomputer 5 is operating, and permits the charging operation by the charging IC 2 if the main microcomputer 5 is not operating.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 4, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Yusuke Ota, Toshio Iwai, Yoshiharu Takemori
  • Publication number: 20090294978
    Abstract: To provide a semiconductor device with improved reliability. The semiconductor device includes a wiring board, a microcomputer chip flip-chip bonded over the wiring board via gold bumps, a first memory chip laminated over the microcomputer chip, wires for coupling the first memory chip to the wiring board, an underfill material with which a flip-chip coupling portion of the microcomputer chip is filled, and a sealing member for sealing the microcomputer chip and the first memory chip with resin. Further, the corner of a second opening portion of a solder resist film of the wiring board corresponding to the corner of the chip on the air vent side in charging the underfill material is made close to the microcomputer chip, which can improve the wettability and spread of the underfill material at the second opening portion, thus reducing the exposure of leads to the second opening portion, thereby improving the reliability of the semiconductor device.
    Type: Application
    Filed: April 27, 2009
    Publication date: December 3, 2009
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Yusuke OTA, Michiaki SUGIYAMA, Toshikazu ISHIKAWA, Mikako OKADA
  • Patent number: 7607468
    Abstract: In the case the die cut label sheet is mounted, by detection of threshold voltage of output signal of the photo sensor, each label provisionally adhered to a front surface of the die cut label sheet is fed to a print start position. In the case the unfixed-length roll sheet is mounted, if the feeding speed is less than 40 mm/sec, by detection of threshold voltage of output signal of the photo sensor, the feeding state of unfixed-length roll sheet is judged, or if the feeding speed is not less than 40 mm/sec, on the basis of voltage change for the predetermined potential difference portion of output signal of the photo sensor, the feeding state of unfixed-length roll sheet is judged.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: October 27, 2009
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Tsuyoshi Yamamoto, Yusuke Ota, Satoru Moriyama, Jun Jiang, Hirotsugu Unotoro
  • Publication number: 20090060107
    Abstract: A clock and data recovery circuit and method are used in a digital data communications system. The circuit and method are effectively employed for high speed, burst-mode transmission and allow rapid recovery of the clock and data signals without the need for an extended header, and notwithstanding the presence of substantial timing jitter. The method adaptively selects from among three delay times for the extraction of data by identifying a frequently recurring incoming pattern in the incoming data. The delay time is selected in a manner that insures that the same pattern is present in the reconstructed, resynchronized output data.
    Type: Application
    Filed: August 30, 2007
    Publication date: March 5, 2009
    Inventors: Wilhelm C. Fischer, David A. Inglis, Yusuke Ota
  • Patent number: 7499064
    Abstract: A display system is provided having an active matrix type display panel and includes first and second frame synchronization circuits and an OFF data output control circuit that output a display control signal, a scan control signal, and an OFF data output control signal based on display stopping signals for stopping image display. The data driver drives the data lines of the display panel, based on the OFF data output control signal, during a predetermined frame period that includes the second frame (the next after the first, which is the frame where the display stopping signal is input), then outputs a predetermined non-display voltage after the frame period ends. A scan driver scans scan lines of the display panel based on the scan control signal, and outputs the non-selecting voltage to all of the scan lines after the frame period ends.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: March 3, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Yusuke Ota
  • Patent number: 7417406
    Abstract: An electronic apparatus which detects when a battery having a different characteristic is mixed in a plurality of batteries accommodated therein. An average voltage V1 per battery of plural batteries connected in series and an average voltage V2 per battery at a connecting point halfway of those connected batteries are detected. A difference in voltage |V1?V2| between the average voltage V1 and average voltage V2 is compared with a tolerable voltage difference ?V. If it is determined that a battery having a different characteristic is mixed, the operation of the apparatus is interrupted and an alarm is displayed or the supply of power is shut down.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: August 26, 2008
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Takahiro Miwa, Yusuke Ota
  • Patent number: 7375713
    Abstract: A data driver is provided that comprises: a state controller that effects transition to any of multiple states including a display ON state, a display OFF state and a sleep state, then outputs a drive control signal associated with a state of a transition destination; and a drive circuit that drive the data lines using drive power corresponding to a drive signal based on the drive control signal. When first setting data is input during the sleep state, the state controller effects transition from the sleep state to the display OFF state, and when second setting data is input during the sleep state and is followed by input of the first setting data, the state controller effects transition from the sleep state to the display OFF state, then effects transition from the display OFF state to the display ON state.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: May 20, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Yusuke Ota
  • Publication number: 20070260948
    Abstract: A driver IC including: a plurality of output pads; and a plurality of signal switch circuits, each of the signal circuits being provided on one of signal paths respectively connected to the output pads, wherein each of the signal switch circuits switches between a first state (or a use state) in which a signal from an upstream side of the signal path is allowed to pass through the signal switch circuit and a second state (or an inspection state) in which a level pattern of signals from the output pads is fixed to an inspection level pattern, according to a control signal.
    Type: Application
    Filed: July 3, 2007
    Publication date: November 8, 2007
    Inventor: Yusuke Ota
  • Patent number: 7257755
    Abstract: A driver IC including: a plurality of output pads; and a plurality of signal switch circuits, each of the signal circuits being provided on one of signal paths respectively connected to the output pads, wherein each of the signal switch circuits switches between a first state (or a use state) in which a signal from an upstream side of the signal path is allowed to pass through the signal switch circuit and a second state (or an inspection state) in which a level pattern of signals from the output pads is fixed to an inspection level pattern, according to a control signal.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: August 14, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Yusuke Ota
  • Patent number: 7130005
    Abstract: An object of the invention is to provide a flat-panel display device, which has a sufficient shockproof characteristic and in which the number of component parts can be reduced so as to lower in cost. A chassis for a flat-panel display device in accordance with the invention supports a component member such as a flat-panel display element 500, and is characterized in that a main body of the chassis 100 comprises a plurality of roughly triangle openings 120 at least one side of which is adjacent and roughly parallel to a side of another opening 120 or an outer edge of the main body of the chassis 100.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: October 31, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiki Takata, Yusuke Ota, Katsuaki Yamada, Kenichi Iwamoto