Patents by Inventor Yusuke Yajima

Yusuke Yajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080089685
    Abstract: In a light reception element such as an APD (Avalanche Photo Diode) used for receiving a high-speed and weak optical signal, it is possible to prevent the phenomenon of distortion of a signal inputted after a large-level light is received. A PON (Passive Optical Network) system includes an OLT (Optical Line Terminal) which can impartially and effectively transmit light reception data to each ONU (Optical Network Unit). According to a light reception amplitude received by each ONU, an inter-frame gap of an appropriate length is assigned for each ONU. The OLT includes a unit for measuring and accumulating the reception light amplitude and data on the inter-frame gap of an appropriate length decided in advance according to the characteristic of the light reception device and generates a grant value for assuring an inter-frame gap of an appropriate length by using the both information.
    Type: Application
    Filed: March 29, 2007
    Publication date: April 17, 2008
    Inventors: Tohru Kazawa, Masaki Ohira, Yusuke Yajima, Akihiko Tsuchiya, Yoshinobu Morita
  • Publication number: 20080089686
    Abstract: A station-side communication device connected to subscriber-side communication devices via an optical combining device; sending, to the subscriber-side communication devices, a distance measurement request signal; computing transmission delay times of optical signals from the individual subscriber-side communication devices by receiving distance measurement signals, and including: a threshold control part identifying the level of distance measurement signals; a signal detection part detecting breaks in the distance measurement signals from the threshold control part; a transmission granting part determining the timing at which transmission of optical signals is granted, and a reset timing generation part that, there is notification of detection of a break in the distance measurement signal from the signal detection part while it is being notified that distance measurement is carried out to and from the subscriber-side communication devices from the transmission granting part, sends a reset signal indicating t
    Type: Application
    Filed: March 30, 2007
    Publication date: April 17, 2008
    Inventors: Tohru Kazawa, Masaki Ohira, Yusuke Yajima, Norihiro Sakamoto
  • Patent number: 7242015
    Abstract: An electron beam (area beam) having a fixed area is irradiated onto the surface of a semiconductor sample, and reflected electrons from the sample surface are imaged by the imaging lens, and images of a plurality of regions of the surface of the semiconductor sample are obtained and stored in the image storage unit, and the stored images of the plurality of regions are compared with each other, and the existence of a defect in the regions and the defect position are measured. By doing this, in an apparatus for testing a pattern defect of the same design, foreign substances, and residuals on a wafer in the manufacturing process of a semiconductor apparatus by an electron beam, speeding-up of the test can be realized.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: July 10, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Yusuke Yajima, Hisaya Murakoshi, Masaki Hasegawa, Mari Nozoe, Atsuko Takafuji, Katsuya Sugiyama, Katsuhiro Kuroda, Kaoru Umemura, Yasutsugu Usami
  • Patent number: 7239813
    Abstract: A bit synchronization circuit composed of a multiphase data sampling unit for converting each received burst data sets to multiphase data trains, a phase determination unit for generating a control signal indicating an optimum phase data train, an output data selector for selectively passing optimum phase data train indicated by the control signal, and a data synchronization unit for converting the optimum phase data train to a data train in synchronization with a reference clock. The phase determination unit repeatedly detecting the optimum phase data train during the same burst data set is received. When optimum phase varies, the output data selector dynamically switches the optimum phase data train to be supplied to the data synchronization unit.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: July 3, 2007
    Assignee: Hitachi Communication Technologies, Ltd.
    Inventors: Yusuke Yajima, Toshihiro Ashi, Tohru Kazawa
  • Publication number: 20070110445
    Abstract: In a known wavelength multiplexer, optical signals to pass are passed with their wavelengths held identical. Therefore, unless an unused wavelength common to all zones exists in case of setting an optical channel, the channel cannot be set. According to the present invention, a drop/add type wavelength multiplexer includes a wavelength converting section (50 in FIG. 5) which converts the wavelengths of optical signals to pass from the input side of the multiplexer to the output side thereof. In a network employing the wavelength multiplexers at individual nodes, a new optical channel can be easily set by utilizing wavelengths not used at the nodes.
    Type: Application
    Filed: September 11, 2006
    Publication date: May 17, 2007
    Inventors: Yusuke Yajima, Takashi Mori, Masatoshi Shibasaki
  • Patent number: 7184661
    Abstract: According to the invention, in a transmission apparatus, there are provided an equipment supervision unit detecting an obstacle in the equipment and a switching control unit controlling the switching operation of transmission lines. When the equipment supervision unit detects condition in which obstacles have occurred in more than one groups of the cross connect unit or the clock unit in which paths provided are disconnected, the same K-bytes as in the case when SF failure is detected are outputted to all the fibers to be inputted to the equipment. Alternatively, an FS-R command is executed to both sides, or Line-AIS is inserted in all the outputted transmission lines, or an output is disconnected, so that the equipment is isolated and the paths provided through a node is relieved.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: February 27, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Usuba, Yoshimi Nakagawa, Satoko Araki, Yusuke Yajima
  • Publication number: 20070030937
    Abstract: A bit synchronization circuit comprising an initial phase determining unit for rapidly determining, during a period of receiving a preamble of burst data, a clock with a phase synchronized with received burst data from among multi-phase clocks having the same frequency as an internal reference clock and a phase tracking unit for modifying the synchronized phase clock responsive to phase variation of received data during a period of receiving a payload of burst data by taking the synchronized phase clock determined by the initial phase determining unit as an initial phase. The bit synchronization circuit retimes burst data with a data retiming clock having a predetermined phase relation with the synchronized phase clock and outputs the burst data in synchronization with the internal reference clock.
    Type: Application
    Filed: December 13, 2005
    Publication date: February 8, 2007
    Inventors: Yusuke Yajima, Tohru Kazawa, Yoshihiro Ashi
  • Patent number: 7133614
    Abstract: In a known wavelength multiplexer, optical signals to pass are passed with their wavelengths held identical. Therefore, unless an unused wavelength common to all zones exists in case of setting an optical channel, the channel cannot be set. According to the present invention, a drop/add type wavelength multiplexer includes a wavelength converting section (50 in FIG. 5) which converts the wavelengths of optical signals to pass from the input side of the multiplexer to the output side thereof. In a network employing the wavelength multiplexers at individual nodes, a new optical channel can be easily set by utilizing wavelengths not used at the nodes.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: November 7, 2006
    Inventors: Yusuke Yajima, Takashi Mori, Masatoshi Shibasaki
  • Publication number: 20060192732
    Abstract: A plasma display panel and an imaging device realize a high luminous efficiency, a long lifetime and stable driving. The plasma display panel uses a discharge-gas mixture containing at least Xe, Ne and He. A Xe proportion of the discharge-gas mixture is in a range of from 2% to 20%, a He proportion of the discharge-gas mixture is in a range of from 15% to 50%, the He proportion is greater than the Xe proportion, and a total pressure of the discharge-gas mixture is in a range of from 400 Torr to 550 Torr. A width of a voltage pulse to be applied to an electrode serving as an address electrode is 2 ?s or less.
    Type: Application
    Filed: April 4, 2006
    Publication date: August 31, 2006
    Inventors: Norihiro Uemura, Keizo Suzuki, Hiroshi Kajiyama, Yusuke Yajima, Masayuki Shibata, Yoshimi Kawanami, Koji Ohira, Ikuo Ozaki
  • Patent number: 7071901
    Abstract: A plasma display panel and an imaging device realize a high luminous efficiency, a long lifetime and stable driving. The plasma display panel uses a discharge-gas mixture containing at least Xe, Ne and He. A Xe proportion of the discharge-gas mixture is in a range of from 2% to 20%, a He proportion of the discharge-gas mixture is in a range of from 15% to 50%, the He proportion is greater than the Xe proportion, and a total pressure of the discharge-gas mixture is in a range of from 400 Torr to 550 Torr. A width of a voltage pulse to be applied to an electrode serving as an address electrode is 2 ?s or less.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: July 4, 2006
    Assignees: Hitachi, Ltd., Fujitsu Hitachi Plasma Display Ltd.
    Inventors: Norihiro Uemura, Keizo Suzuki, Hiroshi Kajiyama, Yusuke Yajima, Masayuki Shibata, Yoshimi Kawanami, Koji Ohira, Ikuo Ozaki
  • Patent number: 7026830
    Abstract: To make possible the in-line inspection of a pattern of an insulating material. A patterned wafer 40 formed with a pattern by a resist film is placed on a specimen table 21 of a patterned wafer inspection apparatus 1 in opposed relation to a SEM 3. An electron beam 10 of a large current is emitted from an electron gun 11 and the pattern of the patterned wafer is scanned only once at a high scanning rate. The secondary electrons generated by this scanning from the patterned wafer are detected by a secondary electron detector 16 thereby to acquire an electron beam image. Using this electron beam image, the comparative inspection is conducted on the patterned wafer through an arithmetic operation unit 32 and a defect determining unit 33. Since an electron beam image of high contrast can be obtained by scanning an electron beam only once, a patterned wafer inspection method using a SEM can be implemented in the IC fabrication method.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: April 11, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Publication number: 20060043982
    Abstract: A circuit pattern inspection method and an apparatus therefor, in which the whole of a portion to be inspected of a sample to be inspected is made to be in a predetermined charged state, the portion to be inspected is irradiated with an image-forming high-density electron beam while scanning the electron beam, secondary charged particles are detected at a portion irradiated with the electron beam after a predetermined period of time from an instance when the electron beam is irradiated, an image is formed on the basis of the thus detected secondary charged particle signal, and the portion to be inspected is inspected by using the thus formed image.
    Type: Application
    Filed: November 9, 2005
    Publication date: March 2, 2006
    Inventors: Hiroyuki Shinada, Mari Nozoe, Haruo Yoda, Kimiaki Ando, Katsuhiro Kuroda, Yutaka Kaneko, Maki Tanaka, Shunji Maeda, Hitoshi Kubota, Aritoshi Sugimoto, Katsuya Sugiyama, Atsuko Takafuji, Yusuke Yajima, Hiroshi Tooyama, Tadao Ino, Takashi Hiroi, Kazushi Yoshimura, Yasutsugu Usami
  • Publication number: 20060017014
    Abstract: An electron beam (area beam) having a fixed area is irradiated onto the surface of a semiconductor sample, and reflected electrons from the sample surface are imaged by the imaging lens, and images of a plurality of regions of the surface of the semiconductor sample are obtained and stored in the image storage unit, and the stored images of the plurality of regions are compared with each other, and the existence of a defect in the regions and the defect position are measured. By doing this, in an apparatus for testing a pattern defect of the same design, foreign substances, and residuals on a wafer in the manufacturing process of a semiconductor apparatus by an electron beam, speeding-up of the test can be realized.
    Type: Application
    Filed: September 26, 2005
    Publication date: January 26, 2006
    Inventors: Hiroyuki Shinada, Yusuke Yajima, Hisaya Murakoshi, Masaki Hasegawa, Mari Nozoe, Atsuko Takafuji, Katsuya Sugiyama, Katsuhiro Kuroda, Kaoru Umemura, Yasutsugu Usami
  • Patent number: 6979823
    Abstract: An electron beam (area beam) having a fixed area is irradiated onto the surface of a semiconductor sample, and reflected electrons from the sample surface are imaged by the imaging lens, and images of a plurality of regions of the surface of the semiconductor sample are obtained and stored in the image storage unit, and the stored images of the plurality of regions are compared with each other, and the existence of a defect in the regions and the defect position are measured. By doing this, in an apparatus for testing a pattern defect of the same design, foreign substances, and residuals on a wafer in the manufacturing process of a semiconductor apparatus by an electron beam, speeding-up of the test can be realized.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: December 27, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Yusuke Yajima, Hisaya Murakoshi, Masaki Hasegawa, Mari Nozoe, Atsuko Takafuji, Katsuya Sugiyama, Katsuhiro Kuroda, Kaoru Umemura, Yasutsugu Usami
  • Patent number: 6871314
    Abstract: An encoder adds an identifier, being different when the coding should be done or not, into a predetermined location in an original signal, while a decoder reads out the identifier added and detects the condition of coding, so as to decide the execution (ON) of the decoding process to be done or not, automatically. Further, in each of the encoder and the decoder, there is provided a delay output portion, which provides an output treated with only a specific delay but not executing the coding/decoding thereon, separately from a coding process portion or a decoding process portion, wherein a selection can be made, at which one of the signals from the respective process portions and the delay output portion should be outputted, by a setup in an outside operation system with use of a selector.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: March 22, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masaki Ohira, Masatoshi Shibasaki, Yusuke Yajima, Takashi Mori
  • Publication number: 20050052362
    Abstract: A plasma display panel and an imaging device realize a high luminous efficiency, a long lifetime and stable driving. The plasma display panel uses a discharge-gas mixture containing at least Xe, Ne and He. A Xe proportion of the discharge-gas mixture is in a range of from 2% to 20%, a He proportion of the discharge-gas mixture is in a range of from 15% to 50%, the He proportion is greater than the Xe proportion, and a total pressure of the discharge-gas mixture is in a range of from 400 Torr to 550 Torr. A width of a voltage pulse to be applied to an electrode serving as an address electrode is 2 ?s or less.
    Type: Application
    Filed: October 12, 2004
    Publication date: March 10, 2005
    Inventors: Norihiro Uemura, Keizo Suzuki, Hiroshi Kajiyama, Yusuke Yajima, Masayuki Shibata, Yoshimi Kawanami, Koji Ohira, Ikuo Ozaki
  • Publication number: 20040258410
    Abstract: A bit synchronization circuit composed of a multiphase data sampling unit for converting each received burst data sets to multiphase data trains, a phase determination unit for generating a control signal indicating an optimum phase data train, an output data selector for selectively passing optimum phase data train indicated by the control signal, and a data synchronization unit for converting the optimum phase data train to a data train in synchronization with a reference clock. The phase determination unit repeatedly detecting the optimum phase data train during the same burst data set is received. When optimum phase varies, the output data selector dynamically switches the optimum phase data train to be supplied to the data synchronization unit.
    Type: Application
    Filed: September 4, 2003
    Publication date: December 23, 2004
    Inventors: Yusuke Yajima, Toshihiro Ashi, Tohru Kazawa
  • Patent number: 6822627
    Abstract: There are provided a plasma display panel and an imaging device which realize a high luminous efficiency, guaranteed long lifetime and stable driving. The plasma display panel uses a discharge-gas mixture containing at least Xe, Ne and He. A Xe proportion of the discharge-gas mixture is in a range of from 2% to 20%, a He proportion of the discharge-gas mixture is in a range of from 15% to 50%, the He proportion is greater than the Xe proportion, and a total pressure of the discharge-gas mixture is in a range of from 400 Torr to 550 Torr. A width of a voltage pulse to be applied to an address electrode is 2 &mgr;s or less.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: November 23, 2004
    Assignees: Hitachi, Ltd., Fujitsu Hitachi Plasma Display Ltd.
    Inventors: Norihiro Uemura, Keizo Suzuki, Hiroshi Kajiyama, Yusuke Yajima, Masayuki Shibata, Yoshimi Kawanami, Koji Ohira, Ikuo Ozaki
  • Publication number: 20040222377
    Abstract: An electron beam (area beam) having a fixed area is irradiated onto the surface of a semiconductor sample, and reflected electrons from the sample surface are imaged by the imaging lens, and images of a plurality of regions of the surface of the semiconductor sample are obtained and stored in the image storage unit, and the stored images of the plurality of regions are compared with each other, and the existence of a defect in the regions and the defect position are measured. By doing this, in an apparatus for testing a pattern defect of the same design, foreign substances, and residuals on a wafer in the manufacturing process of a semiconductor apparatus by an electron beam, speeding-up of the test can be realized.
    Type: Application
    Filed: June 14, 2004
    Publication date: November 11, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Yusuke Yajima, Hisaya Murakoshi, Masaki Hasegawa, Mari Nozoe, Atsuko Takafuji, Katsuya Sugiyama, Katsuhiro Kuroda, Kaoru Umemura, Yasutsugu Usami
  • Patent number: 6797954
    Abstract: An electron beam (area beam) having a fixed area is irradiated onto the surface of a semiconductor sample, and reflected electrons from the sample surface are imaged by the imaging lens, and images of a plurality of regions of the surface of the semiconductor sample are obtained and stored in the image storage unit, and the stored images of the plurality of regions are compared with each other, and the existence of a defect in the regions and the defect position are measured. By doing this, in an apparatus for testing a pattern defect of the same design, foreign substances, and residuals on a wafer in the manufacturing process of a semiconductor apparatus by an electron beam, speeding-up of the test can be realized.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: September 28, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Shinada, Yusuke Yajima, Hisaya Murakoshi, Masaki Hasegawa, Mari Nozoe, Atsuko Takafuji, Katsuya Sugiyama, Katsuhiro Kuroda, Kaoru Umemura, Yasutsugu Usami