Patents by Inventor Yusuke Yoshizumi

Yusuke Yoshizumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110012126
    Abstract: An object is to provide a nitride-based semiconductor light emitting device capable of preventing a Schottky barrier from being formed at an interface between a contact layer and an electrode. LD 1 is provided as a nitride-based semiconductor light emitting device provided with a GaN substrate 3, a hexagonal GaN-based semiconductor region 5 provided on a primary surface S1 of the GaN substrate 3 and including a light emitting layer 11, and a p-electrode 21 provided on the GaN-based semiconductor region 5 and comprised of metal. The GaN-based semiconductor region 5 includes a contact layer 17 involving strain, the contact layer 17 is in contact with the p-electrode, the primary surface S1 extends along a reference plane S5 inclined at a predetermined inclination angle ? from a plane perpendicular to the c-axis direction of the GaN substrate 3, and the inclination angle ? is either in the range of more than 40° and less than 90° or in the range of not less than 150° and less than 180°.
    Type: Application
    Filed: July 14, 2010
    Publication date: January 20, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamichi SUMITOMO, Masaki UENO, Takashi KYONO, Yohei ENYA, Yusuke YOSHIZUMI
  • Patent number: 7873088
    Abstract: A primary surface 23a of a supporting base 23 of a light-emitting diode 21a tilts by an off-angle of 10 degrees or more and less than 80 degrees from the c-plane. A semiconductor stack 25a includes an active layer having an emission peak in a wavelength range from 400 nm to 550 nm. The tilt angle “A” between the (0001) plane (the reference plane SR3 shown in FIG. 5) of the GaN supporting base and the (0001) plane of a buffer layer 33a is 0.05 degree or more and 2 degrees or less. The tilt angle “B” between the (0001) plane of the GaN supporting base (the reference plane SR4 shown in FIG. 5) and the (0001) plane of a well layer 37a is 0.05 degree or more and 2 degrees or less. The tilt angles “A” and “B” are formed in respective directions opposite to each other with reference to the c-plane of the GaN supporting base.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: January 18, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Masaki Ueno, Fumitake Nakanishi
  • Patent number: 7858963
    Abstract: In the nitride based semiconductor optical device LE1, the strained well layers 21 extend along a reference plane SR1 tilting at a tilt angle ? from the plane that is orthogonal to a reference axis extending in the direction of the c-axis. The tilt angle ? is in the range of greater than 59 degrees to less than 80 degrees or greater than 150 degrees to less than 180 degrees. A gallium nitride based semiconductor layer P is adjacent to a light-emitting layer SP? with a negative piezoelectric field and has a band gap larger than that of a barrier layer. The direction of the piezoelectric field in the well layer W3 is directed in a direction from the n-type layer to the p-type layer, and the piezoelectric field in the gallium nitride based semiconductor layer P is directed in a direction from the p-type layer to the n-type layer. Consequently, the valence band, not the conduction band, has a dip at the interface between the light-emitting layer SP? and the gallium nitride based semiconductor layer P.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: December 28, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masaki Ueno, Yohei Enya, Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi, Takamichi Sumitomo, Takao Nakamura
  • Publication number: 20100322276
    Abstract: Provided is a group-III nitride semiconductor laser device with a laser cavity allowing for a low threshold current, on a semipolar surface of a support base in which the c-axis of a hexagonal group-III nitride is tilted toward the m-axis. First and second fractured faces 27, 29 to form the laser cavity intersect with an m-n plane. The group-III nitride semiconductor laser device 11 has a laser waveguide extending in a direction of an intersecting line between the m-n plane and the semipolar surface 17a. For this reason, it is feasible to make use of emission by a band transition enabling the low threshold current. In a laser structure 13, a first surface 13a is opposite to a second surface 13b. The first and second fractured faces 27, 29 extend from an edge 13c of the first surface 13a to an edge 13d of the second surface 13b. The fractured faces are not formed by dry etching and are different from conventionally-employed cleaved facets such as c-planes, m-planes, or a-planes.
    Type: Application
    Filed: July 27, 2010
    Publication date: December 23, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yusuke YOSHIZUMI, Yohei ENYA, Takashi KYONO, Masahiro ADACHI, Katsushi AKITA, Masaki UENO, Takamichi SUMITOMO, Shinji TOKUYAMA, Koji KATAYAMA, Takao NAKAMURA, Takatoshi IKEGAMI
  • Patent number: 7851243
    Abstract: In the nitride based semiconductor optical device LE1, the strained well layers 21 extend along a reference plane SR1 tilting at a tilt angle ? from the plane that is orthogonal to a reference axis extending in the direction of the c-axis. The tilt angle ? is in the range of greater than 59 degrees to less than 80 degrees or greater than 150 degrees to less than 180 degrees. A gallium nitride based semiconductor layer P is adjacent to a light-emitting layer SP? with a negative piezoelectric field and has a band gap larger than that of a barrier layer. The direction of the piezoelectric field in the well layer W3 is directed in a direction from the n-type layer to the p-type layer, and the piezoelectric field in the gallium nitride based semiconductor layer P is directed in a direction from the p-type layer to the n-type layer. Consequently, the valence band, not the conduction band, has a dip at the interface between the light-emitting layer SP? and the gallium nitride based semiconductor layer P.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: December 14, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masaki Ueno, Yohei Enya, Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi, Takamichi Sumitomo, Takao Nakamura
  • Patent number: 7851821
    Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and a GaN semiconductor region 19. The primary surface 13a of the group III nitride semiconductor supporting base 13 is not any polar plane, and forms a finite angle with a reference plane Sc that is orthogonal to a reference axis Cx extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region 15 is grown on the semipolar primary surface 13a. A GaN based semiconductor layer 21 of the GaN based semiconductor region 15 is, for example, an n-type GaN based semiconductor, and the n-type GaN based semiconductor is doped with silicon.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: December 14, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Yusuke Yoshizumi, Yohei Enya, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Takao Nakamura
  • Publication number: 20100297784
    Abstract: In the nitride based semiconductor optical device LE1, the strained well layers 21 extend along a reference plane SR1 tilting at a tilt angle ? from the plane that is orthogonal to a reference axis extending in the direction of the c-axis. The tilt angle ? is in the range of greater than 59 degrees to less than 80 degrees or greater than 150 degrees to less than 180 degrees. A gallium nitride based semiconductor layer P is adjacent to a light-emitting layer SP? with a negative piezoelectric field and has a band gap larger than that of a barrier layer. The direction of the piezoelectric field in the well layer W3 is directed in a direction from the n-type layer to the p-type layer, and the piezoelectric field in the gallium nitride based semiconductor layer P is directed in a direction from the p-type layer to the n-type layer. Consequently, the valence band, not the conduction band, has a dip at the interface between the light-emitting layer SP? and the gallium nitride based semiconductor layer P.
    Type: Application
    Filed: August 6, 2010
    Publication date: November 25, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki UENO, Yohei ENYA, Takashi KYONO, Katsushi AKITA, Yusuke YOSHIZUMI, Takamichi SUMITOMO, Takao NAKAMURA
  • Publication number: 20100276663
    Abstract: In a GaN based semiconductor optical device 11a, the primary surface 13a of the substrate 13 tilts at a tilting angle toward an m-axis direction of the first GaN based semiconductor with respect to a reference axis “Cx” extending in a direction of a c-axis of the first GaN based semiconductor, and the tilting angle is 63 degrees or more, and is less than 80 degrees. The GaN based semiconductor epitaxial region 15 is provided on the primary surface 13a. On the GaN based semiconductor epitaxial region 15, an active layer 17 is provided. The active layer 17 includes one semiconductor epitaxial layer 19. The semiconductor epitaxial layer 19 is composed of InGaN. The thickness direction of the semiconductor epitaxial layer 19 tilts with respect to the reference axis “Cx.” The reference axis “Cx” extends in the direction of the [0001] axis. This structure provides the GaN based semiconductor optical device that can reduces decrease in light emission characteristics due to the indium segregation.
    Type: Application
    Filed: June 18, 2010
    Publication date: November 4, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Masaki UENO, Katsushi AKITA, Takashi KYONO, Takamichi SUMITOMO, Takao NAKAMURA
  • Publication number: 20100279495
    Abstract: A method of forming a p-type gallium nitride based semiconductor without activation annealing is provided, and the method can provide a gallium nitride based semiconductor doped with a p-type dopant. A GaN semiconductor region 17 containing a p-type dopant is formed on a supporting base 13 in a reactor 10. An organometallic source and ammonia are supplied to the reactor 10 to grow the GaN semiconductor layer 17 on a GaN semiconductor layer 15. The GaN semiconductor is doped with a p-type dopant. Examples of the p-type dopant include magnesium. After the GaN semiconductor regions 15 and 17 are grown, an atmosphere 19 containing at least one of monomethylamine and monoethylamine is prepared in the reactor 10. After the atmosphere 19 is prepared, a substrate temperature is decreased from the growth temperature of the GaN semiconductor region 17. When the substrate temperature is lowered to room temperature after this film formation, a p-type GaN semiconductor 17a and an epitaxial wafer E has been fabricated.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 4, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki UENO, Yusuke YOSHIZUMI, Takao NAKAMURA
  • Publication number: 20100260224
    Abstract: A primary surface 23a of a supporting base 23 of a light-emitting diode 21a tilts by an off-angle of 10 degrees or more and less than 80 degrees from the c-plane. A semiconductor stack 25a includes an active layer having an emission peak in a wavelength range from 400 nm to 550 nm. The tilt angle “A” between the (0001) plane (the reference plane SR3 shown in FIG. 5) of the GaN supporting base and the (0001) plane of a buffer layer 33a is 0.05 degree or more and 2 degrees or less. The tilt angle “B” between the (0001) plane of the GaN supporting base (the reference plane SR4 shown in FIG. 5) and the (0001) plane of a well layer 37a is 0.05 degree or more and 2 degrees or less. The tilt angles “A” and “B” are formed in respective directions opposite to each other with reference to the c-plane of the GaN supporting base.
    Type: Application
    Filed: May 13, 2010
    Publication date: October 14, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yusuke YOSHIZUMI, Yohei ENYA, Masaki UENO, Fumitake NAKANISHI
  • Publication number: 20100230690
    Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and a GaN semiconductor region 19. The primary surface 13a of the group III nitride semiconductor supporting base 13 is not any polar plane, and forms a finite angle with a reference plane Sc that is orthogonal to a reference axis Cx extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region 15 is grown on the semipolar primary surface 13a. A GaN based semiconductor layer 21 of the GaN based semiconductor region 15 is, for example, an n-type GaN based semiconductor, and the n-type GaN based semiconductor is doped with silicon.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 16, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi KYONO, Yusuke YOSHIZUMI, Yohei ENYA, Katsushi AKITA, Masaki UENO, Takamichi SUMITOMO, Takao NAKAMURA
  • Publication number: 20100220761
    Abstract: A gallium nitride-based semiconductor optical device is provided that includes an indium-containing gallium nitride-based semiconductor layer that exhibit low piezoelectric effect and high crystal quality. The gallium nitride-based semiconductor optical device 11a includes a GaN support base 13, a GaN-based semiconductor region 15, and well layers 19. A primary surface 13a tilts from a surface orthogonal to a reference axis that extends in a direction from one crystal axis of the m-axis and the a-axis of GaN toward the other crystal axis. The tilt angle AOFF is equal to the angle defined by a vector VM and a vector VN. The inclination of the primary surface is shown by a typical m-plane SM and m-axis vector VM. The GaN-based semiconductor region 15 is provided on the primary surface 13a. In the well layers 19 in an active layer 17, both the m-plane and the a-plane of the well layers 19 tilt from a normal axis AN of the primary surface 13a. The indium content of the well layers 19 is 0.1 or more.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 2, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Hideki OSADA, Keiji ISHIBASHI, Katsushi AKITA, Masaki UENO
  • Publication number: 20100213439
    Abstract: In the nitride based semiconductor optical device LE1, the strained well layers 21 extend along a reference plane SR1 tilting at a tilt angle ? from the plane that is orthogonal to a reference axis extending in the direction of the c-axis. The tilt angle ? is in the range of greater than 59 degrees to less than 80 degrees or greater than 150 degrees to less than 180 degrees. A gallium nitride based semiconductor layer P is adjacent to a light-emitting layer SP? with a negative piezoelectric field and has a band gap larger than that of a barrier layer. The direction of the piezoelectric field in the well layer W3 is directed in a direction from the n-type layer to the p-type layer, and the piezoelectric field in the gallium nitride based semiconductor layer P is directed in a direction from the p-type layer to the n-type layer. Consequently, the valence band, not the conduction band, has a dip at the interface between the light-emitting layer SP? and the gallium nitride based semiconductor layer P.
    Type: Application
    Filed: April 1, 2010
    Publication date: August 26, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki Ueno, Yohei Enya, Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi, Takamichi Sumitomo, Takao Nakamura
  • Publication number: 20100190284
    Abstract: In the method of fabricating a nitride-based semiconductor optical device by metal-organic chemical vapor deposition, a barrier layer is grown at a first temperature while supplying a gallium source to a reactor. The barrier layer comprises a first gallium nitride-based semiconductor. After the growth of the barrier layer, a nitrogen material and an indium material are supplied to the reactor without supply of the gallium source to perform a preflow of indium. Immediately after the preflow, a well layer is grown on the barrier layer at a second temperature while supplying an indium source and the gallium source to the reactor. The well layer comprises InGaN, and the second temperature is lower than the first temperature. The gallium source and the indium source are supplied to the reactor during plural first periods of the step of growing the well layer to grow plural InGaN layers, respectively.
    Type: Application
    Filed: January 22, 2010
    Publication date: July 29, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Masaki UENO, Takashi KYONO, Katsushi AKITA
  • Publication number: 20100189148
    Abstract: A group III nitride semiconductor laser is provided that has a good optical confinement property and includes an InGaN well layer having good crystal quality. An active layer 19 is provided between a first optical guiding layer 21 and a second optical guiding layer 23. The active layer 19 can include well layers 27a, 27b, and 27c and further includes at least one first barrier layer 29a provided between the well layers. The first and second optical guiding layers 21 and 23 respectively include first and second InGaN regions 21a and 23a smaller than the band gap E29 of the first barrier layer 29a, and hence the average refractive index nGUIDE of the first and second optical guiding layers 21 and 23 can be made larger than the refractive index n29 of the first barrier layer 29a. Thus, good optical confinement is achieved. The band gap E29 of the first barrier layer 29a is larger than the band gaps E21 and E23 of the first and second InGaN regions 21a and 23a.
    Type: Application
    Filed: February 17, 2009
    Publication date: July 29, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi
  • Publication number: 20100102297
    Abstract: A source gas flows through a flow channel 23 of a metal-organic vapor phase epitaxy reactor 21. The source gas is fed in a direction across a main surface 25a of a susceptor 25. GaN substrates 27a to 27c are placed on the susceptor main surface 25a. An off-angle monotonically varies on a line segment extending from one point on the edges of the main surfaces of the gallium nitride substrates 27a to 27c to another point on the edges. The orientations of the GaN substrates 27a to 27c are represented by the orientations of the orientation flats. By placing the plurality of gallium nitride substrates 27a to 27c on the susceptors 25 of the metal-organic vapor phase epitaxy reactor 21 in these orientations, the influence of the off-angle distribution can be reduced by using the influence originated from the flow of the source gas.
    Type: Application
    Filed: February 20, 2008
    Publication date: April 29, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yusuke Yoshizumi, Masaki Ueno, Takao Nakamura
  • Publication number: 20100078648
    Abstract: A gallium nitride-based epitaxial wafer for a nitride light-emitting device comprises a gallium nitride substrate having a primary surface, a gallium nitride-based semiconductor film provided on the primary surface of the gallium nitride substrate, and, an active layer provided on the gallium nitride-based semiconductor film, the active layer having a quantum well structure. The active layer includes a well layer of a gallium nitride-based semiconductor. The gallium nitride-based semiconductor contains indium as a Group III element. A normal line of the primary surface and a C-axis of the gallium nitride substrate form an off angle with each other. The off angle is distributed on the primary surface, and the off angle monotonically increases on the line that extends from one point to another point through a center point of the primary surface of the gallium nitride substrate.
    Type: Application
    Filed: September 23, 2009
    Publication date: April 1, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke YOSHIZUMI, Masaki UENO, Takao NAKAMURA
  • Publication number: 20100055820
    Abstract: In step S106, an InXGa1-XN well layer is grown on a semipolar main surface between times t4 and t5 while a temperature in a growth furnace is maintained at temperature TW. In step S107, immediately after completion of the growth of the well layer, the growth of a protective layer covering the main surface of the well layer is initiated at temperature TW. The protective layer is composed of a gallium nitride-based semiconductor with a band gap energy that is higher than that of the well layer and equal to or less than that of a barrier layer. In step S108, the temperature in the furnace is changed from temperatures TW to TB before the barrier layer growth. The barrier layer composed of the gallium nitride-based semiconductor is grown on the protective layer between times t8 and t9 while the temperature in the furnace is maintained at temperature TB.
    Type: Application
    Filed: August 12, 2009
    Publication date: March 4, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Akita, Yohei Enya, Takashi Kyono, Takamichi Sumitomo, Yusuke Yoshizumi, Masaki Ueno, Takao Nakamura
  • Publication number: 20090258452
    Abstract: A method for forming a quantum well structure that can reduce the variation in the In composition in the thickness direction of a well layer and a method for manufacturing a semiconductor light emitting element are provided. In a step of forming a quantum well structure (active layer) by alternately growing barrier layers and well layers on a primary surface of a GaN substrate, the well layers are each formed by growing InGaN, the barrier layers are each grown at a first temperature, the well layers are each grown at a second temperature which is lower than that of the first temperature, and when the well layers are each formed, before a starting material gas for Ga (trimethylgallium) is supplied, a starting material gas for In is supplied.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 15, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Masaki UENO, Fumitake NAKANISHI
  • Publication number: 20090227056
    Abstract: A method of fabricating a nitride semiconductor laser comprises preparing a substrate having a plurality of marker structures and a crystalline mass made of a hexagonal gallium nitride semiconductor. The primary and back surfaces of the substrate intersect with a predetermined axis extending in the direction of a c-axis of the hexagonal gallium nitride semiconductor. Each marker structure extends along a reference plane defined by the c-axis and an m-axis of the hexagonal gallium nitride semiconductor. The method comprises cutting the substrate along a cutting plane to form a wafer of hexagonal gallium nitride semiconductor, and the cutting plane intersects with the plurality of the marker structures. The wafer has a plurality of first markers, each of which extends from the primary surface to the back surface of the wafer, and each of the first markers comprises part of each of the marker structures. The primary surface of the wafer is semipolar or nonpolar.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 10, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi