Abstract: A highly reliable semiconductor device suitable for miniaturization and high integration is provided. The semiconductor device includes a first insulator; a transistor over the first insulator; a second insulator over the transistor; a first conductor embedded in an opening in the second insulator; a barrier layer over the first conductor; a third insulator over the second insulator and over the barrier layer; and a second conductor over the third insulator. The first insulator, the third insulator, and the barrier layer have a barrier property against oxygen and hydrogen. The second insulator includes an excess-oxygen region. The transistor includes an oxide semiconductor. The barrier layer, the third insulator, and the second conductor function as a capacitor.

Abstract: A semiconductor device which includes a transistor having a miniaturized structure is provided. A first insulator is provided over a stack in which a semiconductor, a first conductor, and a second conductor are stacked in this order. Over the first insulator, an etching mask is formed. Using the etching mask, the first insulator and the second conductor are etched until the first conductor is exposed. After etching the first conductor until the semiconductor is exposed so as to form a groove having a smaller width than the second conductor, a second insulator and a third conductor are formed sequentially.

Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed. [Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j?2, the jth sub memory cell is arranged over the j-1th sub memory cell. [Selected Drawing] FIG.

Abstract: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.

Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.

Abstract: A semiconductor device in which parasitic capacitance is reduced is provided. A first oxide insulating layer and a first oxide semiconductor layer are sequentially formed over a first insulating layer. A first conductive layer is formed over the first oxide semiconductor layer and etched to form a second conductive layer. The first oxide insulating layer and the first oxide semiconductor layer are etched with the second conductive layer as a mask to form a second oxide insulating layer and a second oxide semiconductor layer. A planarized insulating layer is formed over the first insulating layer and the second conductive layer. A second insulating layer, a source electrode layer, and a drain electrode layer are formed by etching the planarized insulating layer and the second conductive layer. A third oxide insulating layer, a gate insulating layer, and a gate electrode layer are formed over the second oxide semiconductor layer.

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed. [Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j?2, the jth sub memory cell is arranged over the j?1th sub memory cell.

Abstract: A high-performance semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a first metal oxide covering at least part of the first transistor, an insulating film over the first transistor and the second transistor, and a second metal oxide over the insulating film. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide, a first source electrode, a first drain electrode, a second gate insulating film, and a second gate electrode. The second transistor includes a third gate electrode, a third gate insulating film, a second oxide, a second source electrode, a second drain electrode, a fourth gate insulating film, and a fourth gate electrode. The first gate insulating film and the second gate insulating film are in contact with the first metal oxide.

Abstract: An object is to provide a semiconductor device including an oxynitride semiconductor whose carrier density is controlled. By introducing controlled nitrogen into an oxide semiconductor layer, a transistor in which an oxynitride semiconductor having desired carrier density and on characteristics is used for a channel can be manufactured. Further, with the use of the oxynitride semiconductor, even when a low resistance layer or the like is not provided between an oxynitride semiconductor layer and a source electrode and between the oxynitride semiconductor layer and a drain electrode, favorable contact characteristics can be exhibited.

Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.

Abstract: A semiconductor device having favorable electric characteristics is provided. The semiconductor device includes a first transistor and second transistor. The first transistor includes a first conductor over a substrate; a first insulator thereover; a first oxide thereover; a second insulator over thereover; a second conductor including a side surface substantially aligned with a side surface of the second insulator and being over the second insulator; a third insulator including a side surface substantially aligned with a side surface of the second conductor and being over the second conductor; a fourth insulator in contact with a side surface of the second insulator, a side surface of the second conductor, and a side surface of the third insulator; and a fifth insulator in contact with the first oxide and the fourth insulator.

Abstract: To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.

Abstract: A control circuit for an AC/DC converter includes an AC detection circuit that periodically determines from a change in the AC input voltage whether AC voltage is being input and, upon determining that AC voltage is being input, outputs an AC detection signal that takes a HIGH level only for a prescribed duration; and an enable signal conversion circuit that filters the AC detection signal to generate the enable signal that is in a HIGH state when the AC detection signal is in the HIGH level and that becomes the LOW state after a prescribed time has passed since the AC detection signal becomes a LOW level unless the AC detection signal rises to the HIGH level again, thereby producing the enable signal that is more responsive.

Abstract: A high-performance semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a first metal oxide covering at least part of the first transistor, an insulating film over the first transistor and the second transistor, and a second metal oxide over the insulating film. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide, a first source electrode, a first drain electrode, a second gate insulating film, and a second gate electrode. The second transistor includes a third gate electrode, a third gate insulating film, a second oxide, a second source electrode, a second drain electrode, a fourth gate insulating film, and a fourth gate electrode. The first gate insulating film and the second gate insulating film are in contact with the first metal oxide.

Abstract: A highly reliable semiconductor device suitable for miniaturization and high integration is provided. The semiconductor device includes a first insulator; a transistor over the first insulator; a second insulator over the transistor; a first conductor embedded in an opening in the second insulator; a barrier layer over the first conductor; a third insulator over the second insulator and over the barrier layer; and a second conductor over the third insulator. The first insulator, the third insulator, and the barrier layer have a barrier property against oxygen and hydrogen. The second insulator includes an excess-oxygen region. The transistor includes an oxide semiconductor. The barrier layer, the third insulator, and the second conductor function as a capacitor.

Abstract: A semiconductor device in which parasitic capacitance is reduced is provided. A first oxide insulating layer and a first oxide semiconductor layer are sequentially formed over a first insulating layer. A first conductive layer is formed over the first oxide semiconductor layer and etched to form a second conductive layer. The first oxide insulating layer and the first oxide semiconductor layer are etched with the second conductive layer as a mask to form a second oxide insulating layer and a second oxide semiconductor layer. A planarized insulating layer is formed over the first insulating layer and the second conductive layer. A second insulating layer, a source electrode layer, and a drain electrode layer are formed by etching the planarized insulating layer and the second conductive layer. A third oxide insulating layer, a gate insulating layer, and a gate electrode layer are formed over the second oxide semiconductor layer.

Abstract: To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.

Abstract: A miniaturized transistor with less variation and highly stable electrical characteristics is provided. Further, high performance and high reliability of a semiconductor device including the transistor are achieved. A semiconductor and a conductor are formed over a substrate, a sacrificial layer is formed over the conductor, and an insulator is formed to cover the sacrificial layer. After that, a top surface of the insulator is removed to expose a top surface of the sacrificial layer. The sacrificial layer and a region of the conductor overlapping with the sacrificial layer are removed, whereby a source region, a drain region, and an opening are formed. Next, a gate insulator and a gate electrode are formed in the opening.

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.