Patents by Inventor Yutaka Akiba

Yutaka Akiba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12077036
    Abstract: The present invention pertains to a laminated glass for a vehicle, the laminated glass including a first glass sheet, a second glass sheet and an intermediate film sandwiched between the first glass sheet and the second glass sheet, in which: the total thickness of the first glass sheet, the second glass sheet and the intermediate film is 4.0 mm or more; the first glass sheet is formed of a borosilicate glass containing, in terms of oxide by molar percentage, 1.0% or more of B2O3; and when a radio wave (TM wave) with a frequency of 79[GHz] is made incident at an incident angle of 60° to the first glass sheet, the transmission property S21 is ?4.0 [dB] or more.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: September 3, 2024
    Assignee: AGC Inc.
    Inventors: Takato Kajihara, Shigeki Sawamura, Shusaku Akiba, Yutaka Kuroiwa
  • Patent number: 8259257
    Abstract: The liquid crystal display apparatus includes a liquid crystal panel and the back light device for emitting the light from a light source to the liquid crystal panel through a lens. The light source includes a first LED for emitting the light of a first color, a second LED for emitting the light of a second color, a third LED for emitting the light of a third color, a fourth LED for emitting the light of the third color, a fifth LED for emitting the light of the second color, and a sixth LED for emitting the light of the first color. The first, second, third, fourth, fifth and sixth LEDs are arranged on the wiring board in such a manner as to offset the deviation of the light distribution.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: September 4, 2012
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Yutaka Akiba, Ikuo Hiyama, Kiyomi Nakamura, Yoshinori Aono, Makoto Tsumura, Akitoyo Konno, Norihiro Uemura
  • Patent number: 8017959
    Abstract: A widely applicable and low cost module substrate with a high accuracy, reliability and heat-radiation structure. A light source includes: a heat radiation substrate; an insulating layer formed in some regions in an upper surface of the substrate; a wiring layer having wiring patterns, the wiring layer being arranged on the insulating layer; and a plurality of LED elements connected to the wiring layer. Moreover, the light source includes: a heat radiation substrate; an insulating layer arranged in some regions in an upper surface of the substrate; a wiring layer having wiring patterns, the wiring layer being arranged on the insulating layer; and LED elements connected to the wiring layer, wherein the insulating layer has two layers of a resin layer arranged in the wiring layer side and an adhesive layer arranged in the heat radiation substrate side.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: September 13, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Akiba, Hiroki Kaneko, Ikuo Hiyama, Toshiaki Tanaka
  • Publication number: 20100066943
    Abstract: The liquid crystal display apparatus includes a liquid crystal panel and the back light device for emitting the light from a light source to the liquid crystal panel through a lens. The light source includes a first LED for emitting the light of a first color, a second LED for emitting the light of a second color, a third LED for emitting the light of a third color, a fourth LED for emitting the light of the third color, a fifth LED for emitting the light of the second color, and a sixth LED for emitting the light of the first color. The first, second, third, fourth, fifth and sixth LEDs are arranged on the wiring board in such a manner as to offset the deviation of the light distribution.
    Type: Application
    Filed: August 17, 2009
    Publication date: March 18, 2010
    Inventors: Yutaka AKIBA, Ikuo Hiyama, Kiyomi Nakamura, Yoshinori Aono, Makoto Tsumura, Akitoyo Konno, Norihiro Uemura
  • Patent number: 7605778
    Abstract: An intermediate electrode is formed in a space between an X display electrode and a Y display electrode parallel thereto. A negative voltage is applied to the Y display electrode to use the Y display electrode as a cathode. A charge is stored between the Y display electrode and an intermediate electrode to create an electric field. Upon the increase of the intensity of the electric field to a sufficiently high level, an instant discharge occurs between the Y display electrode and the X display electrode and intense ultraviolet rays are produced. The fluorescent layer excited by the ultraviolet rays emits visible light. Only a narrow pulse current flows through the X display electrode and the Y display electrode, so that power consumption can be suppressed at high emission efficiency.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: October 20, 2009
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Publication number: 20080002100
    Abstract: An illumination device includes trains of lead frames and a plurality of light-emitting diodes provided in series on the lead frames. The trains of the lead frames are juxtaposed, and the light-emitting diodes are sealed with a reflecting resin and a transparent resin over a substrate. Gaps are provided between the lead frames and the substrate. The illumination device is employed as a backlight source in a display device.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 3, 2008
    Inventors: Hiroki Kaneko, Toshiaki Tanaka, Yutaka Akiba
  • Publication number: 20070194340
    Abstract: A widely applicable and low cost module substrate with a high accuracy, reliability and heat-radiation structure. A light source includes: a heat radiation substrate; an insulating layer formed in some regions in an upper surface of the substrate; a wiring layer having wiring patterns, the wiring layer being arranged on the insulating layer; and a plurality of LED elements connected to the wiring layer. Moreover, the light source includes: a heat radiation substrate; an insulating layer arranged in some regions in an upper surface of the substrate; a wiring layer having wiring patterns, the wiring layer being arranged on the insulating layer; and LED elements connected to the wiring layer, wherein the insulating layer has two layers of a resin layer arranged in the wiring layer side and an adhesive layer arranged in the heat radiation substrate side.
    Type: Application
    Filed: January 18, 2007
    Publication date: August 23, 2007
    Inventors: Yutaka Akiba, Hiroki Kaneko, Ikuo Hiyama, Toshiaki Tanaka
  • Patent number: 7046218
    Abstract: A plasma display panel includes a front plate, at least one electrode disposed on the front plate, a back plate opposing the front plate, the back plate being spaced apart from the front plate, at least one electrode disposed on the back plate, and a plurality of partition walls disposed between the front plate and the back plate. The partition walls divide a space between the front plate and the back plate into a plurality of display cells. Each of the partition walls has a plurality of projections opposing one of the front plate and the back plate. The projections are arranged such that the projections do not overlap the at least one electrode disposed on the one of the front plate and the back plate.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: May 16, 2006
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Patent number: 7009586
    Abstract: A driving method enables an improvement in emission efficiency and achievement of a higher degree of brightness when employing the address while display driving (AWD) scheme. Taking a 3-bit 8-gradation display as an example, a first H period (one horizontal scan period) of each subfield is divided into 3 regions (first region, second region, and third region in the order of time), and, in each of the lines, an address period (address pulse PA and scan pulse PAY) of the subfield SF1 is set in the first region, an address period of subfield SF2 is set in the second region, and an address period of the subfield SF3 is set in the third region. The regions other than those in which the address period is set are used as the sustain period, and a time length of each sustain pulse Ps is set to ? of the length of the H period. A reset period achieved by a reset pulse PR and a priming period achieved by a priming pulse PP are set in the region where the address period is set.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: March 7, 2006
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Patent number: 6947015
    Abstract: A sustain pulse for a display discharge is controlled in either display electrode line units or line block units each comprising a plurality of these display electrode lines, on the basis of addressed cell data, whereby it is made possible to provide a plasma display panel and driving technology therefor, which enables image quality to be enhanced by suppressing brightness irregularities between electrode lines.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: September 20, 2005
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Patent number: 6903711
    Abstract: In a driving method for driving a plasma display panel, achieving improvements on luminous efficiency, brightness and contrast, as well as, low voltage and low power consumption, and also high-speed addressing and sustain therewith, wherein onto a second display electrode is applied pulse voltage in reverse polarity with sustain pulse voltage, nearly in synchronism with the sustain pulse voltage to be applied onto a first display electrode, thereby shifting initial discharge (or, pre-charge) caused between the first display electrode and a metal electrode of a partition portion after the generation thereof into display discharge, thereby forming wall charge and wall voltage on the second display electrode.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: June 7, 2005
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Patent number: 6873105
    Abstract: The invention provides plasma display panel technique that is operated with a low voltage and reduced power consumption, and exhibits high luminous efficiency and high luminance. A barrier plate comprises a metal electrode having a projection that projects partially toward the cell space side between display electrodes formed so that the display electrodes intersect with an address electrode in a plane approximately parallel to the panel plane.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: March 29, 2005
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Publication number: 20050007018
    Abstract: A plasma display panel includes a front plate, at least one electrode disposed on the front plate, a back plate opposing the front plate, the back plate being spaced apart from the front plate, at least one electrode disposed on the back plate, and a plurality of partition walls disposed between the front plate and the back plate. The partition walls divide a space between the front plate and the back plate into a plurality of display cells. Each of the partition walls has a plurality of projections opposing one of the front plate and the back plate. The projections are arranged such that the projections do not overlap the at least one electrode disposed on the one of the front plate and the back plate.
    Type: Application
    Filed: August 5, 2004
    Publication date: January 13, 2005
    Inventor: Yutaka Akiba
  • Patent number: 6784616
    Abstract: A plasma display panel includes a front plate, at least one electrode disposed on the front plate, a back plate opposing the front plate, the back plate being spaced apart from the front plate, at least one electrode disposed on the back plate, and a plurality of partition walls disposed between the front plate and the back plate. The partition walls divide a space between the front plate and the back plate into a plurality of display cells. Each of the partition walls has a plurality of projections opposing one of the front plate and the back plate. The projections are arranged such that the projections do not overlap the at least one electrode disposed on the one of the front plate and the back plate.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: August 31, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Patent number: 6707682
    Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation of a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: March 16, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Akiba, Yasunori Narizuka, Hirayoshi Tanei, Naoya Kitamura
  • Patent number: 6696787
    Abstract: A plasma display panel including a front plate, at least one electrode disposed on the front plate and connected to a drive circuit, a back plate opposing the front plate, the back plate being spaced apart from the front plate, at least one electrode disposed on the back plate and connected to the drive circuit, and a plurality of partition walls disposed between the front plate and the back plate. The partition walls divide a space between the front plate and the back plate into a plurality of display cells. Each of the partition walls is formed by a sheet-like metal plate having an insulated exterior surface, or by laminating a plurality of sheet-like metal plates each having an insulated exterior surface. At least one sheet-like metal plate of each of the partition walls is connected to the drive circuit.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: February 24, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Yutaka Akiba
  • Publication number: 20030132898
    Abstract: An intermediate electrode (18) is formed in a space between an X display electrode (2) and a Y display electrode (3) parallel thereto. Metal barrier ribs (16) held between a front substrate and a back substrate define cells. The intermediate electrode (18) and the metal barrier ribs (16) are grounded and are used as anodes. One of the cells having surfaces coated with fluorescent layers (10), respectively, is selected by driving an address electrode (7) and the Y display electrode (3), and the Y display electrode (3) in the selected cell is charged with a wall charge. A negative voltage is applied to the Y display electrode (3) to use the Y display electrode as a cathode. A charge is stored between the Y display electrode (3) and the intermediate electrode (18) to create an electric field.
    Type: Application
    Filed: December 11, 2002
    Publication date: July 17, 2003
    Inventor: Yutaka Akiba
  • Publication number: 20030122742
    Abstract: The present invention provides a driving method which enables an improvement in emission efficiency and achievement of a higher degree of brightness when employing the address while display driving scheme.
    Type: Application
    Filed: December 26, 2002
    Publication date: July 3, 2003
    Inventor: Yutaka Akiba
  • Publication number: 20020171361
    Abstract: A plasma display panel including a front plate, at least one electrode disposed on the front plate and connected to a drive circuit, a back plate opposing the front plate, the back plate being spaced apart from the front plate, at least one electrode disposed on the back plate and connected to the drive circuit, and a plurality of partition walls disposed between the front plate and the back plate. The partition walls divide a space between the front plate and the back plate into a plurality of display cells. Each of the partition walls is formed by a sheet-like metal plate having an insulated exterior surface, or by laminating a plurality of sheet-like metal plates each having an insulated exterior surface. At least one sheet-like metal plate of each of the partition walls is connected to the drive circuit.
    Type: Application
    Filed: July 2, 2002
    Publication date: November 21, 2002
    Inventor: Yutaka Akiba
  • Publication number: 20020163304
    Abstract: A plasma display panel includes a front plate, at least one electrode disposed on the front plate, a back plate opposing the front plate, the back plate being spaced apart from the front plate, at least one electrode disposed on the back plate, and a plurality of partition walls disposed between the front plate and the back plate. The partition walls divide a space between the front plate and the back plate into a plurality of display cells. Each of the partition walls has a plurality of projections opposing one of the front plate and the back plate. The projections are arranged such that the projections do not overlap the at least one electrode disposed on the one of the front plate and the back plate.
    Type: Application
    Filed: July 2, 2002
    Publication date: November 7, 2002
    Inventor: Yutaka Akiba