Patents by Inventor Yutaka Akiba
Yutaka Akiba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020149548Abstract: A sustain pulse for a display discharge is controlled in either display electrode line units or line block units each comprising a plurality of these display electrode lines, on the basis of addressed cell data, whereby it is made possible to provide a plasma display panel and driving technology therefor, which enables image quality to be enhanced by suppressing brightness irregularities between electrode lines.Type: ApplicationFiled: April 12, 2002Publication date: October 17, 2002Applicant: Hitachi, Ltd.Inventor: Yutaka Akiba
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Publication number: 20020145387Abstract: The invention provides plasma display panel technique that is operated with a low voltage and reduced power consumption, and exhibits high luminous efficiency and high luminance. A barrier plate comprises a metal electrode having a projection that projects partially toward the cell space side between display electrodes formed so that the display electrodes intersect with an address electrode in a plane approximately parallel to the panel plane.Type: ApplicationFiled: February 25, 2002Publication date: October 10, 2002Applicant: Hitachi, Ltd.Inventor: Yutaka Akiba
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Publication number: 20020135545Abstract: In a driving method for driving a plasma display panel, achieving improvements on luminous efficiency, brightness and contrast, as well as, low voltage and low power consumption, and also high-speed addressing and sustain therewith, wherein onto a second display electrode is applied pulse voltage in reverse polarity with sustain pulse voltage, nearly in synchronism with the sustain pulse voltage to be applied onto a first display electrode, thereby shifting initial discharge (or, pre-charge) caused between the first display electrode and a metal electrode of a partition portion after the generation thereof into display discharge, thereby forming wall charge and wall voltage on the second display electrode.Type: ApplicationFiled: February 19, 2002Publication date: September 26, 2002Applicant: Hitachi, Ltd.Inventor: Yutaka Akiba
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Patent number: 6414435Abstract: A plasma display panel includes a back plate having a plurality of address electrodes, and a plurality of first display electrodes arranged to intersect the address electrodes; a front plate having a plurality of second display electrodes arranged to oppose the plurality of first display electrodes; and partition walls arranged between the front plate and the back plate, thereby increasing brightness and light emission efficiency.Type: GrantFiled: November 30, 1998Date of Patent: July 2, 2002Assignee: Hitachi, Ltd.Inventor: Yutaka Akiba
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Patent number: 6353540Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation off a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.Type: GrantFiled: July 10, 1997Date of Patent: March 5, 2002Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Yasunori Narizuka, Hirayoshi Tanei, Naoya Kitamura
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Publication number: 20020015293Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation of a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.Type: ApplicationFiled: September 21, 2001Publication date: February 7, 2002Inventors: Yutaka Akiba, Yasunori Narizuka, Hirayoshi Tanei, Naoya Kitamura
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Patent number: 6188297Abstract: A low-EMI cable connector mounted on a transmission cable for connecting circuits comprises n (n: 1, 2, . . . ) cylindrical members having arranged on the inner surface of a dielectric portion covering the whole periphery of the transmission cable. A short-circuiting member covering the whole periphery of the transmission cable is formed on the termination side of the cylindrical members thereby to form a short-circuiting termination line. The resonance frequency of the short-circuiting termination line is set equal to the resonance frequency of the transmission cable.Type: GrantFiled: December 23, 1998Date of Patent: February 13, 2001Assignee: Hitachi, Ltd.Inventor: Yutaka Akiba
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Patent number: 5491301Abstract: A shielding method which utilizes a three dimensional structure and is effective to a source of the electromagnetic radiation noise, and a circuit board employing the same are obtained. Further, for the purpose of making the shielding function at an enclosure level unnecessary and realizing the recycling of enclosure materials by using this circuit board, in a circuit board structure having at least a signal layer, a power source layer and a ground layer, a signal line on the signal layer which is sandwiched between the two conductor layers made up of the power source layer and the ground layer, or the power source layers or the ground layers, is enclosed in a three dimensional manner with the conductor layers, thereby to form a single or double electrical closed loop current path or paths. By adopting this structure, there is obtained the effect that the electromagnetic radiation noise radiated from the circuit board is greatly reduced.Type: GrantFiled: December 22, 1993Date of Patent: February 13, 1996Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kunio Matsumoto, Makoto Iida, Takashi Maruyama, Tsutomu Hara, Hitoshi Yoshidome, Kazuo Hirota
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Patent number: 4975871Abstract: According to one embodiment of the present invention, a magnetic bubble memory module comprising a flexible printed circuits substrate (FPC3), on which a magnetic bubble memory chip (CHI) is mounted and electrically connected, with interconnecting patterns (9a) electrically connecting the chip (CHI) with external connecting leads, terminals or pins as well as bias coil winding (BIC2) for applying bias field to the chip (CHI), thereby reducing the number of components as well as fabricating steps because of the formation of the bias coil (BIC2) with the printed circuits substrate (FPC3).Type: GrantFiled: July 7, 1988Date of Patent: December 4, 1990Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota, Nobuo Kishiro, Toshio Futami, Tatsuo Hamamoto
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Patent number: 4972369Abstract: According to one embodiment of the present invention, a magnetic bubble memory module comprising a flexible printed circuits substrate (FPC3), on which a magnetic bubble memory chip (CHI) is mounted and electrically connected, with interconnecting patterns(9a) electrically connecting the chip (CHI) with external connecting leads, terminals or pins as well as bias coil winding (BIC2) for applying bias field to the chip (CHI), thereby reducing the number of components as well as fabricating steps because of the formation of the bias coil (BIC2) with the printed circuits substrate (FPC3).Type: GrantFiled: November 6, 1989Date of Patent: November 20, 1990Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota, Nobuo Kishiro, Toshio Futami, Tatsuo Hamamoto
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Patent number: 4952272Abstract: A probe head for use with equipment for testing a semiconductor device such as a large scale integrated circuit (LSI) includes electrode pads are formed on a circuit substrate, and a pad protecting conductive layer formed on the pads. A probe pin forming material is grown which is worked into a pin-like configuration, thereby improving a pin assembling property of a probe head portion and this realizes highly accurate pinning with high reliability.Type: GrantFiled: May 30, 1989Date of Patent: August 28, 1990Assignee: Hitachi, Ltd.Inventors: Hironobu Okino, Akio Fujiwara, Yutaka Akiba, Susumu Kasukabe, Tsuyoshi Fujita, Masao Mitani, Kazuo Hirota
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Patent number: 4931726Abstract: A semiconductor device testing apparatus which has a plurality of probes and plurality of coaxial cables connected therewith for impedance matching and a plurality of springs for providing flexibility to the individual probes to absorb a level difference in the surface of a semiconductor device.The apparatus constructed in this manner allows for an effective test of a semiconductor device with a high density electrode arrangement.Type: GrantFiled: June 21, 1988Date of Patent: June 5, 1990Assignee: Hitachi, Ltd.Inventors: Susumu Kasukabe, Masasi Ookubo, Yutaka Akiba, Minoru Tanaka, Hitoshi Yokono
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Patent number: 4803674Abstract: A magneto-optical recorder is disclosed in which an external magnetic field required for recording and erasing can be produced by a small-sized electromagnetic coil having a small magneto-motive force. The electromagnetic coil is made up of a magnetic core and a coil winding, and the outer peripheral portion of the coil winding other than that peripheral portion thereof which confronts a recording medium, is covered by a core material. A magnetic field emanating from the electromagnetic coil spreads in a narrow space, and can be applied to the recording medium with large intensity even when the electromagnetic coil has a small magneto-motive force. In the recorder, a magnetic body is disposed such that the electromagnetic coil and the magnetic body face each other, to concentrate the magnetic field generated by the electromagnetic coil, to the vicinity of that portion of the recording medium which is irradiated with a light spot.Type: GrantFiled: November 20, 1986Date of Patent: February 7, 1989Assignee: Hitachi, Ltd.Inventors: Takeshi Nakao, Yutaka Akiba
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Patent number: 4730271Abstract: A magnetic bubble memory chip is disposed at a position surrounded by a rectangular annular core having two pairs of opposite sides wound by a pair of wires, respectively, and is covered by a case for confining revolving magnetic field, thereby providing a revolving magnetic field to said chip. A bubble memory includes a permament magnet used as a holding magnetic field source, lying at a predetermined angle to the chip. An inclination between the chip and the magnet is provided on the revolving-magnetic-field confining case to be inserted between the chip and the magnet by having the case changed in plate thickness.Type: GrantFiled: April 24, 1986Date of Patent: March 8, 1988Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota, Nobuo Kishiro, Toshio Futami, Tatsuo Hamamoto
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Patent number: 4694423Abstract: A magnetic bubble memory module having a rectangular core shaped like a picture frame providing windings on respective two pairs of opposite sides, at least one magnetic bubble memory chip disposed in an area surrounded by the core, a flexible substrate having a chip-loading section for loading the magnetic bubble memory chip thereon and having four corners for leading out lead wires connecting signal lines and driving lines of the chip. A revolving magnetic field-confining case accommodates the core, the chip and the flexible substrate and enables the lead wires of the flexible substrate at the corners of the chip-loading section to be drawn out therethrough.Type: GrantFiled: January 29, 1986Date of Patent: September 15, 1987Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota, Nobuo Kishiro, Toshio Futami, Tatsuo Hamamoto
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Patent number: 4663737Abstract: In a magnetic bubble memory unit comprising two pairs of windings confronting in parallel each other, a printed circuit board having a magnetic bubble memory chip thereon surrounded by the windings for providing the rotating magnetic field, and a conductive shield case for covering the magnetic bubble memory chip on the printed circuit board, slitlike openings are provided on the side face of the conductive shield case so as to present connection between the printed circuit board and an external device.Type: GrantFiled: April 3, 1984Date of Patent: May 5, 1987Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota
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Patent number: 4592014Abstract: A magnetic bubble memory device comprises a cassette and a body. The cassette has a bias magnetic field generator adapted to generate a bias magnetic field for sustaining magnetic bubbles within a bubble memory chip and is removed of coils adapted to generate a rotating magnetic field for propagation of the magnetic bubbles. The body has a rotating magnetic field generator. The cassette is mounted to or dismounted from the body. When the cassette is dismounted from the cassette, information stored in the chip is held by the bias magnetic field generator and when the cassette is mounted to the body, information is read from or written into the chip by the rotating magnetic field generator.Type: GrantFiled: August 7, 1984Date of Patent: May 27, 1986Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota
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Patent number: 4592015Abstract: A magnetic bubble memory module comprises a shielding conductor case which encloses therein an annular rectangular parallelepiped core having windings and a magnetic bubble memory chip arranged in a space defined by the annular core. The central portion of the shielding conductor case is recessed so that it is brought near the bubble memory chip. The recess may be formed in one or each of the top and bottom surfaces of the shielding conductor case. A magnet plate is disposed in the recess of the shielding conductor case. The whole assembly is covered by a magnetic shielding case.Type: GrantFiled: July 5, 1984Date of Patent: May 27, 1986Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota
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Patent number: 4549042Abstract: A litz wire comprises three or more insulated strands consisting essentially of an inner conductor and an outer insulating layer on said conductor. The strands are twisted symmetrically with respect to the center line of the wire, so that a current density distribution in the litz wire becomes uniform. Three or more such litz wires are twisted to form a composite litz wire. The composite litz wires are suitable for use in a high-frequency coil.Type: GrantFiled: August 2, 1982Date of Patent: October 22, 1985Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Kazuo Hirota
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Patent number: 4546210Abstract: A plurality of strands each comprising a conductor covered with an insulating layer and then with an adhesive layer are twisted together and fixed to each other by fusing of the adjacent adhesive layers to form a litz wire which will not be deformed even by an external force.Type: GrantFiled: June 3, 1983Date of Patent: October 8, 1985Assignee: Hitachi, Ltd.Inventors: Yutaka Akiba, Toshio Futami, Teruo Suda